Patent application number | Description | Published |
20080258759 | UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING - A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O. | 10-23-2008 |
20080258760 | SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING - Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals. A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers. | 10-23-2008 |
20080259070 | ACTIVE LIQUID CRYSTAL DISPLAY DRIVERS AND DUTY CYCLE OPERATION - A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages. | 10-23-2008 |
20080259698 | HIGH SPEED DUAL PORT MEMORY WITHOUT SENSE AMPLIFIER - A system includes at least one word line decoder to select word lines to activate, and a memory cell array having a plurality of memory cell devices to store data received through one or more write bit lines. At least one of the memory cell devices including a memory cell to store data received over one or more write bit lines, and a sensing inversion device coupled to the memory cell and word lines. The sensing inversion device can read data stored by the memory cell and provide the read data to one or more read bit lines when at least one of the word lines is activated for read operations. | 10-23-2008 |
20080263319 | UNIVERSAL DIGITAL BLOCK WITH INTEGRATED ARITHMETIC LOGIC UNIT - An array of universal digital blocks include programmable logic device sections that have uncommitted user programmable logic functions and structural datapath sections that include dedicated and highly configurable arithmetic operators. A routing channel matrix programmably connects to different programmable logic device sections and datapath sections in the different universal digital blocks. | 10-23-2008 |
20080263334 | DYNAMICALLY CONFIGURABLE AND RE-CONFIGURABLE DATA PATH - An apparatus includes a configuration memory coupled to one or more structural arithmetic elements, the configuration memory to store values that cause the structural arithmetic elements to perform various functions. The apparatus also includes a system controller to dynamically load the configuration memory with values, and to prompt the structural arithmetic elements to perform functions according to the values stored by the configuration memory. | 10-23-2008 |
20080288755 | CLOCK DRIVEN DYNAMIC DATAPATH CHAINING - A system includes a plurality of datapaths, each having structural arithmetic elements to perform various arithmetic operations based, at least in part, on configuration data. The system also includes a configuration memory coupled to the datapaths, the configuration memory to provide the configuration data to the datapaths, which causes the datapaths to collaborate when performing the arithmetic operations. | 11-20-2008 |
20100281145 | AUTONOMOUS CONTROL IN A PROGRAMMABLE SYSTEM - A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously of the microcontroller. | 11-04-2010 |
20100287334 | ADDRESSING SCHEME TO ALLOW FLEXIBLE MAPPING OF FUNCTIONS IN A PROGRAMMABLE LOGIC ARRAY - A programmable processing device comprises a plurality of universal digital blocks (UDBs) in a UDB linear array. Each register in each UDB is associated with a plurality of memory addresses, where each memory address is from each of the different memory address spaces associated with different access mode widths of different digital peripheral functions. A digital peripheral function of an access mode width is mapped to one or more contiguous UDBs starting with a first UDB in the UDB linear array. Based on the access mode width, one of the associated memory addresses is chosen for the first UDB. | 11-11-2010 |
20110026519 | DYNAMICALLY RECONFIGURABLE ANALOG ROUTING CIRCUITS AND METHODS FOR SYSTEM ON A CHIP - An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data. | 02-03-2011 |
20140013022 | UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING - A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O. | 01-09-2014 |