Patent application number | Description | Published |
20090282319 | HIERARCHICAL DECODING APPARATUS - A decoder includes multiple decoder stages and a controller. The decoder stages perform decoding operations with respect to a received signal using corresponding different decoding algorithms. The controller determines whether the decoding operation performed by one of the decoder stages with respect to the received signal is successful, and controls the decoding operation of each of the other decoder stages in response to a result of the determination. | 11-12-2009 |
20090307566 | ITERATIVE DECODING METHOD AND APPARATUS - An iterative decoding method is disclosed and includes sequentially executing a number of iterative decoding cycles in relation to a parity check equation until the parity check equation is resolved, or a maximum number N of iterative decoding cycles is reached, during execution of the number of iterative decoding cycles, storing in a data buffer minimum estimated values for a set of variable nodes corresponding to a minimum number of bit errors, and outputting the minimum estimated values stored in the data buffer as a final decoding result when the number of iterative decoding cycles reaches N. | 12-10-2009 |
20100174959 | DECODING METHOD AND MEMORY SYSTEM DEVICE USING THE SAME - A decoding method includes performing a first decoding method and performing a second decoding method when decoding of the first decoding method fails. The first decoding method includes updating multiple variable nodes and multiple check nodes using probability values of received data. The second decoding method includes selecting at least one variable node from among the multiple variable nodes; correcting probability values of data received in the selected at least one variable node; updating the variable nodes and the check nodes using the corrected probability values; and determining whether decoding of the second decoding method is successful. | 07-08-2010 |