Patent application number | Description | Published |
20090190692 | LINEAR AND POLAR DUAL MODE TRANSMITTER CIRCUIT - Method and apparatus for configuring a transmitter circuit to support linear or polar mode. In the linear mode, a baseband signal is specified by adjusting the amplitudes of in-phase (I) and quadrature (Q) signals, while in the polar mode, the information signal is specified by adjusting the phase of a local oscillator (LO) signal and the amplitude of either an I or a Q signal. In an exemplary embodiment, two mixers are provided for both linear and polar mode, with a set of switches selecting the appropriate input signals provided to one of the mixers based on whether the device is operating in linear or polar mode. In an exemplary embodiment, each mixer may be implemented using a scalable architecture that efficiently adjusts mixer size based on required transmit power. | 07-30-2009 |
20100291888 | MULTI-MODE MULTI-BAND POWER AMPLIFIER MODULE - A multi-mode multi-band power amplifier (PA) module is described. In an exemplary design, the PA module includes multiple power amplifiers, multiple matching circuits, and a set of switches. Each power amplifier provides power amplification for its input signal when selected. Each matching circuit provides impedance matching and filtering for its power amplifier and provides a respective output signal. The switches configure the power amplifiers to support multiple modes, with each mode being for a particular radio technology. Each power amplifier supports at least two modes. The PA module may further include a driver amplifier and an additional matching circuit. The driver amplifier amplifies an input signal and provides an amplified signal to the power amplifiers. The additional matching circuit combines the outputs of other matching circuits and provides an output signal with higher output power. The driver amplifier and the power amplifiers can support multiple output power levels. | 11-18-2010 |
20100295629 | OUTPUT CIRCUIT WITH INTEGRATED IMPEDANCE MATCHING, POWER COMBINING AND FILTERING FOR POWER AMPLIFIERS AND OTHER CIRCUITS - An output circuit with integrated impedance matching, power combining, and filtering and suitable for use with power amplifiers and other circuits is described. In an exemplary design, an apparatus may include first and second circuits (e.g., power amplifiers) and an output circuit. The first circuit may provide a first single-ended signal and may have a first output impedance. The second circuit may provide a second single-ended signal and may have a second output impedance. The output circuit may include (i) first and second matching circuits that perform output impedance matching and filtering for the first and second circuits, (ii) a combiner (e.g., a summing node) that combines the first and second single-ended signals to obtain a combined single-ended signal, (iii) a third matching circuit that performs impedance matching and filtering for the combined single-ended signal, and (iv) switches to route the single-ended signals to different outputs. | 11-25-2010 |
20100327976 | INTEGRATED POWER AMPLIFIER WITH LOAD INDUCTOR LOCATED UNDER IC DIE - A compact integrated power amplifier is described herein. In an exemplary design, an apparatus includes (i) an integrated circuit (IC) die having at least one transistor for a power amplifier and (ii) an IC package having a load inductor for the power amplifier. The IC die is mounted on the IC package with the transistor(s) located over the load inductor. In an exemplary design, the IC die includes a transistor manifold that is placed over the load inductor on the IC package. The transistor(s) are fabricated in the transistor manifold, have a drain connection in the center of the transistor manifold, and have source connections on two sides of the transistor manifold. The IC die and the IC package may include one or more additional power amplifiers. The transistor(s) for each power amplifier may be located over the load inductor for that power amplifier. | 12-30-2010 |
20110018632 | POWER AMPLIFIER WITH SWITCHED OUTPUT MATCHING FOR MULTI-MODE OPERATION - Exemplary embodiments are directed to a transmitter with a power amplifier and a switched output matching circuit implementing a plurality of output paths for a plurality of operating modes is described. The power amplifier receives an input RF signal and provides an amplified RF signal. An output matching network performs impedance transformation from low impedance at the power amplifier output to higher impedance at the matching network output. The plurality of output paths are coupled to the output matching network. Each output path provides a different target output impedance for the power amplifier and routes the amplified RF signal from the power amplifier to an antenna when that output path is selected. Each output path may include a matching network coupled in series with a switch. The matching network provides the target output impedance for the power amplifier when the output path is selected. The switch couples or decouples the output path to/from the power amplifier. | 01-27-2011 |
20110032035 | AMPLIFIER MODULE WITH MULTIPLE OPERATING MODES - An amplifier module with multiple operating modes is described. In an exemplary design, the amplifier module includes an amplifier (e.g., a power amplifier), a switch, and an output circuit. The amplifier receives and amplifies an input signal and provides an amplified signal in a first mode. The switch is coupled to the output of the amplifier and bypasses the amplifier and provides a bypass signal in a second mode. The output circuit is coupled to the amplifier and the switch. The output circuit performs output impedance matching for the amplifier in the first mode. The output circuit also (i) receives the amplified signal and provides an output signal in the first mode and (ii) receives the bypass signal and provides the output signal in the second mode. The amplifier is enabled in the first mode and disabled in the second mode. | 02-10-2011 |
20110037516 | MULTI-STAGE IMPEDANCE MATCHING - Exemplary techniques for performing impedance matching are described. In an exemplary embodiment, the apparatus may include an amplifier (e.g., a power amplifier) coupled to first and second matching circuits. The first matching circuit may include multiple stages coupled to a first node and may provide input impedance matching for the amplifier. The second matching circuit may include multiple stages coupled to a second node and may provide output impedance matching for the amplifier. At least one switch may be coupled between the first and second nodes and may bypass or select the amplifier. The first and second nodes may have a common impedance. The apparatus may further include a second amplifier coupled in parallel with the amplifier and further to the matching circuits. The second matching circuit may include a first input stage coupled to the amplifier, a second input stage coupled to the second amplifier, and a second stage coupled to the two input stages via switches. | 02-17-2011 |
20110043285 | DIGITAL TUNABLE INTER-STAGE MATCHING CIRCUIT - A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a driver amplifier), a second active circuit (e.g., a power amplifier), and a tunable inter-stage matching circuit coupled between the first and second active circuits. The tunable inter-stage matching circuit includes a tunable capacitor that can be varied in discrete steps to adjust impedance matching between the first and second active circuits. In an exemplary design, the tunable capacitor includes (i) a plurality of capacitors coupled in parallel and (ii) a plurality of switches coupled to the plurality of capacitors, one switch for each capacitor. Each switch may be turned on to select an associated capacitor or turned off to unselect the associated capacitor. The tunable capacitor may further include a fixed capacitor coupled in parallel with the plurality of capacitors. | 02-24-2011 |
20110316636 | DIGITAL TUNABLE INTER-STAGE MATCHING CIRCUIT - A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus comprises a driver amplifier and a power amplifier. The apparatus may further include an inter-stage matching circuit tunable in discrete steps for matching impedances between the driver amplifier and the power amplifier. The tunable inter-stage matching circuit may include a bank of capacitors, each capacitor of the bank coupled in series with a switch for coupling the capacitor to a ground voltage. | 12-29-2011 |
20110316637 | AMPLIFIER MODULE WITH MULTIPLE OPERATING MODES - An amplifier module with multiple operating modes is described. In an exemplary design, an apparatus includes a plurality of amplifiers. The apparatus may also include a plurality of switches, each switch coupled to an output of an associated amplifier in the plurality of amplifiers and configured to provide an amplified signal in a first mode and bypass the associated amplifier and provide an associated bypass signal in a second mode. Further, the apparatus may include an output circuit including a plurality of matching circuits, each matching circuit coupled to an associated amplifier in the plurality of amplifiers and an associated switch in the plurality of switches. | 12-29-2011 |
20130095895 | MULTI-ANTENNA WIRELESS DEVICE WITH POWER COMBINING POWER AMPLIFIERS - A wireless device with power combining power amplifiers to support transmission on multiple antennas is disclosed. The power amplifiers may be operated together to obtain higher output power or separately to support transmission on multiple antennas. In an exemplary design, an apparatus includes first and second power amplifiers. The first power amplifier amplifies a first input signal and provides a first output signal for a first antenna in a first operating mode (e.g., a MIMO mode or a transmit diversity mode). The second power amplifier amplifies the first input signal or a second input signal and provides a second output signal for a second antenna in the first operating mode. The first and second power amplifiers are power combined in a second operating mode to provide a third output signal, which has a higher maximum output power than the first or second output signal. | 04-18-2013 |
20130187712 | IMPEDANCE MATCHING CIRCUIT WITH TUNABLE NOTCH FILTERS FOR POWER AMPLIFIER - An impedance matching circuit with at least one tunable notch filter for a power amplifier is disclosed. The power amplifier amplifies an input radio frequency (RF) signal and provides an amplified RF signal. The impedance matching circuit performs output impedance matching for the power amplifier and includes at least one tunable notch filter. Each tunable notch filter has a notch that can be varied in frequency to provide better attenuation of an undesired signal. The at least one tunable notch filter attenuates at least one undesired signal in the amplified RF signal. The at least one tunable notch filter may include (i) a first tunable notch filter to attenuate a first undesired signal at a second harmonic of the amplified RF signal and/or (ii) a second tunable notch filter to attenuate a second undesired signal at a third harmonic of the amplified RF signal. | 07-25-2013 |
20140246753 | HIGH QUALITY FACTOR INDUCTOR IMPLEMENTED IN WAFER LEVEL PACKAGING (WLP) - Some novel features pertain to a first example provides a semiconductor device that includes a printed circuit board (PCB), asset of solder balls and a die. The PCB includes a first metal layer. The set of solder balls is coupled to the PCB. The die is coupled to the PCB through the set of solder balls. The die includes a second metal layer and a third metal layer. The first metal layer of the PCB, the set of solder balls, the second and third metal layers of the die are configured to operate as an inductor in the semiconductor device. In some implementations, the die further includes a passivation layer. The passivation layer is positioned between the second metal layer and the third metal layer. In some implementations, the second metal layer is positioned between the passivation layer and the set of solder balls. | 09-04-2014 |