Atila
Atila Ersahin, Fremont, CA US
Patent application number | Description | Published |
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20120319713 | AUTOMATIC PROBE CONFIGURATION STATION AND METHOD THEREFOR - A probe system for facilitating the inspection of a device under test. System incorporates a storage rack; a probe bar gantry assembly; a probe assembly configured to electrically mate the device under test; and a robot system for picking the probe assembly from the storage rack and deliver the probe assembly to the probe bar gantry. The robot system is also enabled to pick a probe assembly from the probe bar gantry and deliver the probe assembly to the storage rack. The probe assembly includes a clamping assembly for attaching the probe assembly to the probe bar gantry or the storage rack. The probe assembly may include an array of contact pins configured to mate with conductive pads on the device under test when the probe assembly is installed on the probe bar gantry assembly. | 12-20-2012 |
Atila Mertol, Cupertino, CA US
Patent application number | Description | Published |
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20090030660 | METHOD AND APPARATUS FOR GENERATING FULLY DETAILED THREE-DIMENSIONAL ELECTRONIC PACKAGE AND PCB BOARD MODELS - A process is provided, which includes receiving geometrical information for a plurality of layers of an electronic structure within at least one output data file from an electronic structure design tool. At least one numerical analysis data file is created from the output data file, which contains the geometrical information and has a file structure compatible with a numerical analysis tool for characterizing the electronic structure. The numerical analysis tool is used to read the numerical analysis data file and generate a three-dimensional meshed geometric model of the electronic structure from the numerical analysis data file, wherein the model includes three-dimensional geometric models of each layer. The model can then be used, for example, to solve numerical thermal, mechanical or electrical equations that are applied to the model. | 01-29-2009 |
20100142155 | Preferentially Cooled Electronic Device - Various apparatuses and methods for a preferentially cooled electronic device are disclosed herein. For example, some embodiments provide an electronic apparatus including a package substrate and with a semiconductor die electrically and thermally connected to the package substrate by a plurality of connection nodes. At least one thermal trace interconnects at least one subset of the plurality of connection nodes. At least one heat dissipation trace on the package substrate is connected to the at least one subset of the plurality of connection nodes. | 06-10-2010 |
Atila Mertol, Milpitas, CA US
Patent application number | Description | Published |
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20140124918 | THERMAL IMPROVEMENT OF INTEGRATED CIRCUIT PACKAGES - An integrated circuit package comprising an active semiconductor device layer and at least one heat-transfer semiconductor layer on the active semiconductor device layer. The heat-transfer semiconductor layer has a coefficient of thermal expansion that substantially matches a coefficient of thermal expansion of the active semiconductor device layer. | 05-08-2014 |