Patent application number | Description | Published |
20080272487 | SYSTEM FOR IMPLEMENTING HARD-METAL WIRE BONDS - A wire bond system including providing an integrated circuit die with a bond pad thereon, forming a soft bump on the bond pad, and wire bonding a hard-metal wire on the soft bump. | 11-06-2008 |
20080284038 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PERIMETER PADDLE - An integrated circuit package system is provided including forming a perimeter paddle having a first external interconnect extending therefrom, mounting an integrated circuit die over the perimeter paddle, connecting a second external interconnect and the integrated circuit die, and encapsulating the integrated circuit die and the perimeter paddle with the first external interconnect exposed. | 11-20-2008 |
20080315411 | INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING - An integrated circuit package system that includes: providing an electrical interconnect system including an inner lead-finger system and an outer lead-finger system; stacking a first device, a second device, and a third device between and over the electrical interconnect system; connecting the first device and the second device to the inner lead-finger system; and connecting the third device to the outer lead-finger system. | 12-25-2008 |
20090273062 | SEMICONDUCTOR PACKAGE HEAT SPREADER - A semiconductor heat spreader from a unitary metallic plate is provided. The unitary metallic plate is formed into a panel, channel walls, at least two feet, and at least one external reversing bend. The channel walls depend from the panel to define a channel between the channel walls and the panel for receiving a semiconductor therein. The feet extend from respective channel walls for attachment to a substrate. | 11-05-2009 |
20110012270 | INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit package system that includes: providing an electrical interconnect system including an inner lead-finger system and an outer lead-finger system; stacking a first device, a second device, and a third device between and over the electrical interconnect system; connecting the first device and the second device to the inner lead-finger system; and connecting the third device to the outer lead-finger system. | 01-20-2011 |
20110108970 | SEMICONDUCTOR FLIP CHIP PACKAGE HAVING SUBSTANTIALLY NON-COLLAPSIBLE SPACER AND METHOD OF MANUFACTURE THEREOF - A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has a spacer to maintain a separation between the die and the die paddle. Also, methods for making the package are disclosed. | 05-12-2011 |
20110147899 | INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING - A method of manufacturing an integrated circuit packaging system includes: providing an inner lead and an outer lead, the inner lead having an inner peripheral side with a non-linear contour; forming a bump contact, having a groove in and a mesa from the inner lead or the outer lead, the groove adjacent to the mesa; mounting a first device adjacent to the inner lead; connecting a second device to the mesa; and forming an encapsulation material over the first device, the inner lead, and the outer lead and covering the second device. | 06-23-2011 |
20140077364 | Semiconductor Device and Method of Forming Wire Studs as Vertical Interconnect in FO-WLP - A semiconductor device has a substrate and semiconductor die disposed over a first surface of the substrate. A wire stud is attached to the first surface of the substrate. The wire stud includes a base portion and stem portion. A bonding pad is formed over a second surface of the substrate. An encapsulant is deposited over the substrate, semiconductor die, and wire stud. A portion of the encapsulant is removed by LDA to expose the wire stud. A portion of the encapsulant is removed by LDA to expose the substrate. An interconnect structure is formed over the encapsulant and electrically connected to the wire stud and semiconductor die. A bump is formed over the interconnect structure. A semiconductor package is disposed over the encapsulant and electrically connected to the substrate. A discrete semiconductor device is disposed over the encapsulant and electrically connected to the substrate. | 03-20-2014 |