Patent application number | Description | Published |
20110197011 | STORAGE APPARATUS AND INTERFACE EXPANSION AUTHENTICATION METHOD THEREFOR - Degradation of data transfer performance is restrained during data transfer for minoring between first and second controllers. | 08-11-2011 |
20130111299 | NON-VOLATILE STORAGE SYSTEM COMPENSATING PRIOR PROBABILITY FOR LOW-DENSITY PARITY CHECK CODES | 05-02-2013 |
20130132641 | STORAGE SYSTEM AND CONTROL METHOD OF STORAGE SYSTEM - A storage system is provided with a plurality of nonvolatile semiconductor storage devices (hereafter referred to as semiconductor storage devices) and a storage controller that is coupled to the plurality of semiconductor storage devices and that provides an LU (logical unit) to an upper level apparatus. Each of the semiconductor storage devices is provided with a nonvolatile semiconductor storage medium (hereafter referred to as a semiconductor medium) and a medium controller that is a controller that is coupled to the semiconductor medium. In the case in which the medium controller receives a write command and a data unit from a storage controller, the medium controller writes the data unit to a physical storage region of a write destination of the semiconductor medium in accordance with the write command and updates the real write data amount information that is used for specifying a real write data amount that is a total amount of a data unit that is written to the semiconductor medium based on an amount of a data unit that has been actually written. The medium controller notifies the storage controller of the real write data amount information on a regular basis or on an irregular basis. The storage controller calculates a real write data amount of the LU based on the real write data amount information from each of the semiconductor storage devices. | 05-23-2013 |
20130238836 | SEMICONDUCTOR STORAGE DEVICE HAVING NONVOLATILE SEMICONDUCTOR MEMORY - A semiconductor storage device has a nonvolatile semiconductor memory comprised from multiple storage areas, and a controller, which is coupled to the nonvolatile semiconductor memory. The controller (A) identifies a storage area state, which is the state of a storage area, (B) decides, based on the storage area state identified in the (A), a read parameter, which is a parameter for use when reading data from a storage area with respect to a storage area of this storage area state, and (C) uses the read parameter decided in the (B) with respect to a read-target storage area and reads data from this read-target storage area. | 09-12-2013 |
20130262749 | STORAGE SYSTEM WITH FLASH MEMORY, AND STORAGE CONTROL METHOD - A storage system has: one or more flash memory chips, each of which has a storage region configured by a plurality of blocks; and a device controller that controls access to data corresponding to the storage regions of the flash memory chips. The device controller manages for each of the blocks the number of determination readings for determining read disturb on the basis of a read request with respect to data of each block from a higher-level device, and, when there is a block for which the number of determination readings becomes equal to or larger than a threshold represented as a standard indicating a predetermined state related to read disturb, transmits, to the higher-level device, notification information that includes information indicating that read disturb of the block enters the predetermined state. | 10-03-2013 |
20130311854 | SEMICONDUCTOR STORAGE DEVICE AND CONTROL METHOD OF NONVOLATILE MEMORY - A memory controller adds the redundant information that is used to correct an error for each of data of a predetermined length and stores the data into the nonvolatile memory in the case in which data is written to the nonvolatile memory, the memory controller reads data and the redundant information that has been added to the data from the nonvolatile memory in the case in which data is read from the nonvolatile memory, and the memory controller corrects an error based on the redundant information in the case in which the data includes an error. The memory controller stores data that is in a basic unit that is a unit of an error correction configured by the data of a predetermined length and the redundant information that is added to the data of a predetermined length into a plurality of predetermined pages in a dispersed manner. | 11-21-2013 |
20140189203 | STORAGE APPARATUS AND STORAGE CONTROL METHOD - A cache memory (CM) in which data, which is accessed with respect to a storage device, is temporarily stored is coupled to a controller for accessing the storage device in accordance with an access command from a higher-level apparatus. The CM comprises a nonvolatile semi-conductor memory (NVM), and provides a logical space to the controller. The controller is configured to partition the logical space into multiple segments and to manage these segments, and to access the CM by specifying a logical address of the logical space. The CM receives the logical address-specified access, and accesses a physical area allocated to a logical area, which belongs to the specified logical address. A first management unit, which is a unit of a segment, is larger than a second management unit, which is a unit of an access performed with respect to the NVM. The capacity of the logical space is larger than the storage capacity of the NVM. | 07-03-2014 |
20140304451 | COMPUTER SYSTEM AND MANAGEMENT SYSTEM - A storage system, which comprises multiple memory cells and a storage controller, wherein the storage controller manages cell mode information, which either directly or indirectly denotes the number of bits to be stored in multiple memory cells. The cell mode information can be changed in accordance with a request from a management system. | 10-09-2014 |