49th week of 2008 patent applcation highlights part 20 |
Patent application number | Title | Published |
20080297112 | SYSTEM AND METHOD FOR CHARGING A BATTERY - Described is a system and method for charging a battery. The system includes a processor powered by a battery; and a controller determining a remaining battery charge of the battery. The controller sets a first charge current to recharge the battery when the remaining battery charge is insufficient to operate the processor. The controller wakes the processor when the battery has been recharged so that the remaining battery capacity is sufficient to operate the processor. The processor negotiates for a second charge current to recharge the battery. The controller sets the second charge current when the processor successfully negotiated. | 2008-12-04 |
20080297113 | ELECTRIC POWER SUPPLY SYSTEM - An electric power supply system can determine a sharing ratio of an electric power so as to increase and decrease an output electric power supplied by an electric power generator in accordance with an output electric power value required for the electric power supply system, in a fuel cell following region where a frequency of a magnitude of the electric power is equal to or higher than a predetermined value in a frequency distribution of a magnitude of the electric power, and can determine the sharing ratio of the electric power so as to increase an output electric power supplied by an electricity storage device, in an assist region where the frequency is lower than a predetermined value in the frequency distribution, and can prevent an excess of discharging from an electricity storage device. | 2008-12-04 |
20080297114 | Charging Device Capable of Providing Backflow Current and Inrush Current Protection - A charging device capable of providing backflow current and inrush current protection includes a reception end for receiving a charging voltage, a rechargeable battery, and a dynamic protection unit coupled between the reception end and the rechargeable battery for controlling connection between the reception end and the rechargeable battery according to a control signal and connection condition between the reception end and the charging voltage. | 2008-12-04 |
20080297115 | Device Using Residual Energy of a Battery - Control means ( | 2008-12-04 |
20080297116 | Method for Ensuring Safe Use of a Battery Pack After Impact - A battery pack is disclosed. The battery pack includes a battery, an impact sensor, a processor and a memory. The impact sensor is capable of generating an impact signal in response to a detection of an impact on the battery pack. The processor is capable of generating impact information based on the impact signal, and processor continues to count a number of charging times to the battery after the generation of the impact information. The memory is capable of storing the impact information and the number of charging times. The processor can refer to the memory to deliver a control command to a battery charger so that the battery can only be charged up to an allowable charge capacity smaller than a full charge capacity after an occurrence of an impact when the battery pack is attached to the battery charger. The charging to the battery stops when the number of the counted charging times reaches a predetermined number of allowable charging times that is allowed after the generation of the impact information. | 2008-12-04 |
20080297117 | MODULATION CHARGING CIRCUITRY FOR BATTERY CHARGING - Circuitry for charging a battery includes a switch for coupling the power source to the battery. The switch is turned on and off in accordance with a periodic control signal including a plurality of periods. Each period includes a first duration during which the control signal is in a first state and a second duration during which the control signal is in a second state. The switch is turned on when the control signal is in the first state to couple the power source to the battery, and turned off when the control signal is in the second state to decouple the power source from the battery. Since the switch is periodically turned off while the battery is being charged, the average amount of heat generated by the switch is reduced, thereby preventing excessive thermal emission from the battery charging circuitry. | 2008-12-04 |
20080297118 | Battery charging circuit - A battery charging circuit includes a power supply circuit being connected via a switching element and a current-limiting resistor to a battery to subject the battery to a trickle charge, and a control circuit turning on and off the switching element on a given duty to subject the battery to the trickle charge by means of a pulsed charge. The control circuit includes an on-timing adjustment circuit detecting a battery voltage to control the duty of turning on and off the switching element. The on-timing adjustment circuit makes a duty ratio smaller in a state of a low battery voltage than in a state of a high battery voltage and turns on and off the switching element to perform the trickle charge by means of the pulsed charge. | 2008-12-04 |
20080297119 | FLUID-INDUCED ENERGY CONVERTER WITH CURVED PARTS - An energy converter for inducing membrane vibrations of a membrane when subject to a fluid flow, and converting the vibrations into another form of energy, such as electricity. The energy converter includes at least one flexible membrane, at least one electrical conductor and at least one magnetic field generator configured to apply a magnetic field to the at least one electrical conductor. One of the electrical conductor and the magnetic field generator is attached to the membrane and configured to move with the membrane. The other one of the electrical conductor and the magnetic field generator has a curved surface bending towards the membrane. When subject to a fluid flow, the membrane vibrates and creates a relative movement between the conductor and the magnetic field, which induces a current. | 2008-12-04 |
20080297120 | ELECTRONICALLY REDUNDANT SPACECRAFT POWER AND ATTITUDE CONTROL SYSTEM - An energy storage flywheel system for a spacecraft is implemented with an electronically redundant power and attitude control system. In particular, the system includes a plurality of flywheels, and a multi-channel processing module and a multi-channel power control module associated with each flywheel. Each multi-channel processing module includes a plurality of controllers that may be operated in either an active or a standby mode, and each multi-channel power control module includes a plurality of power control circuits that may also be operated in either an active or standby mode. | 2008-12-04 |
20080297121 | POWER SUPPLY APPARATUS, TEST APPARATUS, AND ELECTRONIC DEVICE - There is provided a power supply apparatus including a power supply section that supplies an output current to an external load, and a current control section that flows an electric current varying in a direction opposite to a supply current being supplied to the power supply section into a ground of the power supply section. | 2008-12-04 |
20080297122 | Advanced current-mode control for switched regulators - A voltage regulator includes an input connectable to a voltage source and an output connectable to a load. The voltage regulator includes an inductor coupled to the output, a switch between the input and the inductor, and a current control loop configured to control the duty cycle of the switch to regulate voltage at the output, wherein the duty cycle being based on both a peak and valley threshold level of current flowing through the inductor. | 2008-12-04 |
20080297123 | POWER LOSSES REDUCTION IN SWITCHING POWER CONVERTERS - Embodiments of the invention provide methods and apparatuses for concurrently eliminating or substantially reducing two or more switching losses in an inverter switching circuit. Embodiments of the invention concurrently reduce multiple types of switching losses under hard switching mode and soft switching mode for active switching devices and diodes. In one embodiment of the invention, the voltage across a switching device is substantially reduced during switch turn-off and/or turn-on time, and also maintained at a substantially reduced level throughout some or all of the tail current loss time of the switching device. The voltage reduction mechanism is implemented as a transformer circuit electrically serially implemented between the voltage source and the switching device. Other methods and apparatuses are also described. | 2008-12-04 |
20080297124 | Transmission method, apparatus and module - The invention is related to an apparatus configured to: monitor a power supply voltage and a transmission power need and adjust transmission power according to the power supply voltage and the transmission power need for prolonging operation time of an electronic device when the power supply voltage is at least the same as a predetermined limiting value set for a power supply voltage of the electronic device. | 2008-12-04 |
20080297125 | VOLTAGE REGULATOR, VOLTAGE REGULATING METHOD THEREOF AND VOLTAGE GENERATOR USING THE SAME - A voltage regulator and a voltage regulating method thereof and a voltage generator using the voltage regulator are disclosed by the present invention. The voltage regulator of the present invention uses a first switching unit and a second switching unit to respectively provide an operational transconductance amplifier (OTA) with different closed-loop feedback paths during a first period and a second period. In this way, an auto-zeroing unit is able to exactly store an input offset voltage presented between the inverting input terminal and the non-inverting input terminal of the OTA. | 2008-12-04 |
20080297126 | Combined type transformer and buck-boost circuit using the same - Combined type transformer includes: a transformer core; first and second coils provided with respect to the transformer core; first and second inductor cores provided around the first coil; and third and fourth inductor cores provided around the second coil. The transformer core and the first and second coils constitute a transformer, the first coil and the first and second inductor cores constitute a first inductor, and the second coil and the third and fourth inductor cores constitute a second inductor. | 2008-12-04 |
20080297127 | METHOD OF CONTROLLING A SWITCHED-MODE POWER SUPPLY HAVING A SINGLE INDUCTIVE ELEMENT AND SEVERAL OUTPUTS, AND CORRESPONDING POWER SUPPLY, IN PARTICULAR FOR A CELLULAR MOBILE TELEPHONE - The switched-mode power supply includes a switching cell having an inductive element with two connections and several individually selectable outputs, and in which the two connections of the inductive element are joined respectively to at least two of the individually selectable outputs. It is thus possible to generate and regulate at least two different voltages, one positive and one negative. | 2008-12-04 |
20080297128 | SAMPLE AND HOLD SCHEME FOR A FEEDBACK NETWORK OF A POWER CONVERTER - One embodiment of the invention includes a system for regulating an output voltage of a power converter. The system comprises an error amplifier that compares a feedback voltage associated with the output voltage with a reference voltage to generate an error signal that is employed to control a magnitude of the output voltage. The system also comprises a plurality of sample and hold circuits each configured to sample an error amplifier output voltage to provide the error signal. The system further comprises a switching controller configured to control switching of the error amplifier output voltage between each of the plurality of sample and hold circuits in response to a change in an output load of the power converter. | 2008-12-04 |
20080297129 | HIGH-VOLTAGE POWER SUPPLY APPARATUS AND IMAGE FORMING APPARATUS EMPLOYING SAME - The voltage at a spurious frequency is decreased while maintaining as much as possible the voltage at a resonance frequency of a piezoelectric transformer, thus controlling a wide voltage range with a comparatively low cost configuration. A high-voltage power supply apparatus includes a piezoelectric transformer that outputs a highest voltage at a predetermined resonance frequency, and a generating unit that generates a signal that oscillates at a drive frequency that drives the piezoelectric transformer, throughout a frequency range that includes the resonance frequency. Furthermore, the high-voltage power supply apparatus includes an output terminal connected to the piezoelectric transformer, and a constant-voltage element inserted in a path that couples the piezoelectric transformer and the output terminal. | 2008-12-04 |
20080297130 | BANDGAP REFERENCE CIRCUITS - A bandgap reference circuit comprises: a current generator for generating an output current, the current generator comprising a first reference unit and a plurality of second reference units arranged in parallel, where the current generator is capable of determining the magnitude of the output current according to the reference units; a first resistor, coupled between a first terminal of the first reference unit and a node, for transmitting a first current; a second resistor, coupled to the node and a first terminal of each second reference unit, for transmitting a second current; a third resistor, coupled between the node and an output terminal of the bandgap reference circuit, for transmitting a third current; and a current-to-voltage converter, coupled to the third resistor, for generating a bandgap voltage according to the output current and the third current. | 2008-12-04 |
20080297131 | BANDGAP REFERENCE CIRCUIT - A bandgap reference circuit includes a reference current generator for respectively generating a first reference current on a first current path and a second reference current on a second current path, a current mirror for generating a third reference current on a third current path based on the first and second reference currents, an operation amplifier for rendering the first reference current substantially identical to the second reference current and a feedback circuit for rendering a node voltage on the first current path substantially identical to another node voltage on the third current path, so as to eliminate possible errors caused by a channel length modulation effect in the current mirror. | 2008-12-04 |
20080297132 | REFERENCE VOLTAGE GENERATOR AND VOLTAGE REGULATOR INCORPORATING SAME - A reference voltage generator includes a first field effect transistor with n-type heavily doped gate structure and a second field effect transistor with p-type heavily doped gate structure. The first transistor is configured to have a gate and a substrate gate connected to ground, one terminal connected to a voltage supply, and another terminal connected to an output node. The second transistor is configured to have a gate and one terminal connected to the output node, and a substrate gate and another terminal connected to ground. The output node outputs a given reference voltage when voltage is supplied from the voltage supply. A voltage regulator that generates a constant voltage based on a given reference voltage incorporates the reference voltage generator. | 2008-12-04 |
20080297133 | Dynamic Voltage Scaling for Packet-Based Data Communication Systems - A dynamic voltage scaling system for a packet-based data communication transceiver includes a constant voltage supply, a variable voltage supply, and a voltage control unit. The constant voltage supply is configured to supply a constant voltage to at least one parameter-independent function of the transceiver, and the variable voltage supply is configured to supply a variable voltage in accordance with a control signal to at least one parameter-dependent function of the transceiver. Parameter-independent transceiver functions perform operations independent of a predetermined parameter and parameter-dependent transceiver functions perform operations dependent on the predetermined parameter The voltage control unit is configured to generate the control signal based on information provided by at least one parameter-independent transceiver function about the predetermined parameter. | 2008-12-04 |
20080297134 | Circuit For Transmitting an Amplified Resonant Power to Load - A circuit for transferring amplified resonant power to a load is disclosed. The circuit transfers amplified resonant power, which is generated in an inductor of a conventional transformer when serial or parallel resonance of a conventional power supply is formed, to a load through the conventional transformer. The circuit comprises: a power supply for producing and supplying voltage or current; a power amplifier for generating amplified resonant power using the voltage or current; and a power transferring unit for transferring the amplified resonant power to the load using a transformer | 2008-12-04 |
20080297135 | Microarray bioprobe device integrated with an amplifier having bottom-gate thin film transistors - The present invention provides a microarray bioprobe device integrated with an amplifier having bottom-gate thin film transistors. The present invention utilizes a micro-electro-mechanical process as well as a semiconductor process to integrate microarray bioprobes and an amplifier having bottom-gate thin film transistors on a flexible substrate. As such, a signal obtained by the microarray bioprobes can be amplified nearby to improve the signal-to-noise ratio and impedance matching. The microarray bioprobes are formed on the flexible substrate such that the present microarray bioprobe device can be disposed to conform to the profile of a living body's portion so as to improve electrical contact between the bioprobes and the living body's portion. | 2008-12-04 |
20080297136 | SYSTEM AND METHOD TO DETECT, IN A VEHICLE, BLOCKAGE OF AN AIRFLOW PASSAGE TO A POWER STORAGE UNIT - A driver of a vehicle is alerted if an air passage from an air source to a battery becomes blocked. The determination as to whether the air passage is blocked may be based on the temperature of the battery, the airflow through the air passage, and the power to a fan used to move air through the air passage. | 2008-12-04 |
20080297137 | UNIVERSAL, WIRELESS, NANO-OPTICAL VOLTMETERS - A universal, wireless, nano-optical voltmeter comprises an organic core having at least one voltage-sensitive dye and at least one polymeric shell substantially surrounding the organic core. The nano-optical voltmeter can detect electric fields in cells. The nano-optical voltmeter allows three-dimensional E field profiling throughout the entire volume of living cells. The nano-optical voltmeter may be calibrated externally and then applied for E field determinations inside any live cell or cellular compartment, with no further calibration steps. | 2008-12-04 |
20080297138 | CURRENT SENSOR - An integrated circuit current sensor includes a lead frame having at least two leads coupled to provide a current conductor portion, and a substrate having a first surface in which is disposed one or more magnetic field sensing elements, with the first surface being proximate to the current conductor portion and a second surface distal from the current conductor position. In one particular embodiment, the substrate is disposed having the first surface of the substrate above the current conductor portion and the second surface of the substrate above the first surface. In this particular embodiment, the substrate is oriented upside-down in the integrated circuit in a flip-chap arrangement. The current sensor can also include an electromagnetic shield disposed between the current conductor portion and the magnetic field sensing elements. | 2008-12-04 |
20080297139 | Method and System for Digital Triggering for an Oscilloscope - An approach is provided for digital triggering a recording of one or more digitized signals on a digital oscilloscope by means of carrying out a level comparison for determining a triggering instant in each case between two successive sample values of a reference signal and a threshold values. According to the approach, at least one additional sample value of the reference signal is determined between two sequential samples of the reference signals by means of interpolation. | 2008-12-04 |
20080297140 | SYSTEM AND METHOD FOR TRANSFERRING TRAYS WITHIN A TEST HANDLER - A handler for handling semiconductor chips during a testing process includes a loading position at which packaged chips are loaded into a test tray, and an unloading position at which the packaged chips are unloaded from the test tray. The test tray follows a path through the handler from the loading position to the unloading position, and from the unloading position to the loading position. By separately performing the loading and unloading operations at these different positions within the handler, malfunctions in loading and unloading pickers that load and unload the chips may be reduced. Further, a malfunction in one picker performing one operation may be prevented from influencing operations of the other picker performing another operation. Additionally, collision between the loading picker and the unloading picker may be prevented. | 2008-12-04 |
20080297141 | MANIPULATOR FOR POSITIONING A TEST HEAD ON A TESTER - A manipulator for positioning a test head is provided with a positioning means by which the test head is three-dimensionally positionable and with a cradle to which the test head is securable and which is connected to the positioning means. The manipulator includes a compensator which can be loaded by the mass of the test head. The positioning means includes a column and at least one lead screw extending in the vertical direction. The compensator is connected to the cradle and can be moved by the lead screw in the vertical direction. The compensator includes a driver cooperating with the lead screw and is guided in the vertical direction on the column. The compensator has a spring element which is biased and supported by the driver. | 2008-12-04 |
20080297142 | CONTACT INSERT FOR A MICROCIRCUIT TEST SOCKET - A system for testing a microcircuit having a center ground (CG) terminal has an insert for electrically connecting the CG terminal with a ground contact on a load board. The insert is held within a housing having an aperture that includes at least one shelf facing toward the load board. The shelf interacts with a resilient projection on the insert to distort the projection. The projection's resilient distortion generates continual force pressing the insert against the load board. The continual force limits migration of debris created by the testing operations into the interface between the insert and the load board. | 2008-12-04 |
20080297143 | Magnetic Encoder and Wheel Bearing Provided with the Same - The density of a multipolar magnet in this type of magnetic encoder, in particular, a multipolar magnet composed of a sintered compact, is made uniform. | 2008-12-04 |
20080297144 | Method and Device for Measuring the Separation Between Vehicles - Device for measuring the separation, between any vehicle of a number of vehicles and the preceding vehicle along a stretch and for a direction, includes a reference conductor and a measuring conductor, along the stretch, the latter including a number of serial separate sections. Each section is electrically-connected to the previous section, via a diode. A constant current generator is provided in each vehicle, whose contacts are each connected to a section of the measuring conductor, corresponding to the position of the vehicle and to the reference conductor, via first and second moving contacts. Each second electric contact is connected to a segment, following the section, lying behind the first electrical contact, the direction of travel, via a corresponding third moving electrical contact. The contacts of the constant current generator form an output, which provides a voltage signal correlated to the distance between the relevant vehicle and the previous vehicle. | 2008-12-04 |
20080297145 | Increasing the working gap in a magnetic sensor with an auxiliary field - The invention relates to a sensor system ( | 2008-12-04 |
20080297146 | COMPONENT FOR INPUT OPERATION - A left-side ring magnet and a right-side ring magnet are fastened to a roller-shaped operation part, circumferentially displaced from each other by a certain angle. Magnetic variation generated by rotation of the magnets is detected by a magnetism detection element. Additionally, a left-side stationary magnet and a right-side stationary magnet, with the same magnetic pole, are annexed correspondingly to the left-side ring magnet and the right-side ring magnet, respectively, so that the stationary magnets are arranged with the same proximal arrangement relative to the ring magnets, respectively. With such a structure, two attractive and repulsive forces between the left-side ring magnet and the left-side stationary magnet; and between the right-side ring magnet and the right-side stationary magnet are totally exerted on the operation part, thereby providing a sharp, clear click touch during rotation. | 2008-12-04 |
20080297147 | SENSOR DEVICE - A sensor device for detecting a relative movement including a transmitter unit configured to generate a field. The transmitter unit includes first transmitter elements and second transmitter elements, wherein the first transmitter elements and the second transmitter elements, configured to generate a spatially varying field, are arranged alternately one behind another along a line at predetermined positions, and at a reference position, which corresponds to at least one of the predetermined positions of a first or second transmitter element along the line, at least one value of the field is altered by a positive factor with respect to a corresponding other position of a first or second transmitter element. Furthermore, a pick-up unit is configured to generate an alternating output signal depending on the field generated by the first and second transmitter elements, wherein the transmitter unit and the pick-up unit can be moved relative to one another. | 2008-12-04 |
20080297148 | DEVICE FOR NON-DESTRUCTIVE EDDY CURRENT INSPECTION OF A HOLE FORMED IN A CONDUCTIVE PART - Using eddy currents to inspect a hole that is possibly not rectilinear and/or of section that is not circular. The inspection device comprises a stick shaped and dimensioned to be capable of being engaged in said hole, at least one arm hinged to a support fastened to one end of the stick, an eddy current sensor being embedded in said arm, and resilient means for urging the arm outwards against the inside surface of the hole. | 2008-12-04 |
20080297149 | IDENTIFICATION OF POINTS OF INTEREST IN A REGION OF THE SURFACE OF A PART AND APPLICATION TO THE OPTIMIZATION OF THE PATH AND OF THE ANGULAR POSITION OF EDDY CURRENT PROBES - The invention relates to the identification of points of interest in a region of the surface of a part, by bringing a surface reference into intimate contact with said region, said surface reference consisting of a thin film sufficiently flexible to conform to the region, the thin film supporting tracks made of electrically conductive material, the passage of an eddy current probe over a track delivering a significant signal representative of the track, this representative signal corresponding to a point of interest thus identified in said region. | 2008-12-04 |
20080297150 | ARRANGEMENT FOR MAGNETIC FIELD MEASUREMENT - The invention concerns an arrangement for magnetic field measurement of a measurement object (in particular a gradient coil in a magnetic resonance apparatus) with a magnetic field sensor that is designed to measure a magnetic field of the measurement object and with a measurement mechanism on which the magnetic field sensor is arranged at a first position. The measurement object has detectable reference points that can be used for calibration of a spatial position of a position sensor. The calibrated position sensor is arranged at a second position of the measurement mechanism, such that, with the first position and the second position, a spatial position relative to the measurement object can be associated with each magnetic field strength that is measured by the magnetic field sensor. | 2008-12-04 |
20080297151 | MRI phantom and MRI system - It is intended to provide a Magnetic Resonance Imaging (MRI) phantom for | 2008-12-04 |
20080297152 | SYSTEM AND METHOD OF PARALLEL IMAGING WITH CALIBRATION TO A SEPARATE COIL - An RF coil assembly includes a plurality of RF source coils and an RF target coil separate from the plurality of RF source coils. A computer is programmed to acquire MR data of an imaging object from each of the plurality of RF source coils and to acquire MR data of the imaging object from the RF target coil. The computer is further programmed to calculate a set of weights based on a relationship between MR data acquired from each RF source coil and MR data acquired from the RF target coil and to reconstruct an image based on an application of the set of weights to at least a portion of the MR data acquired from each of the plurality of RF source coils. | 2008-12-04 |
20080297153 | Magnetic resonance imaging apparatus and magnetic resonance imaging method - A method includes collecting data for average units including acquisition of template data and acquisition of imaging data, calculating a frequency difference between a resonant frequency in a reference average unit and a resonant frequency of an object average unit based on a phase variation of the magnetic field in a period where the template data is collected in the reference average unit and a phase variation of the magnetic resonance signal in a period where the template data is collected in the object average unit, correcting a phase shift produced in image data collected in the object average unit constituted by one or more average units based on the frequency difference, and reconstructing an image concerning the subject based on the imaging data collected in the reference average unit and the corrected imaging data concerning the object average unit constituted by one or more average units. | 2008-12-04 |
20080297154 | MAGNETIC FIELD COIL AND MAGNETIC RESONANCE IMAGING APPARATUS - Provided is an RF coil which can highly efficiently and uniformly irradiate a RF magnetic field having two or more magnetic resonance frequencies close to each other, and receive magnetic resonance signals of two or more magnetic resonance frequencies close to each other with high sensitivity and uniform sensitivity profile in an MRI apparatus. Two or more frequencies to which the coil is tuned are adjusted so as to be between resonance frequencies of series resonant circuits constituting the RF coil. | 2008-12-04 |
20080297155 | ARRANGEMENT TO CONTROL ANTENNA ELEMENTS - An arrangement to control an antenna arrangement in a magnetic resonance examination representatively has a device for signal splitting. This device has an input and a first input and a second output. A radio-frequency transmission signal is supplied at the input. The device for signal splitting has phase-shaping components with which the transmission signal supplied via the input is divided into a first transmission signal for the first output and a second transmission signal for the second output. A phase difference between the first transmission signal and the second transmission signal can be adjusted by the phase-shaping components. An antenna arrangement is provided that has a first and second connections and that is fashioned to radiate a circularly-polarized transmission signal as soon as the two transmission signals with a phase difference of | 2008-12-04 |
20080297156 | NMR Probe - An NMR probe permits measurements to be made with its inner coil without replacing the probe. The NMR probe has three coils disposed to surround a sample tube. An inner coil can resonate with the HF and LF. An intermediate coil can resonate with the HF and LF, and produces an RF magnetic field perpendicular to the RF field produced by the inner coil. An outermost coil can resonate at least at a lock frequency. The outermost coil produces an RF magnetic field which is perpendicular to the RF field produced by the intermediate coil but which is coincident in direction with the RF field produced by the inner coil. | 2008-12-04 |
20080297157 | DISCRETE MAGIC ANGLE TURNING SYSTEM, APPARATUS, AND PROCESS FOR IN SITU MAGNETIC RESONANCE SPECTROSCOPY AND IMAGING - Described are a “Discrete Magic Angle Turning” (DMAT) system, devices, and processes that combine advantages of both magic angle turning (MAT) and magic angle hopping (MAH) suitable, e.g., for in situ magnetic resonance spectroscopy and/or imaging. In an exemplary system, device, and process, samples are rotated in a clockwise direction followed by an anticlockwise direction of exactly the same amount. Rotation proceeds through an angle that is typically greater than about 240 degrees but less than or equal to about 360 degrees at constant speed for a time applicable to the evolution dimension. Back and forth rotation can be synchronized and repeated with a special radio frequency (RF) pulse sequence to produce an isotropic-anisotropic shift 2D correlation spectrum. The design permits tubes to be inserted into the sample container without introducing plumbing interferences, further allowing control over such conditions as temperature, pressure, flow conditions, and feed compositions, thus permitting true in-situ investigations to be carried out. | 2008-12-04 |
20080297158 | Gradiometric Directional Metal Detector - An implementation of a direction finding and magnetic nulling metal detector is provided. Some embodiments of the present invention provide for a metal detector having multiple resonant circuits and associated coils for transmitting a primary transmit signal, transmitting a magnetic nulling signal, and receiving a receive signal. A controller includes logic to process the generate the transmit signals and to process the received signal in order to determine a gradient vector along one or two dimensions, a depth and whether or not a metal object is ferrous. | 2008-12-04 |
20080297159 | Sensing Apparatus for Detecting an Interface Between First and Second Strata of Materials - A sensing apparatus for detecting an interface between first and second materials, each have a different dielectric loss factor, disposed in a stratified manner in a volume of materials having a predetermined depth comprises a length of transmission line having an inner conductor surrounded by a dielectric material and a shielding conductor. The transmission line may be coaxial or planar in form. | 2008-12-04 |
20080297160 | Borehole Conductivity Simulator Verification and Transverse Antenna Balancing - A reactance is introduced into a flow path of axial currents in an induction logging tool. The reactance may be a capacitor or an inductor. A transmitter antenna is operated at a frequency defined by a cutoff frequency related to the reactance. | 2008-12-04 |
20080297161 | Method and Apparatus for Determining Formation Boundary Near the Bit for Conductive Mud - A method and apparatus for determining a parameter of interest of an earth formation during drilling of a borehole. A first toroidal coil antenna induces a current along a path that includes a bottomhole assembly and the formation. A second toroidal coil antenna disposed at the drillbit and oriented at a non-zero angle to the longitudinal axis of the bottomhole assembly measures an electrical signal resulting from the current, the electrical signal being a parameter of interest of the formations. | 2008-12-04 |
20080297162 | Electrical Instrument Platform for Mounting on and Removal from an Energized High Voltage Power Conductor - An apparatus for monitoring and measuring the electrical, thermal and mechanical operating parameters of high voltage power conductors. A toroidal shaped housing, which can be mounted onto an energized conductor, contains all of the necessary electrical instruments to monitor the parameters associated with the conductor. Moreover, the housing includes the processing capability to analyze disturbance and fault events based on these parameters. | 2008-12-04 |
20080297163 | METHOD FOR DETERMINING LOCATION OF PHASE-TO-EARTH FAULT - A method and apparatus for determining a location of a phase-to-earth fault on a three-phase electric line of an electric network, comprising determining, when the ratio of a fault current and load current has a first value, a first fault distance line which indicates an estimate of a distance of the fault from the measuring point in relation to an equivalent load distance, determining, when the ratio of the fault current and load current has a second value which differs from the first value, at least one second fault distance line, determining a distance at which the determined fault distance lines intersect when superimposed and determining the distance between the measuring point and the point of fault on the basis of the determined distance or distances of intersection. | 2008-12-04 |
20080297164 | WIRING ANALYZER ADAPTER - An adapter for connecting a wiring cable to be tested to a wiring analyzer. The adapter includes a body; a first set of contacts positioned on a first side of the body for electrically connecting with the wiring analyzer; and a second set of contacts positioned on a second side of the body and electrically connected to the first set of contacts for connecting with a connector on the cable to be tested. The first and second sides of the body are less than 4 inches apart so that the first set of contacts is positioned less than 4 inches from the second set of contacts. The body may include hanging structure for hanging the adapter on an interface of the wiring analyzer and a latch for securing the adapter to the interface. | 2008-12-04 |
20080297165 | TEST APPARATUS - A driver for supplying a test signal to a device under test is shared by a plurality of terminals. In this way, the cost and time required for the test of the device under test can be reduced. | 2008-12-04 |
20080297166 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device determining connection status between an output terminal connected to an output buffer and an external device, the semiconductor device including a test voltage generating circuit to generate test voltage for changing voltage of the output terminal, a connection detection determining circuit to compare voltage of the output terminal with reference voltage and to determine connection status of the external device based on the comparing result, and a compensation circuit generating simulation current where leak current generated at the output buffer is reproduced in a simulatory manner and compensating voltage change of the output terminal by the simulation current. | 2008-12-04 |
20080297167 | Functional parametric tester and emulator of electronic modules and PCB's - New electro-electronic equipment Functional Parametric Tester and Emulator of Electronic Modules and PCB's. The Functional Parametric Tester and Emulator of Electronic Modules and PCB's is an equipment that allows performance of functional and parametric testing in a great variety of electronic circuits, electronic modules or electronic systems. The equipment's main characteristic is the programming ease and flexibility due to the embedded software with Electronic Circuit Library, which is a set of electronic circuits that allows the emulation of a great variety of electronic systems and execution of various functional automated tests. | 2008-12-04 |
20080297168 | Methods and apparatus for testing one or more differential signaling channels for opens - In one embodiment, a method for testing a differential signaling channel having a differential pair of signal paths, and a pair of signal grounds bounding the differential pair, includes: causing positive and negative phases of a differential waveform to be driven over respective paths of the differential pair while monitoring a signal induced in a capacitive sense plate positioned adjacent to, and capacitively coupled to, all of the paths and grounds of the channel; when an amplitude of the monitored signal is within a first range, indicating to a user that there are no open defects in the differential signaling channel; and when the amplitude of the monitored signal falls within one or more second ranges, and not within the first range, indicating to the user that an open exists in the differential signaling channel. Other embodiments are also disclosed. | 2008-12-04 |
20080297169 | Particle Fraction Determination of A Sample - The present invention provides a device, test cards, methods and kits which are useful for determining the particle fraction and rate of viscosity of a fluid sample, the presence of an analyte in a fluid sample, or the aggregation of particles in a fluid sample to detect an analyte or as an immunologic assay. | 2008-12-04 |
20080297170 | DYNAMIC INDUCTANCE MEASUREMENT OF ELECTRIC MOTOR - A system, apparatus, and method for dynamic measurement of inductance trend of a motor are disclosed. In one of the embodiment herein the system is configured to acquire inputs from the DUT using a Trigger system, a horizontal subsystem and the programming unit. The system is also configured to process such information for dynamic analysis and representation on an interface provided in the system based on different step sizes. | 2008-12-04 |
20080297171 | TRANSCEIVER SYSTEM THAT ESTIMATES A VOLTAGE STANDING WAVE RATIO - A transceiver system and method determining a voltage standing wave ratio (VSWR) is provided. The system includes at least one amplifier, a filter bank, a plurality of detectors, and at least one processor. The at least one amplifier receives an input signal. The filter bank is in electrical communication with the at least one amplifier. The plurality of detectors are in electrical communication with the filter bank, where a first detector of the plurality of detectors is in electrical communication with a first portion of the filter bank, and a second detector of the plurality of detectors is in electrical communication with a second portion of the filter bank. The at least one processor is in electrical communication with the plurality of detectors, and estimates a VSWR based upon voltages detected by the first and second detectors. | 2008-12-04 |
20080297172 | Method for Measuring the Noise Figure of a Device Under Test with a Network Analyser - A method for measuring the noise factor (F | 2008-12-04 |
20080297173 | SYSTEM AND METHOD FOR MEASURING CONDUCTIVITY OF FLUID - A system and related method are provided to calibrate for wire capacitance during use to minimize error in conductivity measurement of the target fluid. The system includes a signal generator configured to drive the conductivity cell and the temperature element, with an alternative current (AC) drive signal having variable parameter. The system further includes a processor assembly electrically coupled to the conductivity cell and the temperature element to calculate a conductivity value of the fluid. The conductivity value is a function of the values of the temperature measurement, the compensation measurement, and the raw conductivity measurement, thereby compensating the conductivity value for capacitance effects. In this manner, the system effectively compensates for capacitance attributable to wiring extending between the electrode and other electronics of the sensor, usable with wiring of varied and unknown lengths. | 2008-12-04 |
20080297174 | Capacitive sensing devices - A capacitive sensing device comprises a set of sensing elements disposed in a two-dimensional arrangement. The two-dimensional arrangement is comprised of full elements and partial elements. A plurality of the partial elements are proximate at least one edge of the two-dimensional arrangement. Additionally, a partial element of the partial elements is smaller in element area than a full element of the full elements. An edge electrode trace of the capacitive sensing device is comprised of a selectively coupled plurality of the partial elements. The selectively coupled plurality of the partial elements resides proximate a first edge of the two-dimensional arrangement. | 2008-12-04 |
20080297175 | APPARATUS AND METHOD FOR MEASURING CAPACITANCE TO GROUND OF CONDUCTOR - Apparatus and method for measuring the capacitance to ground of a conductor are disclosed. The apparatus includes at least three switching elements, a voltage measurement circuit, and a controller. Two terminals of a first switching element are connected respectively to a distal terminal of a sample capacitor and a first voltage. Two terminals of a second switching element are connected respectively to a proximal terminal of the sample capacitor and a second voltage. Two terminals of a third switching element are connected respectively to the proximal terminal and the first voltage. The proximal terminal is directly electrically connected to one conductor end. The conductor has an unknown capacitance to ground representative of an object to be sensed. The change in the capacitance of the unknown capacitance capacitor can be determined and a proximity or contact of the object can thus be sensed by using the above apparatus and method. | 2008-12-04 |
20080297176 | Capacitive Sensor and Method for Manufacturing the Same - The present disclosure relates to a capacitive sensor film ( | 2008-12-04 |
20080297177 | Method for servicing an apparatus for capacitive ascertaining and/or monitoring of a process variable - The invention relates to a method for servicing, especially checking, an apparatus for capacitive ascertaining and/or monitoring at least one process variable of a medium, wherein the apparatus has at least one probe unit ( | 2008-12-04 |
20080297178 | DEVICE AND METHOD FOR DETECTING SULFUR DIOXIDE AT HIGH TEMPERATURES - The present invention relates to a method for selectively detecting and/or measuring gaseous SO | 2008-12-04 |
20080297179 | MULTILAYER MANUFACTURING FOR CONDUCTIVITY SENSOR - A contacting-type conductivity sensor is provided. A first insulating layer has a proximal surface to contact a liquid sample, and an opposite, distal surface. A plurality of electrodes is disposed on the proximal surface of the first insulating layer. Each of a plurality of conductive vias is electrically coupled to a respective one of the plurality of electrodes, where each via defines a conductive path from the proximal surface to the distal surface of the first insulating layer. A plurality of traces is disposed adjacent the distal surface of the first insulating layer, and each of the plurality of traces is electrically coupled to a respective one of the plurality of conductive vias. A plurality of conductors is provided where each conductor is electrically coupled to a respective one of the plurality of traces. A cover layer is coupled to the first insulating layer. | 2008-12-04 |
20080297180 | DEVICE FOR MEASURING METAL/SEMICONDUCTOR CONTACT RESISTIVITY - A device for measuring the resistivity ρ | 2008-12-04 |
20080297181 | Measuring Bridge Arrangement, Method of Testing a Measuring Bridge, Test Arrangement for Testing a Measuring Bridge, Method of Producing a Tested Measuring Bridge Arrangement, and Computer Program - A measuring bridge arrangement has a measuring bridge with a first supply terminal and first and second measuring signal terminals. The measuring bridge arrangement has a working point adjustment circuit formed to feed the measuring bridge via at least the first supply terminal in a measuring state of operation, and to apply a signal to one of the measuring signal terminals in the test state of operation in order to bring the measuring bridge to a test working point different from a measuring working point in the measuring state of operation. The measuring bridge has a test tap, wherein a test signal dependent on resistive properties of at least one element of the measuring bridge can be tapped at the test tap of the measuring bridge. | 2008-12-04 |
20080297182 | SEMICODUCTOR TESTING DEVICE WITH ELASTOMER INTERPOSER - A novel device for testing semiconductor chips is disclosed. A benefit with all the embodiments described herein is that the device may experience zero (or near zero) nascent force. The device may be comprised of a printed circuit board (PCB) that has at least one PCB piercing structure, a probe contactor substrate that has at least one substrate piercing structure, wherein the substrate piercing structure is electrically connected to a probe contactor, and an interposer that has at least one electrical via made of a conductive elastomer. When the PCB piercing structure and the substrate piercing structure pierce the elastomer, the PCB becomes electrically connected to the probe contactor. Instead of the piercing structure, the PCB or the probe contractor substrate may be adhered to the elastomer by an adhesive, such that the PCB becomes electrically connected to the probe contactor. The PCB piercing structure and the substrate piercing structure may include a flying lead wire, soldered pins or pressed pins. The adhesives may include, but are not limited to, screenable conductive surface mount adhesives. Finally, a diagnostic computer may be electrically connected to the PCB to assist in testing the semiconductor chips. | 2008-12-04 |
20080297183 | PROBE CARD HAVING COLUMNAR BASE PORTION AND METHOD OF PRODUCING THE SAME - A probe card includes a flat plate-shaped wiring board, a columnar base portion, and a thee-dimensional spiral contactor. The base portion is interposed between a wiring pattern of the wiring board and the bottom of the contactor. | 2008-12-04 |
20080297184 | SEMICONDUCTOR TEST APPARATUS - The present invention provides a semiconductor test apparatus that can reduce influence of noise in high-frequency measurement and that can be manufactured inexpensively by simplification of the constitution. A semiconductor test apparatus according to the present invention is one for use in an electrical test of a semiconductor wafer in which numerous integrated circuits each having electrode pads are incorporated. It comprises a probe card and a tester having a connection portion to the probe card. The probe card has numerous probes that can be connected to the electrode pads of the semiconductor wafer and a probe board having on one surface probe lands to which the probes are attached, having on the other surface tester lands corresponding to the probes, and having wiring paths each connecting the probe land and the tester land corresponding to each other. The tester is directly connected to the probe card as the connection portion contacts the tester lands. | 2008-12-04 |
20080297185 | Multi probe card unit, probe test device including the multi probe card unit, and methods of fabricating and using the same - A multi probe card unit, a probe test device including the multi probe card unit, and methods of fabricating and using the same are provided. The multi probe card unit may include at least one probe card including a first plurality of probes on a first surface of the at least one probe card and a second plurality of probes on a second surface of the at least one probe card. | 2008-12-04 |
20080297186 | MASSIVELY PARALLEL INTERFACE FOR ELECTRONIC CIRCUIT - Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. | 2008-12-04 |
20080297187 | LOCATION DEVICE FOR CONTACT PROBES - A location device for holding a number of probes is provided. The probes include a body, a first needle and a second needle respectively and coaxially disposed at opposite ends of the body. The location device includes a first support structure, a second support structure overlapping the first support structure and a number of through holes running through the first support structure and the second support structure. Each of the through holes includes a locating hole, a first aperture and a second aperture respectively disposed at opposite ends of and communicated with the locating hole and configured for respectively receiving the first, second needle of the probe. The first, second needle respectively extend out of the first, second aperture. The probes are clamped by the first, second support structure and located by the locating hole of the support device. | 2008-12-04 |
20080297188 | IC CHIP STRESS TESTING - Methods, systems and program products are disclosed for performing a stress test of a line in an integrated circuit (IC) chip. One embodiment of the method includes: applying a constant current I | 2008-12-04 |
20080297189 | MOBILITY MEASUREMENTS OF INVERSION CHARGE CARRIERS - A method and device for determining the quality of the interface surface between a layer of a dielectric material and the top surface of the semiconductor substrate are disclosed. In one aspect, the method comprises providing a semiconductor substrate with a top surface whereon a layer of a dielectric material is deposited thereby forming an interface surface, the surface of the layer of the dielectric material being or not in direct contact with the semiconductor substrate defining a top surface. A charge is then applied on a dedicated area of the top surface. A voltage Vs is measured on the top surface. The dedicated area is illuminated to define an illuminated spot. The photovoltage is measured inside and outside the determined illuminated spot during the illumination of the area. | 2008-12-04 |
20080297190 | SYSTEM AND METHOD FOR TESTING SEMICONDUCTOR DEVICE - According to an example embodiment, a semiconductor device test system includes a semiconductor device and a test apparatus. The semiconductor device includes a plurality of function blocks for performing predetermined functions at different operating speeds and a plurality of ports, each corresponding to a respective function block. The test apparatus is adapted to generate a plurality of signals with different frequencies corresponding to each of the operating speeds of the function blocks, to output a plurality of input test data to the ports in response to the signals, and to receive a plurality of output test data from the ports to determine if the semiconductor device is normal. | 2008-12-04 |
20080297191 | APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAY - The present system comprises a radiation tolerant programmable logic device having logic modules and routing resources coupling together the logic modules. Configuration data lines providing configuration data control the programming of the logic modules and the routing resources. Error correction circuitry coupled to the configuration data lines analyzes and corrects any errors in the configuration data that may occur due to a single event upset (SEU). | 2008-12-04 |
20080297192 | TECHNIQUES FOR OPTIMIZING DESIGN OF A HARD INTELLECTUAL PROPERTY BLOCK FOR DATA TRANSMISSION - Techniques are provided for implementing channel alignment for a data transmission interface in an HIP block on a programmable logic integrated circuit. The HIP block channel alignment logic can be run using a reduced number of parallel data paths, which consumes substantially less logic resources. Also, the HIP block channel alignment logic circuits can be processed at the higher HIP core clock rate in serial, decreasing lock latency time. Techniques are provided for implementing error handling for transmitted data in programmable logic circuits. The programmable logic circuits can be configured to implement error generation and error monitoring functions that are tailored for any application. Alternatively, the logic elements can be configured to perform other functions for applications that do not require error handling. The phase skew between data and clock signals on an integrated circuit are reduced by routing clock signals along with the data signals to each circuit block. | 2008-12-04 |
20080297193 | Techniques for Providing Calibrated On-Chip Termination Impedance - Techniques are provided for calibrating on-chip termination impedances on integrated circuits. An on-chip termination (OCT) calibration circuit generates calibration codes that selectively control the conductive states of a set of transistors coupled in parallel. The OCT calibration circuit selects a calibration code that causes the impedance of the transistors to be near a matching impedance. The selected calibration code controls an on-chip termination impedance at a pin. According to some embodiments, the OCT calibration circuit compares a signal from the transistors to two or more reference signals to improve the tolerance range of the calibrated on-chip termination impedance. According to other embodiments, the OCT calibration circuit selects a calibration code based on a signal from the transistors after an extra transistor is turned on by a control signal. The control signal is not used to control the on-chip termination impedance. | 2008-12-04 |
20080297194 | RECONFIGURABLE NETWORK COMPONENT LAYERS - A method for configuring an electronics device having reconfigurable network component layers is disclosed. The method selects a first group of pixels from at least one of the reconfigurable network component layers to form a network component on a substrate of the electronics device and activates the network component in at least one plane of the device substrate using a plurality of micro-electromechanical system (MEMS) switches adjacent to the first group of selected pixels. The method adjusts a first shape of the activated network component for the electronics device using the reconfigurable network component layers. | 2008-12-04 |
20080297195 | PROGRAMMABLE ROM - A programmable ROM includes first and second field effect transistors serially connected between first and second power source terminals, a third field effect transistor having a gate connected to a word line and used for data transfer between a first bit line and the drains of the first and second field effect transistors, fourth and fifth field effect transistors serially connected between the first and second power source terminals, and a sixth field effect transistor having a gate connected to the word line and used for data transfer between a second bit line and the drains of the fourth and fifth field effect transistors. The threshold voltages of the first and fourth field effect transistors are different from each other and the magnitude relation thereof is determined according to ROM data. | 2008-12-04 |
20080297196 | Element Controller for a Resilient Integrated Circuit Architecture - The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element controller, an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. The element controller controls the execution of data operations by the circuit element. Function assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation. | 2008-12-04 |
20080297197 | Efficient XOR Calculation - In one embodiment, an exclusive-OR (XOR) calculation circuit configured to XOR a plurality of N input signals ranging from a first signal to an Nth signal is provided. The calculation circuit includes: a plurality of logic circuits arranged from a first logic circuit to a last logic circuit, wherein each logic circuit is configured to receive two logical input signals and the complement of the two logical input signals and to provide an XOR output signal and an XNOR output signal, wherein the XOR output signal represents the XOR of its two input signals and the XNOR output signal represents an exclusive-NOT-OR (XNOR) of its two input signals, and wherein the first logic circuit receives two of the N input signals as its logical input signals, a second logic circuit receives another one of the N input signals and an XOR output signal from the first logic circuit as its logical input signals, and so on such that the last logic circuit receives a remaining one of the N input signals and an XOR output signal from a next-to-last logic circuit as its logical input signals. | 2008-12-04 |
20080297198 | Two-wire transmitter - A two-wire transmitter for receiving power supply from an external circuit through two transmission lines and also transmitting a current signal based on the measurement value of a sensor includes a current control section to which a voltage is supplied from an external circuit, for controlling the current value of the current signal based on an electric signal responsive to the measurement value of the sensor, if current consumption of the two-wire transmitter becomes smaller than the current value of the current signal, the current control section for charging and if the current consumption becomes larger than the current value of the current signal, the current control section for discharging; a computation control section for outputting the electric signal to the current control section and also outputting a setting signal based on predetermined computation processing information; a clock supply circuit for controlling the frequency of a clock signal based on the setting signal and supplying the clock signal to the computation control section; and a constant-voltage circuit for setting output voltage of the current control section to a predetermined voltage and supplying the voltage at least to the computation control section and the clock supply circuit. | 2008-12-04 |
20080297199 | ADJUSTABLE DRIVE STRENGTH APPARATUS, SYSTEMS, AND METHODS - Apparatus, methods, and systems are disclosed, such as those involving a multi-die device having a common bus to indicate a state of each of a die of a multi-die device and that provides the state of all of the dice at a common output. Such a multi-die device can comprise two or more dice in a multi-die package, wherein each of said dice has a first drive parameter when indicating a first state and a second drive parameter when indicating a second state. When the first drive parameter of the two or more dice is at a value such that when one or more of said two or more dice is in the first state, said common output can indicate that all of the dice in the multi-die device are in the first state. | 2008-12-04 |
20080297200 | Methods for eliminating phase distortion in signals - A circuit for reducing phase distortion of a first signal and a second signal is provided, wherein the first and the second signals are complementary. The circuit includes a detecting circuit for detecting a first edge of the first signal and a second edge of the second signal, wherein the second edge immediately follows the first edge and is in a same direction as the first edge; an output node; and a signal regenerator connected to the detecting circuit and the output node. The signal regenerator is configured to generate an output signal having an additional first edge and an additional second edge. The additional first edge and the additional second edge are opposite edges substantially aligned to the first edge and the second edge, respectively. The additional first edge and the additional second edge are immediate neighboring edges. | 2008-12-04 |
20080297201 | Complex switch control system - A complex switch control system including many switches, a switching voltage control circuit and a comparator is provided. The switching voltage control circuit converts an operating voltage into a switching voltage according to the states of the switches. The comparator compares the switching voltage with a reference voltage and outputs a switch state signal to a keyboard controller. A duty cycle of the switch state signal corresponds to the states of the switches. | 2008-12-04 |
20080297202 | SEMICONDUCTOR INTEGRATED CIRCUIT AND INFORMATION PROCESSING SYSTEM - In a semiconductor integrated circuit, a counter counts the number of high-speed clock signals that have been generated in a predetermined number of clock cycles of a low-speed clock signal. In synchronization with the low-speed clock signal, the semiconductor integrated circuit compares the counter value and a predetermined value, and judges whether the frequency of the high-speed clock signal has reaches a predetermined frequency. Since variations in the frequency become smaller as the oscillation of a high-speed oscillator stabilizes, the semiconductor integrated circuit detects that the oscillation is stable when the semiconductor integrated circuit has judged affirmatively a plurality of times. | 2008-12-04 |
20080297203 | CURRENT MIRROR CIRCUIT - A current mirror circuit including: a first resistance element having one terminal connected to a first potential, and the other terminal connected to a second potential lower than the first potential; an operational amplifier having a high-potential input terminal connected to the first potential and the one terminal of the first resistance element; a second resistance element having one terminal connected to a low-potential input terminal of the operational amplifier, and the other terminal connected to the second potential; and a transistor having a first electrode connected to an output terminal of the operational amplifier, a second electrode connected to the low-potential input terminal of the operational amplifier and the one terminal of the second resistance element, and a third electrode used as an output terminal, wherein the first and second resistance elements both start to operate from a linear area having lower voltage than a saturation area. | 2008-12-04 |
20080297204 | SEMICONDUCTOR INTEGRATED CIRCUIT - In a dynamic flip-flop circuit with a data selection function, for example, when data having an H value is selected using a selection signal, a first node N | 2008-12-04 |
20080297205 | SWITCH DE-BOUNCING DEVICE AND METHOD - A switch de-bouncing device includes a majority counter that counts samples generated by a sampler sampling a switch output where a counter value is incremented for each sample indicating a first switch state and decremented for each sample indicating a second switch state of the switch. A controller determines that the switch is in the first switch state when the counter value is above a first state threshold and is in the second switch state when the counter value is below a second state threshold. | 2008-12-04 |
20080297206 | Dc Offset Estimation - A Bluetooth® enhanced data rate receiver ( | 2008-12-04 |
20080297207 | DOUBLE DATA RATE TRANSMITTER AND CLOCK CONVERTER CIRCUIT THEREOF - A double data rate (DDR) transmitter and a clock converter circuit are provided. The clock converter circuit includes a first logic circuit and a second logic circuit. The first logic circuit receives a clock signal as a trigger signal, performs a sequential logic operation based on the clock signal, and outputs a result of the sequential logic operation. The second logic circuit is coupled to the first logic circuit. The second logic circuit performs a combinational logic operation based on the output of the first logic circuit and outputs a result of the combinational logic operation as a converted signal. The converted signal has the same waveform and frequency as those of the clock signal, and the phases of the clock signal and the converted signal are the same or only slightly different. | 2008-12-04 |
20080297208 | PROCESS FOR DITHERING A TIME TO DIGITAL CONVERTER AND CIRCUITS FOR PERFORMING SAID PROCESS - A process inserts a random noise in a Time to Digital Converter (TDC) designed for calculating the phase error between a first high frequency signal F | 2008-12-04 |
20080297209 | Circuits and Methods for Programmable Integer Clock Division with 50% Duty Cycle - Circuits and methods and for dividing a frequency of an input signal by an integer divider value. The circuit generally comprises (a) a first frequency divider, including a first plurality of serially connected delay elements receiving the input signal and a first configurable feedback network, (b) a second frequency divider, including a second plurality of serially connected delay elements receiving an inverse of the input signal and a second configurable feedback network (c) configurable logic configured to select and/or combine outputs of the first and second frequency dividers and to produce a frequency divided output signal, and (d) a programmable circuit configured to selectably configure the first and second configurable feedback networks and the configurable logic. The present invention advantageously provides for a frequency divider structure that can be easily programmed to provide any integer divide ratio with a 50% duty cycle. | 2008-12-04 |
20080297210 | CLOCK MULTIPLIER AND CLOCK GENERATOR HAVING THE SAME - A clock multiplier includes a phase-frequency detector, a voltage-current converter, a duty ratio control circuit, a plurality of variable delay cells and an edge combiner. The phase-frequency detector generates control signals. The voltage-current converter converts the control signals to generate first and second current control voltages. The duty ratio control circuit modifies the duty ratio of an input clock signal based on the first and second current control voltages. Each of the variable delay cells generates a triangular wave voltage based on the modified input signal, generates a square wave voltage based on the triangular wave voltage to generate a delay signal. The edge combiner generates a plurality of multiplied clocks based on the delay signals from the variable delay cells. | 2008-12-04 |
20080297211 | OPERATION MODE SETTING APPARATUS, SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME, AND METHOD OF CONTROLLING SEMICONDUCTOR INTEGRATED CIRCUIT - An operation mode setting apparatus includes an operation mode setting control unit that discriminates the phase of a reference clock from the phase of a feedback clock and generates a locking suspension signal, and an operation mode setting unit that generates a locking completion signal in response to a pulse signal and a phase comparison signal under the control of a reset signal and the locking suspension signal. | 2008-12-04 |