49th week of 2009 patent applcation highlights part 34 |
Patent application number | Title | Published |
20090296471 | MEMORY CELL OPERATION - Embodiments of the present disclosure provide methods, devices, modules, and systems for operating memory cells. One method includes: performing an erase operation on a selected group of memory cells, the selected group including a number of reference cells and a number of data cells; performing a programming monitor operation on the number of reference cells as part of the erase operation; and determining a number of particular operating parameters associated with operating the number of data cells at least partially based on the programming monitor operation performed on the number of reference cells. | 2009-12-03 |
20090296472 | FLASH MEMORY DEVICES AND METHODS OF PROGRAMMING THE SAME BY OVERLAPPING PROGRAMMING OPERATIONS FOR MULTIPLE MATS - A flash memory device is programmed by loading first data into a page buffer of a first mat. Second data is loaded into a page buffer of a second mat while programming the first data in a first memory block of the first mat. | 2009-12-03 |
20090296473 | Method of Forming an Integrated Circuit with NAND Flash Array Segments and Intra Array Multiplexers and Corresponding Integrated Circuit with NAND Flash Array Segments and Intra Array Multiplexers - The present invention provides an integrated circuit including N1 NAND flash array segments with N2 local bit lines, N1 intra array multiplexers and N2/2 global bit lines. Further, the present invention provides a method of producing an integrated circuit including N1 NAND flash array segments with N2 local bit lines, N1 intra array multiplexers and N2/2 global bit lines. | 2009-12-03 |
20090296474 | PROGRAM AND ERASE METHODS WITH SUBSTRATE TRANSIENT HOT CARRIER INJECTIONS IN A NON-VOLATILE MEMORY - The present invention describes a uniform program method and a uniform erase method of a charge trapping memory by employing a substrate transient hot electron technique for programming, and a substrate transient hot hole technique for erasing, which emulate an FN tunneling method for NAND memory operation. The methods of the present invention are applicable to a wide variety of charge trapping memories including n-channel or p-channel SONOS types of memories and floating gate (FG) type memories. the programming of the charge trapping memory is conducted using a substrate transient hot electron injection in which a body bias voltage Vb has a short pulse width and a gate bias voltage Vg has a pulse width that is sufficient to move electrons from a channel region to a charge trapping structure. | 2009-12-03 |
20090296475 | VERIFICATION PROCESS FOR NON-VOLATILE STORAGE - When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements. | 2009-12-03 |
20090296476 | Flash Memory Device and Method for Manufacturing the Same - A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge. | 2009-12-03 |
20090296477 | Nonvolatile Memory Devices Having Electromagnetically Shielding Source Plates - Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a semiconductor substrate including a cell array region, memory cell transistors disposed at the cell array region, bitlines disposed on the memory cell transistors, and a source plate disposed between the memory cell transistors and the bitlines to veil the memory cell transistors thereunder. | 2009-12-03 |
20090296478 | METHOD OF PROGRAMMING NONVOLATILE MEMORY DEVICE - In one aspect of the method of programming a nonvolatile memory device, memory cells selected for a program are determined to belong to a first memory cell group or a second memory cell group based on address information and a program command. According to this determination, to-be-programmed data are input based on information about the number of set data bits, and programming and verification are performed. | 2009-12-03 |
20090296479 | SEMICONDUCTOR MEMORY DEVICE - There are provided a first nonvolatile memory array including a plurality of nonvolatile memory elements which require an erase operation before a write operation, and a second nonvolatile memory array including a plurality of overwritable nonvolatile memory elements. A request to rewrite data is received by a control circuit. The control circuit writes data to be rewritten to the second nonvolatile memory array when the capacity of the data to be rewritten is not more than that of the second nonvolatile memory array. | 2009-12-03 |
20090296480 | CIRCUIT FOR GENERATING A VOLTAGE AND A NON-VOLATILE MEMORY DEVICE HAVING THE SAME - A circuit for providing a voltage, which includes a first voltage generating circuit to output a first voltage generated by dividing an input voltage on the basis of resistance rate varied in accordance with a first control signal, a second voltage generating circuit to output a third voltage by using a second voltage, where the third voltage is shifted in accordance with a temperature, a third voltage generating circuit to change the third voltage by using a voltage shift rate set in accordance with a level of an operation voltage to be outputted at the temperature, thereby outputting a fourth voltage, and a comparison amplifying circuit configured to output the operation voltage in accordance with the first voltage, the fourth voltage and resistance rate. | 2009-12-03 |
20090296481 | EEPROMS USING CARBON NANOTUBES FOR CELL STORAGE - An electrically erasable programmable read only memory (EEPROM) cell includes cell selection circuitry and a storage cell for storing the informational state of the cell. The storage cell is an electro-mechanical data retention cell in which the physical positional state of a storage cell element represents the informational state of the cell. The storage cell element is a carbon nanotube switching element. The storage is writable with supply voltages used by said cell selection circuitry. The storage is writable and readable via said selection circuitry with write times and read times being within an order of magnitude. The write times and read times are substantially the same. The storage has no charge storage or no charge trapping. | 2009-12-03 |
20090296482 | Non-volatile memory device and method of operation therefor - In one embodiment, the non-volatile memory device includes a plurality of normal memory cells, and at least one flag memory cell associated with one of the plurality of normal memory cells. A normal page buffer is configured to store data read from one of the plurality of normal memory cells. The normal page buffer includes a main latch storing the read data. A control circuit is configured to selectively change data stored in the main latch during a read operation based on a state of the flag memory cell. | 2009-12-03 |
20090296483 | NONVOLATILE MEMORY DEVICE WITH EXPANDED TRIMMING OPERATIONS - A nonvolatile memory device includes a trimming cell array storing trimming data for a plurality of operating modes, a trimming cell sense amplifier sensing the trimming data and a trimming cell latch storing the sensed trimming data. A plurality of trimming circuits performs trimming operations in response to a trimming control signals derived from trimming data. A single temporary trimming control logic unit receives externally provided control data and controls operation of a single summation circuit. The summation circuit controls the operation of the trimming circuits by respectively and selectively varying the trimming control signal provided to each one of the plurality of trimming circuits in response to the externally provided control data. | 2009-12-03 |
20090296484 | Apparatus for Generating A Voltage and Non-Volatile Memory Device Having the Same - An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal. | 2009-12-03 |
20090296485 | DIFFERENTIAL FLASH MEMORY PROGRAMMING TECHNIQUE - The invention relates flash memory programming techniques. An object of the invention is to provide a flash memory programming technique avoiding problems of the known state of the art and in particular, saving a significant amount of time during the development and/or production phases of any equipment containing flash memory devices and also saving time during an updating or upgrading procedure of such an equipment already being in use. Accordingly, the invention proposes for programming a flash memory device to program only differences in information between data already stored in the flash memory device and new data to be stored. | 2009-12-03 |
20090296486 | Memory device and memory programming method - Memory devices and/or memory programming methods are provided. A memory device may include: a memory cell array including a plurality of memory cells; a programming unit configured to apply a plurality of pulses corresponding to a program voltage to a gate terminal of each of the plurality of memory cells, and to apply a program condition voltage to a bit line connected with a memory cell having a threshold voltage lower than a verification voltage from among the plurality of memory cells; and a control unit configured to increase the program voltage during a first time interval by a first increment for each pulse, and to increase the program voltage during a second time interval by a second increment for each pulse. Through this, it may be possible to reduce a width of a distribution of threshold voltages of a memory cell. | 2009-12-03 |
20090296487 | INCREASING READ THROUGHPUT IN NON-VOLATILE MEMORY - Read throughput is increased in a non-volatile memory device by sensing storage elements which are of interest as soon as a word line voltage has propagated to them, but before the word line voltage has propagated to other storage elements which are not of interest. The delay which would be incurred by waiting for the voltage to propagate along the entire word line is avoided. The sensing can occur during programming, as a verify operation, or after programming, as where user data is read. Further, the storage elements may be sensed concurrently, e.g., via sense amplifiers. Data from the storage elements of interest is processed and data from the other storage elements is discarded. A time for sensing the storage elements of interest can be set by identifying which storage elements are being verified or include data which is requested by a read command. | 2009-12-03 |
20090296488 | High Speed Sense Amplifier Array and Method for Nonvolatile Memory - Sensing circuits for sensing a conduction current of a memory cell among a group of non-volatile memory cells being sensed in parallel and providing the result thereof to a data bus are presented. A precharge circuit is coupled to a node for charging the node to an initial voltage. An intermediate circuit is also coupled to the node and connectable to the memory cell, whereby current from the precharge circuit can be supplied to the memory cell. The circuit also includes a comparator circuit to perform a determination the conduction current by a rate of discharge at the node; a data latch coupled to the comparator circuit to hold the result of said determination; and a transfer gate coupled to the data latch to supply a result latched therein to the data bus independently of the node. This arrangement improves sensing performance and can help to eliminate noise on the analog sensing path during sensing and reduce switching current. | 2009-12-03 |
20090296489 | Non-Volatile Memory With Improved Sensing By Reducing Source Line Current - One or more sense amplifiers for sensing the conduction current of non-volatile memory is controlled by signals that are timed by a reference sense amplifier having similar characteristics and operating conditions. In one aspect, a sensing period is determined by when the reference sense amplifier sensing a reference current detects an expected state. In another aspect, an integration period for an amplified output is determined by when the reference sense amplifier outputs an expected state. When these determined timings are used to control the one or more sense amplifiers, environment and systemic variations are tracked. | 2009-12-03 |
20090296490 | NON-VOLATILE MEMORY DEVICE, COMPUTING SYSTEM AND WORDLINE DRIVING METHOD - A nonvolatile memory device including a memory cell; a word line coupled to the memory cell; a drive line; a switch coupled between the word line and the drive line, and configured to electrically connect the word line and the drive line; and a voltage generator coupled to the drive line and configured to charge the drive line to a precharge voltage. The precharge voltage is higher than a bias voltage applied to the word line during a corresponding operation on the memory cell. | 2009-12-03 |
20090296491 | MEMORY HAVING P-TYPE SPLIT GATE MEMORY CELLS AND METHOD OF OPERATION - A memory comprising a plurality of P-channel split-gate memory cells are organized in rows and columns. Each of the plurality of P-channel split-gate memory cells comprises a select gate, a control gate, a source region, a drain region, a channel region, and a charge storage layer comprising nanocrystals. Programming a memory cell of the plurality of P-channel split-gate memory cells comprises injecting electrons from a channel region of the memory cell to the charge storage layer. Erasing the memory cell comprises injecting holes from the channel region to the charge storage region. | 2009-12-03 |
20090296492 | METHOD FOR ERASING FLASH MEMORY - A method for erasing flash memory comprises the steps of: setting a critical ending condition; simultaneously erasing selected multiple sectors of the flash memory; stopping simultaneous erasing if one of the selected multiple sectors meets the critical ending condition; and erasing the remainder of each of the selected multiple sectors sequentially. | 2009-12-03 |
20090296493 | MID-SIZE NVM CELL AND ARRAY UTILIZING GATED DIODE FOR LOW CURRENT PROGRAMMING - A method of operating a non-volatile memory (NVM) cell structure that utilizes gated diode is provided. The cell architecture, utilizing about 4-10 um2 per bit, includes gated diodes that are used to program the cells while consuming low programming current. The cell architecture also allows a large number of cells to be programmed at the same time, thereby reducing the effective programming time per bit. Erase and read mode bias conditions are also provided. | 2009-12-03 |
20090296494 | PAGE-BUFFER AND NON-VOLATILE SEMICONDUCTOR MEMORY INCLUDING PAGE BUFFER - In one aspect a non-volatile memory device is provided which is operable in a programming mode and a read mode. The memory device includes a memory cell array which includes a plurality of non-volatile memory cells, a plurality of word lines, and a plurality of bit lines. The memory device further includes an internal data output line for outputting data read from the bit lines of the memory array, and a page buffer operatively connected between a bit line of the memory cell array and the internal data output line. The page buffer includes a sense node which is selectively connected to the bit line, a latch circuit having a latch node which is selectively connected to the sense node, a latch input path which sets a logic voltage of the latch node in the programming mode and the read mode, and a latch output path which is separate from the latch input path and which sets as logic voltage of the internal date output line according to the logic voltage of the latch node. | 2009-12-03 |
20090296495 | SYSTEM AND METHOD FOR CAPTURING DATA SIGNALS USING A DATA STROBE SIGNAL - A signal capture system and method is used to capture a data signal using a data strobe signal having a preamble of strobe signal transitions. The system includes a data latch circuit receiving the data signal. The data latch circuit is clocked by transitions of the data strobe signal to capture respective bits of data corresponding to the data signal. A decoder receives a memory command signal and generates a data start signal after a delay period from receiving the memory command signal if the command signal corresponds to a read or a write command. The receipt of read or write command signals is used by a control circuit to identify the start of valid read or write data signals. The control circuit then outputs the captured data signals responsive to the data start signal, thereby ignoring the transitions in the preamble of the data strobe signal. | 2009-12-03 |
20090296496 | METHOD AND CIRCUIT FOR TESTING A MULTI-CHIP PACKAGE - A method and circuit for testing a multi-chip package is provided. The multi-chip package includes at least a memory chip, and the memory chip includes a number of memory cells. The method includes performing a normal read operation on the memory cells to check if data read from the memory cells is the same with preset data in the memory cells; and performing a special read operation on the memory cells to check if data read from the memory cells is the same with an expected value, wherein the expected value is independent from data stored in the memory cells. | 2009-12-03 |
20090296497 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device comprises a logic circuit supplied with a first supply voltage; a cell array supplied with a second supply voltage higher than the first supply voltage and including plural mutually intersecting word lines and bit lines and plural memory cells connected at intersections thereof; and a word line driver operative to drive the word lines. The word line driver includes plural pull-up circuits connected between the supply terminal of the first supply voltage and the drive terminal of the word line and between the supply terminal of the second supply voltage and the drive terminal of the word line, and a pull-down circuit connected between the drive terminal of the word line and the ground terminal, and drives the word line with an intermediate voltage between the first and second supply voltages in accordance with a driving force ratio between the plural pull-up circuits at the time of driving the word line. | 2009-12-03 |
20090296498 | Memory access method and semiconductor memory device - A semiconductor memory device includes a memory cell array provided with blocks each having a plurality of memory cells arranged in columns and rows, a column selection circuit selecting a column via bit lines based on a column section signal, a word line driver circuit selecting a row via a word line based on a row selection signal and the column selection signal, and a write/read circuit writing data to and reading data from a selected memory cell via the bit lines based on a write and read switching signal. The selected memory cell is arranged at a position determined by the column selected by the column selection circuit and the row selected by the word line driver circuit within one block. Rows corresponding to the blocks are provided in common with the same number of word lines as the columns, and the memory cells arranged in one row within one block are coupled to mutually different word lines. | 2009-12-03 |
20090296499 | SEMICONDUCTOR MEMORY DEVICE INCLUDING A GLOBAL INPUT/OUTPUT LINE OF A DATA TRANSFER PATH AND ITS SURROUNDING CIRCUITS - A semiconductor memory device includes an input/output line of a data transfer path and its surrounding circuits, comprising a controller which generates a control signal corresponding to command and address input in read and write operation; and a repeater which selects any one of the plurality of bank groups as the control signal to control data transfer between the selected bank group and an input/output pad. | 2009-12-03 |
20090296500 | MEMORY CIRCUIT AND CONTROL METHOD THEREOF - A memory circuit having a global signal driving circuit, which, when a first read signal is inputted from a first bit signal line with a column signal inputted from a column signal line, outputs the first read signal as a global signal from a global signal line, and, when a first driving write signal is inputted from the first bit signal line, inhibits the first driving write signal from being outputted to the global signal line on the basis of a first write signal inputted from a first write signal line. | 2009-12-03 |
20090296501 | Method and Apparatus for Implementing Write Levelization in Memory Subsystems - Methods and apparatus for aligning a clock signal and a set of strobe signals are disclosed. In one embodiment, a memory controller includes a clock generator configured to generate the clock signal, and a respective strobe signal generator configured to generate each strobe signal. The memory controller further includes a phase recovery engine configured to receive an error signal from a corresponding memory device, wherein the error signal conveys an error indication indicative of an alignment of the strobe signal relative to the clock signal for each of a plurality of cycles of the strobe signal. The phase recovery engine includes an accumulator configured to maintain an accumulation value that depends upon the error indications for the plurality of cycles of the strobe signal. The strobe signal generator is configured to control a delay associated with generation of the strobe signal depending upon the accumulation value. | 2009-12-03 |
20090296502 | DEVICES, SYSTEMS, AND METHODS FOR INDEPENDENT OUTPUT DRIVE STRENGTHS - Methods, apparatuses and systems are disclosed for independently configurable data and strobe drivers within a memory device. A memory device may include at least one data driver and at least one strobe driver. The memory device may further include at least one mode register adapted to program a drive strength of the at least one data driver with a first plurality of control bits and a drive strength of the at least one strobe driver with a second plurality of control bits. | 2009-12-03 |
20090296503 | READ-LEVELING IMPLEMENTATIONS FOR DDR3 APPLICATIONS ON AN FPGA - Circuits, methods, and apparatus for transferring data from a device's input clock domain to a core clock domain. One example achieves this by using a retiming element between input and core circuits. The retiming element is calibrated by incrementally sweeping a delay and receiving data at each increment. Minimum and maximum delays where data is received without errors are averaged. This average can then be used to adjust the timing of a circuit element inserted in an input path between an input register clocked by an input strobe signal and an output register clocked by a core clock signal. In one example, an input signal may be delayed by an amount corresponding to the delay setting. In other examples, each input signal is registered using an intermediate register between the input register and the output register, where a clock signal is delayed by an amount corresponding to the delay setting. | 2009-12-03 |
20090296504 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF TESTING SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device may include a memory that stores data, an input/output unit and a loopback circuit. The input/output unit inputs and outputs data of a predetermined number of bits in synchronization with a clock signal. The input/output unit may include, but is not limited to, the same number of data input/output terminals as the predetermined number of bits. The loopback circuit performs loopback operation to read data of the predetermined number of bits out of a first optional area of the memory and to write the data into a second optional area of the memory. | 2009-12-03 |
20090296505 | Memory test method and memory test device - A memory test is performed by sequentially generating a number of n-bit addresses, whose first to k-th bits (1≦k≦n) are all set to one of two values, 0 or 1, and whose (k+1)th to n-th bits are all set to the other one of the two values, for all k's which range from 1 to n; writing first test data to each of the generated addresses in the memory; reading second test data from each of the addresses in the memory; and comparing the first test data with the second test data. | 2009-12-03 |
20090296506 | SENSE AMPLIFIER AND DATA SENSING METHOD THEREOF - A data sensing method for sensing storage data stored in a memory cell includes the steps of: biasing a sensing node and a reference node to a first voltage in response to a first control signal; discharging the sensing node and the reference node via the memory cell and a reference memory cell, respectively; enabling a latch circuit to amplify a voltage difference between the sensing node and the reference node. | 2009-12-03 |
20090296507 | Memory power delivery noise suppression - An operation voltage is provided to a memory system. The operation voltage provided to the memory system is adjusted during transient events of the memory system. | 2009-12-03 |
20090296508 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes a sense amplifier that receives a driving voltage through a sense amplifier power supply input terminal and detects and amplifies a difference between signals that are supplied to two input lines, a sense amplifier voltage supply unit that supplies a driving voltage and an overdriving voltage higher than the driving voltage to the sense amplifier through the sense amplifier power supply input terminal using a power supply voltage, and a driving voltage control unit that maintains a driving voltage level of the sense amplifier power supply input terminal in response to the level of the power supply voltage, after a voltage of the sense amplifier power supply input terminal is elevated to a power supply level responding to the overdriving voltage in order to perform the overdriving operation. | 2009-12-03 |
20090296509 | VOLTAGE REGULATOR CIRCUIT FOR A MEMORY CIRCUIT - A voltage regulator circuit for a memory circuit comprises a voltage divider, a capacitor, an active-mode voltage regulator and a standby-mode voltage regulator. The active-mode voltage regulator is always on while in active mode, and turned on whenever a refresh is requested. The standby-mode voltage regulator is periodically turned on while in standby mode, and turned on whenever a refresh is requested. In addition, the active voltage regulator uses stronger transistors than those used by the standby-mode voltage regulator, and both the active-mode voltage regulator and the standby-mode voltage regulator are coupled to the voltage divider and the capacitor. | 2009-12-03 |
20090296510 | Semiconductor memory device having refresh circuit and word line activating method therefor - A semiconductor memory device includes a memory cell array having at least one memory bank. The memory bank being divided into memory blocks such that the memory blocks have a block position including at least one edge memory block at an edge of the memory bank and at least one non-edge memory block. Each memory block includes a plurality of memory cells. Each memory cell associated with at least one bit line and at least one word line. The semiconductor memory device includes a refresh execution circuit configured to activate a less than or equal number of word lines one at a time during a refresh operation for the memory cells in the edge memory block as activated one at a time during a refresh operation for the memory cells in the non-edge memory block. | 2009-12-03 |
20090296511 | MICROPROCESSOR WITH PROGRAM-ACCESSIBLE RE-WRITABLE NON-VOLATILE STATE EMBODIED IN BLOWABLE FUSES OF THE MICROPROCESSOR - A microprocessor includes re-writeable non-volatile state (RNS) addressable by an instruction executed by the microprocessor that instructs the microprocessor to write a new value to the RNS. A plurality of fuses are each readable to determine whether the fuse is blown or unblown, in response to the microprocessor decoding the instruction. A Boolean logic unit performs Boolean operations on the values read from the plurality of fuses to determine a current RNS value. A fuse blowing device blows at least one unblown fuse to change the current RNS value to the new value when the new value is different than the current value. The microprocessor can read the plurality of fuses, perform the Boolean operations, and blow at least one unblown fuse to change the current value of the RNS to a new value multiple times in response to a program running on the microprocessor executing the instruction multiple times. | 2009-12-03 |
20090296512 | Apparatus for writing to mutiple banks of a memory device - In a multi-bank memory system such as a synchronous dynamic random access memory (SDRAM), a method of writing data to the banks is provided. This method allows for writing to any number of banks. More particularly, this method allows for writing to a selected number of banks between one and all banks. In addition, the method retains the discrete nature of the selected banks by allowing any row in each bank to be accessed regardless of the rows activated in other banks. As a result, rows of different memory banks that are intended to store similar data may be accessed simultaneously for purposes of writing the data in test and non-test modes. This allows for quicker writing to the SDRAM without the errors that may be created by other fast writing modes, such as data compression. | 2009-12-03 |
20090296513 | Semiconductor device and manufacturing method thereof - A semiconductor memory integrated circuit having an X-row controller which includes a high-speed-operation control circuit by which when receiving a bank active signal, a period for stopping a latch circuit from receiving the X address is produced after a predetermined time has elapsed, and in the other periods, the latch circuit receives and holds the X address; a low-current-operation control circuit by which when receiving no bank active signal, the latch circuit stops receiving the X address, and when receiving the bank active signal, the latch circuit holds the X address after a predetermined time has elapsed; a circuit for selecting whether the bank active signal is output to the high-speed-operation control circuit or the low-current-operation control circuit; and a circuit for selecting whether the latch-circuit control signal from the high-speed-operation control circuit or the latch-circuit control signal from the low-current-operation control circuit is output to the latch circuit. | 2009-12-03 |
20090296514 | METHOD FOR ACCESSING A MEMORY CHIP - The present invention provides a method for accessing a memory chip. The method includes: positioning a plurality of first input pins and a plurality of second input pins on the memory chip; respectively inputting a plurality of row address signals into the plurality of first input pins, where a length of a row address command package of each row address signal corresponds to a plurality of clock periods of a clock signal, and the row address command package includes a plurality of row input commands; and respectively inputting a plurality of column address signals into the plurality of second input pins, where a length of a column address command package of each column address signal corresponds to a plurality of clock periods of the clock signal, and the column address command package includes a plurality of column input commands. | 2009-12-03 |
20090296515 | FLUID MIXING APPARATUS, INTEGRATED FLUID MIXING APPARATUS, AND FLUID MIXING SYSTEM - A fluid mixing apparatus is constituted by a plurality of flow passageways for conveying fluids, respectively, and jet outlets, corresponding to and communicating with the flow passageways, respectively, for jetting the fluids therefrom so that movement directions of the fluids intersect each other to mix the fluids. The jet outlets are provided at a surface of a substrate in which the flow passageways are provided. At least one of the flow passageways communicating with at least one of the jet outlets has a center axis partially shifted from a center axis of at least one of the jet outlets so as to incline a movement direction of a fluid jetted from at least one of the jet outlets with respect to the surface of the substrate. | 2009-12-03 |
20090296516 | Dynamic Mixer - The dynamic mixer for mixing components in different volumetric amounts comprises a rotor housing ( | 2009-12-03 |
20090296517 | Auger for vertical mixer - A vertical mixer having an improved auger for mixing bulk material is disclosed herein. The vertical mixer comprises a mixing chamber for receiving the bulk material. The mixing chamber being defined by a floor and a peripheral wall and includes a door for allowing exit of mixed bulk material. The vertical auger in the mixing chamber has an auger post and flighting including a bottom flight. The bottom flight has a front leading edge and an outside edge defining an outside footprint of the bottom flight. A slide plate is connected to the bottom flight for guiding bulk material at least inwards towards the auger post. The slide plate comprises a front corner; a bottom edge; and a top edge opposite the bottom edge. The bottom edge has a portion closer to the auger post than the front corner, and a portion extending inward on the bottom flight away from the outside edge of the bottom flight. The slide plate extends from the bottom flight at a shallow angle β relative the floor of the mixing chamber. | 2009-12-03 |
20090296518 | Method of Marine Seismic Data Acquisition - A method of acquiring marine seismic data using an acoustic source to generate an acoustic signal, a portion of which is reflected at one or more subsurface formation interfaces as a seismic signal, includes: a) sailing a surface vessel along a sinusoidal sail line which lies over an area to be surveyed while towing one or more seismic streamers, each streamer including a plurality of hydrophones to receive the reflected seismic signals, where the streamer follows the sinusoidal sail line while seismic data is acquired. In one embodiment, the method further comprises b) dividing the area to be surveyed using a grid to form a plurality of bins; c) collating the seismic signals using the plurality of bins; and, d) repeating step a) to populate each bin with seismic data, where a range of offsets associated with each event varies between adjacent cross-line and in-line bins. | 2009-12-03 |
20090296519 | DETERMINING POSITIONING OF SURVEY EQUIPMENT USING A MODEL - To performing positioning of survey equipment, measurements of acoustic signals reflected from at least one boundary of a marine environment are received. The reflected acoustic signals are reflected from the at least one boundary in response to acoustic signaling originated by an acoustic source. A positioning model is updated based on the measurements of the acoustic signals, wherein the positioning model contains information relating to positions of components of a positioning system that includes the acoustic source and acoustic receiver | 2009-12-03 |
20090296520 | ACQUIRING NEAR ZERO OFFSET SURVEY DATA - To acquire near-zero offset survey data, a survey source and a first streamer attached to the survey source are provided, where the first streamer has at least one survey receiver. A second streamer separate from the survey source and the first streamer includes survey receivers. Near-zero offset data is measured using the at least one survey receiver of the first streamer. | 2009-12-03 |
20090296521 | NOISE REDUCTION IN PARTICLE MOTION SENSING SEISMIC STREAMER - An apparatus includes particle motion sensors and a streamer that contains the particle motion sensors. The streamer is to be towed in connection with a seismic survey, and the towing of the streamer produces a turbulent flow. The streamer includes an inner cable that contains the particle motion sensors and a fluid containing layer to surround the inner cable to reduce noise otherwise sensed by the particle motion sensors due to the turbulent flow. | 2009-12-03 |
20090296522 | METHOD AND SYSTEM FOR DELINEATING A SECOND WELLBORE FROM A FIRST WELLBORE - Disclosed herein is a method of delineating a second wellbore from a first wellbore. The method includes, emitting acoustic waves from a tool in the first wellbore, receiving acoustic waves at the tool reflected from the second wellbore, and determining orientation and distance of at least a portion of the second wellbore relative to the tool. | 2009-12-03 |
20090296523 | JOINTLY INTERPOLATING AND DEGHOSTING SEISMIC DATA - A technique includes representing actual measurements of a seismic wavefield as combinations of an upgoing component of the seismic wavefield and ghost operators. Interpolated and deghosted components of the seismic wavefield are jointly determined based at least in part on the actual measurements and the representation. | 2009-12-03 |
20090296524 | Converted Mode Seismic Survey Design - Method for designing a converted mode (PS or SP) seismic survey to accomplish specified vertical and lateral resolution objectives at target depth. An equation (181) is provided for determining the minimum bandwidth required for a desired vertical resolution at a selected scattering angle, as a function of incident and reflected wave velocities, one of which is the P-wave velocity and the other is the S-wave velocity. A second equation (182) is provided for determining migration acceptance angle from the desired vertical and lateral resolutions. Source and receiver apertures may then be determined by ray tracing. Finally, a third equation (183) is provided for the maximum bin size to avoid aliasing, given the migration acceptance angle and a maximum frequency needed to achieve the bandwidth requirement. Source and receiver spacing may then be based on the maximum bin size. | 2009-12-03 |
20090296525 | NOISE SUPPRESSION FOR DETECTION AND LOCATION OF MICROSEISMIC EVENTS USING A MATCHED FILTER - A method for determining presence of seismic events in seismic signals includes determining presence of at least one seismic event in seismic signals corresponding to each of a plurality of seismic sensors. A correlation window is selected for each of the plurality of seismic signals. Each correlation window has a selected time interval including an arrival time of the at least one seismic event in each seismic signal. Each window is correlated to the respective seismic signal between a first selected time and a second selected time. Presence of at least one other seismic event in the seismic signals from a result of the correlating. | 2009-12-03 |
20090296526 | ACOUSTIC TREATMENT APPARATUS AND METHOD THEREOF - An acoustic treatment apparatus obtains a first output signal by performing filtering for forming a directivity in a first direction for received sound signals of sound receivers, obtains a second output signal by performing filtering for forming a directivity in a second direction different from the first direction for received sound signals of sound receivers, obtains a strength ratio between a strength of the first output signal and a strength of the second output signal, and estimates a sound source direction on the basis of the strength ratio. | 2009-12-03 |
20090296527 | SYSTEM FOR MEASURING ACOUSTIC SIGNATURE OF AN OBJECT IN WATER - A system for measuring acoustic signature of a target object in water includes a plurality of rigid segments connected to each other to form a longitudinal member and a plurality of floats connected to the longitudinal member. Two buoys are connected at two ends of the longitudinal member and two weights are suspended from the buoys, thus making the longitudinal member neutrally buoyant when suspended in water. A plurality of hydrophones and an acoustic projector of a known source level are connected to the longitudinal member. The system further includes a data acquisition system for receiving signals from hydrophones and a signal processing means for processing signals received by data acquisition and determining acoustic signature of the target object. A depth/pressure sensor may be included. A pinger is located on the target object to measure range of target object to hydrophones. Range to target object is displayed in real time. | 2009-12-03 |
20090296528 | Thermoacoustic device - An apparatus includes an electromagnetic signal device, a medium, and a sound wave generator. The sound wave generator includes a carbon nanotube structure. The electromagnetic signal device transmits an electromagnetic signal to the carbon nanotube structure. The carbon nanotube structure converts the electromagnetic signal into heat. The heat transfers to the medium and causes a thermoacoustic effect. | 2009-12-03 |
20090296529 | PARTICLE MOTION VECTOR MEASUREMENT IN A TOWED, MARINE SEISMIC CABLE - A particle motion sensor, includes: a sensing element capable of sensing a particle motion vector from a change in position thereof, and a packing material in which the sensing element is positioned, wherein the particle motion sensor is symmetric about its longitudinal axis and has a center of gravity coincident with its volumetric center. An apparatus includes a streamer; a plurality of acoustic sensors distributed along the streamer; and a plurality of particle motion sensors distributed along the streamer, at least one particle motion sensor being symmetric about its longitudinal axis and having a center of gravity coincident with its volumetric center. | 2009-12-03 |
20090296530 | Radio-Controlled Adjustment Timepiece - A start date and an end date of a daylight saving time input by a user is stored in the daylight saving time information storage unit ( | 2009-12-03 |
20090296531 | Methods of Calibrating a Clock Using Multiple Clock Periods with a Single Counter and Related Devices and Methods - A method of calibrating a first clock signal using a second clock signal and a plurality of calibration periods may include generating incremented counter values at a counter responsive to edges of the second clock signal. For at least two of the plurality of calibration periods, an initial incremented counter value from the counter may be stored in memory at an initial edge of the first clock signal for the respective calibration period, a final incremented counter value may be stored in memory at a final edge of the clock signal for the respective calibration period, and the at least two of the plurality of calibration periods may be overlapping with different initial and final edges of the first clock signal. For each of the plurality of calibration periods, a number of edges of the second clock signal occurring during the respective calibration period may be determined using the initial and final incremented counter values stored in memory. A relationship between the first and second clock signals may be determined using a sum of a number of edges of the second clock signal occurring during each of the plurality of calibration periods and using a sum of a number of first clock signal cycles occurring during each of the plurality of calibration periods. | 2009-12-03 |
20090296532 | High-Resolution Circular Interpolation Time-To-Digital Converter - A time-to-digital converter includes a circular delay chain, a phase interpolator, and a time-to-digital (TDC) core. The circular delay chain receives a first input clock and generates a first set of multi-phase clocks by propagating the first input clock through delay cells in the delay chain. The phase interpolator performs phase interpolation with a second input clock and another clock to generate a second set of multi-phase clocks. The other clock may be a delayed version of the second input clock. The TDC core uses the first and second set of multi-phase clocks to determine the time difference between the first and second input clocks. | 2009-12-03 |
20090296533 | HAND POSITION DETECTING DEVICE AND HAND POSITION CONTROL METHOD - A solar panel determines whether or not a wristwatch is in darkness. When the darkness has continued for a predetermined time period, e.g., for 61-70 minutes, it is determined that the wristwatch is not in use and set in a sleep state. Out of seconds, center and hour hands, at least the seconds hand is rotated to a reference position (00-second position) and stopped, and positions of the center and hour hands are detected. Therefore, power consumption during can be reduced when the wristwatch is not in use. | 2009-12-03 |
20090296534 | HAND POSITION DETECTING DEVICE - When detecting a rotational position of a seconds hand, it is determined whether data stored in a register in correspondence with a supply state of a drive current previously supplied to a coil of a stepping motor is “0”. When the data is “0”, the rotational position of the seconds hand is optically detected. When the data is “1”, the seconds hand is rotated one step, and then, the rotational position of the seconds hand is optically detected. Even though the seconds hand is shifted one second, the position detection is executed every two steps. | 2009-12-03 |
20090296535 | DEVICE CAPABLE OF RECORDING, STORING, MANIPULATING, AND TRANSFERRING INFORMATION - A method, system and apparatus for continuously recording, selectively storing, manipulating, and transferring information is provided. An apparatus continuously captures a data input signal and selectively designates saved portions of the data input signal to store or archive in the system. A method and system identifies and controls a data input signal for continuously recording, selectively storing, manipulating and transferring information. | 2009-12-03 |
20090296536 | MAGNETIC DISK DEVICE - The magnetic disk device is capable of securely removing contaminations from an outer face of a magnetic head, maintaining superior recording and reproducing characteristics and improving reliability. The magnetic disk device comprises: a ramp for holding a magnetic head at an evacuating position, the ramp being located outside of a region in which a magnetic recording medium is provided; and a laser emitting section for emitting a laser beam toward the magnetic head so as to heat the magnetic head, the laser emitting section being located in a moving track of the magnetic head, which is moved between the evacuating position and a loading position, without interfering with the magnetic head. An air stream generated by rotation of the magnetic recording medium removes contaminations from the magnetic head when the magnetic head is loaded. | 2009-12-03 |
20090296537 | RECORDING MEDIUM, ACCESS APPARATUS, ACCESS METHOD, AND PROGRAM - A recording medium is provided, which comprises at least one recording area. The at least one recording area is composed of at least one adjustment area and at least one positional information recording area. The at least one adjustment area is an area for adjustment an access parameter for accessing the recording medium. Positional information indicating a position of the at least one adjustment area is recorded in the at least one positional information recording area. | 2009-12-03 |
20090296538 | OPTICAL DISK DEVICE - In an optical pickup driving mechanism using a stepping motor, a feeding operation of an optical pickup can be stabilized even in a broad operating temperature environment. In executing an optical axis correction feeding operation in response to an amount of lens shift of an objective lens of an optical pickup, a stepping motor controlling portion drives a stepping motor in a microstep drive mode to move a base of the optical pickup in a radial direction of an optical disk. At this time, a temperature sensor senses an in-equipment temperature, and a driving current supply time deciding portion sets a supply time width of a pulse driving current whose envelope is like a sinusoidal wave to a supply time width as a fixed value, which is longer than that at an ordinary time, or a supply time width, which is multiplied by a coefficient corresponding to the in-equipment temperature, to increase a current supply time of the driving current when the sensed in-equipment temperature is equal to or lower than a predetermined temperature. | 2009-12-03 |
20090296539 | Information Recording Apparatus and Method, Computer Program - An information recording apparatus ( | 2009-12-03 |
20090296540 | MEDICAL DISC PUBLISHER - A method and apparatus for storing on a portable computer-readable medium, a study comprising at least one medical output produced by a medical modality and formatted in a standard medical format used by specialized computers configured for viewing outputs produced by medical modalities, and optionally labeling the portable computer-readable medium. The method includes receiving a transmission comprising the medical output that is formatted according to the standard medical format, at least temporarily storing the medical output as it is received in a buffer memory to be subsequently stored onto the portable computer-readable medium, and storing the medical output from the buffer memory onto the portable computer-readable medium. | 2009-12-03 |
20090296541 | Library apparatus and method for delivering storage media in library apparatus - A library apparatus includes: a support body; a media container rack rotatable around a horizontally extending rotation shaft and having cells radially arranged to respectively contain removable storage media in a horizontal direction; a media drive fixed to the support body and accessing a storage medium loaded therein; and a media delivery device that delivers the storage media between the media container rack and the media drive. The apparatus further includes: a guide member that guides the media delivery device; and a controller which controls the media drive and rotation of the media container. The controller causes the guide member to guide the media delivery device and rotates the media container rack so as to set the target cell at a position where the media delivery device guided by the guide member can take and put one of the storage media out of and back in a target cell. | 2009-12-03 |
20090296542 | OPTICAL DISC APPARTUS AND CORRECTION SERVO CONTROL SIGNAL GENERATION METHOD - An optical disc apparatus includes an objective lens that converges a light beam emitted from a light source and irradiates an optical disc having recording marks formed in a uniform recording layer with it, a detection signal generation section that receives a return light beam from the recording mark and generates a detection signal, a servo control signal generation section that generates a servo control signal representing relative displacement between the recording mark and a focus of the light beam from the detection signal and a servo signal correction section that generates a correction servo control signal by connecting peaks or neighborhoods of the peaks of servo control signals, the peaks being produced according to the recording marks. | 2009-12-03 |
20090296543 | DRIVE CONTROL APPARATUS, DRIVE CONTROL METHOD AND OPTICAL PICKUP APPARATUS - A control unit is caused to drive a collimator lens from a position of an origin, by a clock number A of drive pulses of a pulse rate T | 2009-12-03 |
20090296544 | OPTICAL DISK DEVICE - There is a need to prevent a possible erroneous detection of an off-track condition during recording to an optical disk. The above need can be addressed by, for example, determining an off-track condition has occurred when a light spot is located at least half-way from the track being recorded toward another track adjacent the track being recorded, and stopping a recording operation. In another example, the above need can be addressed by determining that off-track has occurred based on an output of a first off-track detector which detects that the light spot is off the track based on a wobble signal, an output of a second off-track detector which detects that the light spot is off the track based on a tracking error signal, and an output of a zero-cross detector which detects that the tracking error signal crosses zero based on an output of the tracking error signal. | 2009-12-03 |
20090296545 | APPARATUS AND METHOD FOR DEMODULATING INPUT SIGNAL MODULATED FROM REFERENCE SIGNAL AND DATA SIGNAL - An apparatus and method for demodulating an input signal modulated from a reference signal and a data signal are disclosed. The apparatus includes a determining unit, a first calculating unit, and a comparing unit. The determining unit is utilized for determining a plurality of first calculating timings of changing different calculating modes according to the input signal. The first calculating unit is coupled to the determining unit and utilized for generating a first calculating result of the input signal according to the first calculating timings and the calculating modes thereof. The comparing unit is coupled to the first calculating unit and utilized for generating a comparing result according to the first calculating result of the input signal and a threshold setting, and for outputting a demodulated data of the input signal according to the comparing result. | 2009-12-03 |
20090296546 | OPTICAL DISC APPARATUS - An optical disc apparatus includes an emitter which emits a laser beam to a optical disc, a divided photodetector including a first dived portion and a second dived portion disposed in a light path of the reflected beam from the optical disc, and producing a first photodetector signal and a second photodetector signal, a phase difference detector which produces a phase difference signal from a phase difference between the first and the second photodetector signals, an integrator which produces a integral signal from a integration of the phase difference signal, a tracking controller configure to perform tracking control based on the integral signal, and a limiter which limits a signal to be supplied from the divided photodetector to the phase difference detector or a signal to be supplied from the phase difference detector to the integrator based on a detection status of a signal detected by the dived photodetector. | 2009-12-03 |
20090296547 | Information Recording Apparatus and Information Recording Program - The present invention provides an information recording apparatus capable of reproducing recorded recording information without giving strange feeling even in the case where it is necessary to switch a recording layer among multiple recording layers, and an information recording program for executing the information recording process. | 2009-12-03 |
20090296548 | METHOD FOR MEASURING AND OPTIMIZING RADIAL TO VERTICAL CROSSTALK - A method and system are provided, for reducing the amount of radial to vertical crosstalk in an error signal in an optical record carrier reader. The method comprises the steps of: measuring error signals in a plurality of error signal control loops of the reader, comprising a focus error signal control loop; calculating power dissipation in each error signal control loop for determining the amount of radial to vertical crosstalk in the focus error signal control loop. Countermeasures may be applied to the error signal control loops to minimize or optimize the radial to vertical crosstalk. | 2009-12-03 |
20090296549 | Optical Disk Device - The precision of a direction detection signal DIR is judged from the duty ratio of the direction detection signal DIR, and the direction detection signal DIR which is used for track search control or tracking pull-in control is judged as valid or invalid according to the precision, thereby to improve the precision of the track search control or the tracking pull-in control. Therefore, even when the direction detection is not performed accurately due to a difference in the reflected light quantity on the optical disk, a defect on the optical disk, a delay in the track cross speed during search, or a delay in the detection circuit, the track search control and the tracking pull-in control can be performed with stability. | 2009-12-03 |
20090296550 | OPTICAL RECORDING-REPRODUCING APPARATUS - An optical recording-reproducing apparatus comprises a laser beam source; an objective lens for focusing a laser beam from the laser beam source on a disk medium; an actuator for positional control of the objective lens; a tilt-compensating mechanism for adjusting inclination of the objective lens relative to the disk medium; a detecting element for detecting an amount of a change of the power of the laser beam for recording of information on the disk medium, wherein the tilt-compensating mechanism adjusts inclination of the objective lens according to the amount of the change of the power of the laser beam when the recording is carried out. | 2009-12-03 |
20090296551 | TRANSITION SHIFT TIMING FOR OPTICAL SIGNAL - A method of determining the transition shift timing in a measured optical signal from an optical recording medium as well as applications of the method in connection with optimizing a write strategy and analyzing the write quality for an optical recording medium are disclosed. The method comprising the step of: providing values of a measured optical signal, providing modulation bits corresponding to the measured optical signal, calculating a model signal by means of an optical channel model, and determining an output timing of the leading and trailing edges from a mathematical model. The method being a recursive method which is continued until a predetermined criterion is fulfilled. The final output is the average transition shifts of the channel bits of the measured CA signal as they are on the optical recording medium. The applications of the method include but are not limited to: a module for determining the average transition shifts, an optical recording apparatus with means for adjusting the write strategy according to the average transition shifts, and an IC for controlling an optical recording apparatus. | 2009-12-03 |
20090296552 | Context-based error indication methods and apparatus - A media player may occasionally be unable to play or continue to play a particular item of media. When that occurs, the media player outputs an error indication that is related to the type of media that the problem media item is representative of. For example, if the problem item is a movie, then the media player may display an error indication having the appearance of broken movie film. If the problem media item is music, then the media player may display an error indication having the appearance of a broken compact disc (“CD”). Thus whatever the type of media that is not playing, the media player outputs an error indication that is appropriate for that type of media. The error indications output by the player are therefore context-based or media-appropriate. | 2009-12-03 |
20090296553 | OPTICAL DISC DEVICE AND OPTICAL DISC PLAYBACK METHOD - According to one embodiment, a device includes a filter which limits a frequency bandwidth of a reproduced signal from an optical disc, an AD conversion module which converts an output signal from the filter into a multilevel digital signal, an equalizing module for equalizing a waveform of the multilevel digital signal based on a predetermined partial response class and generating an equalizing playback signal, a detection module for generating binary data corresponding to data recorded on the optical disc based on the equalizing playback signal, a module for determining an amplitude value of each of an input signal to and an output signal from the equalizing module with respect to each binary data sequence output from the detection module, and a module for adjusting a high-frequency amplification amount of the filter such that an amplitude value before waveform equalization and an amplitude value after waveform equalization satisfy a predetermined relationship. | 2009-12-03 |
20090296554 | INDOLIUM COMPOUND AND OPTICAL RECORDING MATERIAL - An indolium compound is represented by formula (I): | 2009-12-03 |
20090296555 | METHOD AND DEVICE FOR RECORDING INFORMATION ON A MULTILAYER INFORMATION CARRIER - The invention discloses a method and a device for recording information on a multi layer optical disc using a multi session format. The use of multi sessions allows for an efficient use of the storage capacity of the disc, and for a fast finalization time. | 2009-12-03 |
20090296556 | READING DEVICE FOR A RECORD CARRIER - The invention provides an efficient reading device in which, even if one radiation beam should fail, no information is lost and the information can still be read out without time-consuming recurring operations. The present invention solves this problem by providing a reading device (FIG. | 2009-12-03 |
20090296557 | OPTICAL INFORMATION RECORDING/REPRODUCING APPARATUS - There is provided an optical information recording/reproducing apparatus having an optical disc drive unit for driving an optical disc mounted, a hologram disc drive unit for driving a hologram disc mounted, a disk discrimination device for discriminating which of an optical disc and a hologram disc was mounted, a selection device of the disk drive unit for selecting an optical disc drive unit, when discriminated to be an optical disc, by the disk discrimination device, while selecting a hologram disc drive unit, when discriminated to be a hologram disc, by the disk discrimination device, and a drive device of the disk drive unit for driving the disk drive unit selected by the selection device of the disk drive unit. | 2009-12-03 |
20090296558 | Optical information recording and reproducing apparatus optical information recording method - An optical information recording and reproducing apparatus includes an irradiation unit of a signal light beam and a reference light beam required for data recording, and a cure irradiation unit having at least one of a pre-cure irradiation that irradiates a predetermined light beam on to a desired position prior to irradiating the reference light bean and the signal light beam on to the desired position when information is recorded in the desired position on an optical information recording medium and a post-cure irradiation that irradiates a predetermined light beam on to the desired position so as to make the desired position non-recordable after the information is recorded in the desired position on the recording medium. The cure irradiation unit is disposed in one driving device in a freely movable manner in the driving device. | 2009-12-03 |
20090296559 | OPTICAL SCANNING DEVICE - An optical scanning device for scanning optical record carriers having cover layers of different thicknesses. The scanning device has a first mode for scanning a first optical record carrier, a second mode for scanning a second optical record carrier and a third mode for scanning third optical record carrier. The device comprises an objective lens system and a switchable optical element having a first discrete state and a different, second discrete state. The element comprises: a fluid system including a first fluid and a different, second fluid ( | 2009-12-03 |
20090296560 | OPTICAL PICKUP APPARATUS, SIGNAL GENERATING METHOD, AND OPTICAL DISK APPARATUS - An optical pickup apparatus is provided with an optical system for guiding a laser light emitted from a laser light source to an objective lens and also for guiding the laser light reflected by a recording medium to a photodetecting section as a convergent light. The photodetecting section is provided with first and second photodetectors disposed at positions at which a first part of the target laser light and a second part different from the first part are respectively received, the positions being separated further from the optical system than a convergence position of a target laser light reflected by an irradiation-target recording layer, out of the laser light reflected by the recording medium, and a third photodetector disposed at a position closer to the optical system than the convergence position of the target laser light, the position being bridging more over the second part than the first part. | 2009-12-03 |
20090296561 | MULTI-SPOT DETECTOR ARRANGEMENT FOR MULTI-LAYER RECORD CARRIERS - The present invention relates to a detector configuration, pickup device and driving device for multi-layer record carriers, wherein main beam detector means and two pairs of side-beam detector means disposed on opposite sides of the main beam detector means are provided for suppressing crosstalk effects. As an example, the two three-spot systems obtained can be used for focus error signals and tracking error signals, respectively, wherein satellite spots can be controlled to have a desired fringe pattern either in-phase or anti-phase with that of the main beam. Besides the reduction of focusing and tracking errors, the above measure allows to reduce spacer layer thickness. | 2009-12-03 |
20090296562 | PHOTOELECTRIC CONVERTING DEVICE, AND OPTICAL DISK APPARATUS AND ADJUSTMENT METHOD OF THE SAME - Provided is a photoelectric converting device including: first photoreceptors each converting a received main beam to a current; second photoreceptors each converting a received first sub-beam to a current; and third photoreceptors each converting a received second sub-beam to a current; first current-voltage converting circuits each converting the current converted by a corresponding one of the first photoreceptors to a voltage; current amplifying circuits each amplifying or attenuating the current converted by a corresponding one of the second photoreceptors; switching circuits each supplying one of the current amplified or attenuated by a corresponding one of the current amplifying circuits and the current converted by the corresponding one of the second photoreceptors; and second current-voltage converting circuits each converting a sum of the current supplied by a corresponding one of the switching circuits and the current converted by a corresponding one of the third photoreceptors to a voltage. | 2009-12-03 |
20090296563 | TRANSMISSION APPARATUS, TRANSMISSION METHOD, RECEPTION APPARATUS, AND RECEPTION METHOD - A disclosed transmission apparatus includes a multiplexing portion that multiplexes a common pilot channel, a shared control channel, and a shared data channel; a symbol generation portion that performs an inverse Fourier transformation on the multiplexed signal so as to generate a symbol; and a transmission portion that transmits the generated symbol. The multiplexing portion multiplexes the shared control channel including control information necessary for demodulation of the shared data channel including a payload and the common pilot channel to be used by plural users in a frequency direction, and the shared data channel in a time direction with respect to the common pilot channel and the shared control channel. Even when the number of symbols composing a transmission time interval (TTI) is reduced, transmission efficiency of channels excluding the common pilot channel can be maintained by reducing insertion intervals of the common pilot channel accordingly. | 2009-12-03 |
20090296564 | METHOD AND APPARATUS FOR PRODUCING/RECOVERING OFDM/OFDMA SIGNALS - The present invention discloses a method of producing a multi-layered OFDM symbol using a plurality of small IFFT blocks. The produced OFDM symbol is able to reduce complexity in performing IFFT or FFT while maintaining orthogonality of a related art OFDM symbol. In particular, by avoiding the related art scheme using the N-sized IFFT, the layered IFFT is executed in a manner of grouping N data symbols into P groups each of which includes Q data symbols (N=P−Q). In order to produce an OFDM signal equal to that of the related art N-sized IFFT, it is preferable that phases are aligned for the data symbols on which Q-sized IFFT has been performed. | 2009-12-03 |
20090296565 | SYSTEM AND METHOD FOR PROVIDING NETWORK ROUTE REDUNDANCY ACROSS LAYER 2 DEVICES - Systems and methods are described for providing network route redundancy through Layer 2 devices, such as a loop free Layer 2 network having a plurality of switching devices. A virtual switch is coupled to the loop free Layer 2 network, the virtual switch having two or more switches configured to transition between master and backup modes to provide redundant support for the loop free Layer 2 network, the switches communicating their status through use of a plurality of redundancy control packets. The system also includes means for allowing the redundancy control packets to be flooded through the Layer 2 network. The means may include time-to-live data attached to the redundancy control packet which is decremented only when the packets are transferred through devices which are configured to recognize the protocol used in redundancy control packets. | 2009-12-03 |
20090296566 | SYSTEMS AND METHODS TO MONITOR AND ANALYZE CUSTOMER EQUIPMENT DOWNTIME IN A VOICE OVER INTERNET PROTOCOL (VOIP) SERVICE NETWORK - Systems and methods to monitor and analyze customer premises equipment downtime in a Voice over Internet Protocol service network are disclosed. An example method comprises receiving an indication of an internet protocol (IP) address change, determining whether a network transaction is a failed network transaction associated with the IP address change, and when the network transaction is a failed network transaction associated with the IP address change, storing the failed network transaction to a database entry associated with the IP address change. | 2009-12-03 |
20090296567 | SYSTEMS AND METHODS TO MINIMIZE CUSTOMER EQUIPMENT DOWNTIME IN A VOICE OVER INTERNET PROTOCOL (VOIP) SERVICE NETWORK - Systems and methods to minimize customer premises equipment downtime in a Voice over Internet Protocol service network are disclosed. An example method comprises receiving a replacement internet protocol (IP) address to replace a first IP address in a residential gateway associated with a first network service provider, sending a re-authenticate message from the residential gateway to a customer premises equipment associated with a second network service provider, and receiving the re-authenticate message in the customer premises equipment. | 2009-12-03 |
20090296568 | Edge Node Redundant System - A client terminal at one location a is accommodated in an edge node (gateway) having a redundant configuration composed of a primary node and a secondary node. Normally a primary edge node PE A is used to enable communications with partner client terminals at locations b and c via opposing edge nodes PE B and PE C. Normally, a database storing the information of a label used by the primary edge node is synchronized with the database of the secondary edge node. A primary loopback address is stored in the secondary edge node and nullified. When the primary edge node fails, the loopback address of the primary edge node is validated and the secondary edge node restarts communications with the opposing edge nodes using the information of the database storing the information of the label used by the primary PE and the same label as the primary edge node. | 2009-12-03 |
20090296569 | Ring network and method for automatic protection swicthing - A method for automatic protection switching in a ring network detects a link failure at a first interface of a node, generates a first link down message and sends the first link down message along the second direction of the ring network. Upon generation or receipt of the first link down message by the redundancy manager, the redundancy manager is unblocked such that non-control frames of the at least one automatic protection switching domain are no longer blocked by the redundancy manager. Upon generation or receipt of the first link down message by one of the nodes, the node having at least one entry assigning an address to the second interface IF | 2009-12-03 |
20090296570 | AUTOMATIC SEMI-CROSS CABLE AND SCRAMBLER RESOLUTION MECHANISM FOR 1000BASE-T MASTER/SLAVE DEVICE - A novel mechanism for 1000BASE-T network adapters to detect and resolve connections for cables that are either fully aligned, fully crossed or semi-crossed. The mechanism is applicable to adapters in either master or slave modes, and operates with cables that either have channels A and B aligned with channels C and D crossed or channels A and B crossed and channels C and D aligned. Cables of different configurations can be switched at any time without impacting network operation. In addition, a mechanism for 1000BASE-T adapters to support multiple scrambling methods between the adapter and its link partner is described. | 2009-12-03 |