42nd week of 2014 patent applcation highlights part 57 |
Patent application number | Title | Published |
20140310488 | Logical Unit Management using Differencing - A storage system may manage a logical unit using a differencing mechanism that captures changes to a base version of the logical unit. The logical unit may be presented to an operating system as a single storage device, while the logical unit may actually be provided by several storage devices that operate in conjunction with each other. In some cases, a single base version of the logical unit may be used to simultaneously provide multiple logical units, each of the logical units having a separate and independent differencing portion. In one such embodiment, a common base extent may contain read only versions of file blocks while each logical unit may contain independent differencing extents that contain changes to the base extent. | 2014-10-16 |
20140310489 | MANAGING METADATA AND DATA FOR A LOGICAL VOLUME IN A DISTRIBUTED AND DECLUSTERED SYSTEM - Methods, apparatus and computer program products for a distributed system include dividing logical volume data into data subsets, and defining at least one distributedly storage configuration for the logical volume. Metadata for the logical volume is written to a first set of first metadata tables, and the first set of first metadata tables is divided into metadata subsets having a one-to-one correspondence with the data subsets. The metadata subsets are distributed among the multiple digital information devices, and the metadata is copied from the first set of first metadata tables to a second set of corresponding second metadata tables in a one-to-one correspondence with the first metadata tables. The second metadata tables are distributed among the multiple digital information devices, and upon modifying the metadata in a one of the first metadata tables while processing a storage request, the corresponding second metadata table is revised with the updated metadata. | 2014-10-16 |
20140310490 | HETEROGENEOUS MEMORY DIE STACKING FOR ENERGY EFFICIENT COMPUTING - Methods and apparatus to provide heterogeneous memory die stacking for energy efficient computing are described. In one embodiment, a Phase Change Memory with Switch (PCMS) die is coupled to a Dynamic Random Access Memory (DRAM) die and a Central Processing Unit (CPU) die. CPU checkpointing state data is stored in the PCMS die first before transferring the checkpointing data to a backup media at a later and more extended time. Other embodiments are also disclosed and claimed. | 2014-10-16 |
20140310491 | DISPERSED STORAGE NETWORK WITH DATA SEGMENT BACKUP AND METHODS FOR USE THEREWITH - A method begins with a processing module selecting one of a plurality of dispersed storage (DS) processing modules for facilitating access to a dispersed storage network (DSN) memory. The method continues with the processing module sending a DSN memory access request to the one of the plurality of DS processing modules. The method continues with the processing module selecting another one of the plurality of DS processing modules when no response is received within a given time frame or when the response to the access request does not include an access indication. The method continues with the processing module sending the DSN memory access request to the another one of the plurality of DS processing modules. | 2014-10-16 |
20140310492 | DISPERSED STORAGE NETWORK WITH METADATA GENERATION AND METHODS FOR USE THEREWITH - A method begins with a processing module selecting one of a plurality of dispersed storage (DS) processing modules for facilitating access to a dispersed storage network (DSN) memory. The method continues with the processing module sending a DSN memory access request to the one of the plurality of DS processing modules. The method continues with the processing module selecting another one of the plurality of DS processing modules when no response is received within a given time frame or when the response to the access request does not include an access indication. The method continues with the processing module sending the DSN memory access request to the another one of the plurality of DS processing modules. | 2014-10-16 |
20140310493 | MIGRATING DATA ACROSS STORAGES WITH DISSIMILAR ALLOCATION SIZES - A method, system, and computer program product for migrating data across storages with dissimilar allocation sizes are provided in the illustrative embodiments. A determination is made of a minimum allocation unit size used for allocating space to a data at a source data storage device. A number of first minimum allocation units of a first minimum allocation unit size at a target data storage device is computed, wherein the number of first minimum allocation units can be completely occupied by a portion of the data. An amount of data left over after excluding the portion of the data from the data is computed. The portion of the data is migrated to the number of first minimum allocation units at the target. The amount of data left over is migrated to a second number of second minimum allocation units of a second minimum allocation unit size at the target. | 2014-10-16 |
20140310494 | STORAGE CONTROL SYSTEM WITH DATA MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF - A storage control system, and a method of operation thereof, including: a recycle write queue for providing a recycle write; a host write queue for providing a host write; and a scheduler, coupled to the recycle write queue and the host write queue, for scheduling the recycle write and the host write for writing to a memory device. | 2014-10-16 |
20140310495 | COLLECTIVE MEMORY TRANSFER DEVICES AND METHODS FOR MULTIPLE-CORE PROCESSORS - This disclosure provides systems, methods, and apparatus for collective memory transfers. A control unit may be configured to coordinate a transfer of data between a memory and processor cores. For a read data transfer operation, the control unit may receive a trigger packet identifying a read data transfer operation and identifying a first plurality of data lines based on data values included in the trigger packet. The control unit may read the first plurality of data lines from the memory sequentially and send a second plurality of data lines to the processor cores. For a write data transfer operation, the control unit may send a request for at least one data line to a plurality of processor cores, may receive and reorder the requested data lines, and may write the data lines to a memory. The control unit may determine a mapping between processor cores and the memory. | 2014-10-16 |
20140310496 | Parallel Memories for Multidimensional Data Access - The subject disclosure is directed towards loading parallel memories (e.g., in one or more FPGAs) with multidimensional data in an interleaved manner such that a multidimensional patch/window may be filled with corresponding data in a single parallel read of the memories. Depending on the position of the patch, the data may be rotated horizontally and/or vertically, for example, so that the data in each patch is consistently arranged in the patch regardless of from which memory each piece of data was read. Also described is leveraging dual ported memory for multiple line reads and/or loading one part of a buffer while reading from another. | 2014-10-16 |
20140310497 | METHOD AND APPARATUS FOR MEMORY MANAGEMENT - A method for memory management, include allocating an empty page of a physical memory for reference data according to execution of an application program, and mapping the empty page to a virtual memory; checking a physical address of the physical memory to which the reference data has been loaded; mapping the checked physical address to the virtual memory to which the empty page has been mapped, and mapping the reference data; and releasing allocation of the allocated physical memory when the reference data is mapped to the virtual memory. | 2014-10-16 |
20140310498 | ORGANIZATION OF A SMALL OBJECT AREA AND A LARGE OBJECT AREA IN A JAVA HEAP - A memory heap is allocated to a contiguous range of memory. One end of the heap is designated as a small object area. The other end of the heap is designated as a large object area. When the two object areas grow, the small object area grows inward within the heap toward the large object area, and the large object area grows inward within the heap toward the small object area. | 2014-10-16 |
20140310499 | SYSTEMS, METHODS AND INTERFACES FOR DATA VIRTUALIZATION - A data services module performs log storage operations in response to requests by storing data on one or more storage devices, and appending information pertaining to the requests to a separate metadata log. A log order of the metadata log may correspond to an order in which the requests were received, regardless of the order in which data of the requests are written to the storage devices. The requests may correspond to identifiers of a logical address space. The data services module implements an any-to-any translation layer configured to map identifiers of the logical address space to the stored data. The virtualization module may include a metadata management module configured to checkpoint the translation layer metadata by, inter alia, appending aggregate, checkpoint entries to the metadata log. The data services module may leverage the translation layer between the logical identifiers and underlying storage locations to efficiently implement logical manipulation operations. | 2014-10-16 |
20140310500 | PAGE CROSS MISALIGN BUFFER - The present application describes embodiments of a method and apparatus including a page cross misalign buffer. Some embodiments of the apparatus include a store queue for a plurality of entries configured to store information associated with store instructions. A respective entry in the store queue can store a first portion of information associated with a page crossing store instruction. Some embodiments of the apparatus also include one or more buffers configured to store a second portion of information associated with the page crossing store instruction. | 2014-10-16 |
20140310501 | APPARATUS AND METHOD FOR CALCULATING PHYSICAL ADDRESS OF A PROCESSOR REGISTER - An apparatus and method for calculating a physical address of a register in a processor are provided. The apparatus includes an offset calculator configured to calculate an offset between the physical address and a logical address of the register, based on a current iteration number and a size of a rotating register; an address calculator configured to calculate the physical address of the register by adding the calculated offset to the logical address of the register; and an address corrector configured to output a final physical address of the register based on the calculated physical address and the size of the rotating register. | 2014-10-16 |
20140310502 | MEMORY MANAGEMENT APPARATUS AND MEMORY MANAGEMENT METHOD THEREOF - A memory management apparatus and method thereof are disclosed. The memory management apparatus includes a micro translation look-aside buffers, a main translation look-aside buffer, a page address history table and a controller. The page address history table is used to record the space size information for a plurality of page table entry which are written to the main translation look-aside buffer. The controller decides to whether access a page table entry or not from the main translation look-aside buffer according to the page address history table. | 2014-10-16 |
20140310503 | MEMORY INTERLEAVING ON MEMORY CHANNELS - A memory interleaver includes a channel selection unit to receive a system memory address for a memory request. The interleaver also includes a local memory address computation unit and a de-multiplexer. The channel selection unit examines a predetermined plurality (n) of bits in a memory address of a memory transaction and assigns the memory transaction to one of a plurality of memory channels in a multi-channel memory unit based on a state of the predetermined plurality of bits. Preferably, 2 | 2014-10-16 |
20140310504 | Systems and Methods for Flag Tracking in Move Elimination Operations - Systems and methods for flag tracking in data manipulation operations involving move elimination. An example processing system comprises a first data structure including a plurality of physical register values; a second data structure including a plurality of pointers referencing elements of the first data structure; a third data structure including a plurality of move elimination sets, each move elimination set comprising two or more bits representing two or more logical data registers, the third data structure further comprising at least one bit associated with each move elimination set, the at least one bit representing one or more logical flag registers; a fourth data structure including an identifier of a data register sharing an element of the first data structure with a flag register; and a move elimination logic configured to perform a move elimination operation. | 2014-10-16 |
20140310505 | COMPRESSED INSTRUCTION FORMAT - A technique for decoding an instruction in a variable-length instruction set. In one embodiment, an instruction encoding is described, in which legacy, present, and future instruction set extensions are supported, and increased functionality is provided, without expanding the code size and, in some cases, reducing the code size. | 2014-10-16 |
20140310506 | ALLOCATING STORE QUEUE ENTRIES TO STORE INSTRUCTIONS FOR EARLY STORE-TO-LOAD FORWARDING - The present invention provides a method and apparatus for allocating store queue entries to store instructions for early store-to-load forwarding. Some embodiments of the method include allocating an entry in a store queue to a store instruction in response to the store instruction being dispatched and prior to receiving a translation of a virtual address to a physical address associated with the store instruction. The entry includes storage for data to be written to the physical address by the store instruction. | 2014-10-16 |
20140310507 | METHODS OF AND APPARATUS FOR MULTIDIMENSIONAL INDEXING IN MICROPROCESSOR SYSTEMS - When an OpenCL kernel is to be executed, a bitfield index representation to be used for the indices of the kernel invocations is determined based on the number of bits needed to represent the maximum value that will be needed for each index dimension for the kernel. A bitfield placement data structure | 2014-10-16 |
20140310508 | METHOD AND APPARATUS FOR ACQUIRING TIME SPENT ON SYSTEM SHUTDOWN - A method for determining time spent on system shutdown is provided. The method may involve identifying a time at which a shutdown instruction is initiated during the system shutdown. Further, an exit time of an object that is the last to exit during the system shutdown may be identified. The time spent on the system shutdown may be determined based on the time at which the shutdown instruction is initiated and the exit time of the object that is the last to exit. The method for determining time spent on system shutdown may obtain the system time spent on the previous system shutdown regardless of the reason that the system was shut down. Further, the user may be instructed to optimize the system according to the time spent on system shutdown. | 2014-10-16 |
20140310509 | HOST RECOVERY USING A SECURE STORE - Approaches are described for enabling a host computing device to store credentials and other security information useful for recovering the state of the host computing device in a secure store, such as a trusted platform module (TPM) on the host computing device. When recovering the host computing device in the event of a failure (e.g., power outage, network failure, etc.), the host computing device can obtain the necessary credentials from the secure store and use those credentials to boot various services, restore the state of the host and perform various other functions. In addition, the secure store (e.g., TPM) may provide boot firmware measurement and remote attestation of the host computing devices to other devices on a network, such as when the recovering host needs to communicate with the other devices on the network. | 2014-10-16 |
20140310510 | REMOTE ATTESTATION OF HOST DEVICES - Approaches are described for enabling a host computing device to store credentials and other security information useful for recovering the state of the host computing device in a secure store, such as a trusted platform module (TPM) on the host computing device. When recovering the host computing device in the event of a failure (e.g., power outage, network failure, etc.), the host computing device can obtain the necessary credentials from the secure store and use those credentials to boot various services, restore the state of the host and perform various other functions. In addition, the secure store (e.g., TPM) may provide boot firmware measurement and remote attestation of the host computing devices to other devices on a network, such as when the recovering host needs to communicate with the other devices on the network. | 2014-10-16 |
20140310511 | COMPUTER SYSTEM AND CONTROL METHOD THEREOF - A computer system and a control method thereof are described. The computer system includes a first memory, a second memory, and a control module. The first memory is configured to store a Basic Input Output System (BIOS) program. The second memory includes a first memory block and a second memory block. The control module, when a scan function is initiated, is configured to execute the BIOS program to generate a first restart program, wherein the control module is configured to store the first restart program into the first memory block and scan the second memory block, and stop using an abnormal cell in the second memory block. | 2014-10-16 |
20140310512 | SECURE NETWORK TUNNEL BETWEEN A COMPUTING DEVICE AND AN ENDPOINT - The present disclosure presents a system, method and apparatus herein enabling secure coupling of a computing device, such as a mobile device with an endpoint, such as an application server. The computing device can include any electronic device such as a computer, a server, an application server, a mobile device or tablet. The endpoint can be any electronic device as well that is located within an enterprise network. In at least one embodiment, the secure coupling of the mobile device with a computing device can include a security gateway server. In one example, the security gateway server can be a tunnel service server. In another embodiment, an application server can include a tunnel service module to provide the secure coupling with the mobile device. | 2014-10-16 |
20140310513 | METHOD AND SYSTEM FOR MANAGING SECURITY IN A COMPUTING ENVIRONMENT - A method and system for managing data security in a computing environment. A processor at the gateway server receives, from a user device, at least one message. Each message requests that an encryption key be downloaded to the user device. The gateway server interfaces between the user device and a cloud that includes interconnected computing systems external to the user device. In response to the received at least one message, the processor generates at least one unique encryption key for each message and sends the at least one generated encryption key to the user device, but does not store any of the generated encryption keys in the cloud. For each encryption key having been sent to the user device, the processor receives each encryption key returned from the user device. For each encryption key received from the user device, the processor stores each received encryption key in the cloud. | 2014-10-16 |
20140310514 | SECURE MESSAGING - A method for transmitting an encrypted message from a messaging server ( | 2014-10-16 |
20140310515 | APPARATUS AND METHOD FOR AUTHENTICATION BETWEEN DEVICES BASED ON PUF OVER MACHINE-TO-MACHINE COMMUNICATIONS - Terminal devices that perform machine-to-machine (M2M) communication may autonomously perform password authentication by autonomously generating a personal identity number (PIN) value, which is not exposed externally, using a physical unclonable function (PUF). A terminal apparatus that performs M2M communication may include a PUF embedded in the terminal apparatus to generate an authentication key for password authentication associated with the terminal apparatus, and an authentication unit to perform the password authentication associated with the terminal apparatus using the authentication key generated by the PUF. | 2014-10-16 |
20140310516 | SYSTEMS AND METHODS FOR SECURING DATA IN MOTION - Two approaches are provided for distributing trust among certificate authorities. Each approach may be used to secure data in motion. One approach provides methods and systems in which a secure data parser is used to distribute trust in a set of certificate authorities during initial negotiation (e.g., the key establishment phase) of a connection between two devices. Another approach of the present invention provides methods and systems in which the secure data parser is used to disperse packets of data into shares. A set of tunnels is established within a communication channel using a set of certificate authorities, keys developed during the establishment of the tunnels are used to encrypt shares of data for each of the tunnels, and the shares of data are transmitted through each of the tunnels. Accordingly, trust is distributed among a set of certificate authorities in the structure of the communication channel itself. | 2014-10-16 |
20140310517 | IDENTIFICATION AND CLASSIFICATION OF WEB TRAFFIC INSIDE ENCRYPTED NETWORK TUNNELS - The present principles are directed to identifying and classifying web traffic inside encrypted network tunnels. A method includes analyzing network traffic of unencrypted data packets to detect packet traffic, timing, and size patterns. The detected packet, timing, and size traffic patterns are correlated to at least a packet destination and a packet source of the unencrypted data packets to create at least one of a training corpus and a model built from the training corpus. The at least one of the corpus and model is stored in a memory device. Packet traffic, timing, and size patterns of encrypted data packets are observed. The observed packet traffic, timing, and size patterns of the encrypted data packets are compared to at least one of the training corpus and the model to classify the encrypted data packets with respect to at least one of a predicted network host and predicted path information. | 2014-10-16 |
20140310518 | Dynamic Adaptive Streaming Over Hypertext Transfer Protocol Service Protection - A method comprising encrypting a segment in response to receiving a segment request to generate an encrypted segment, and sending the encrypted segment, wherein encrypting the segment comprises encrypting a data content segment and a non-media segment in accordance with information provided in a dynamic adaptive streaming over hypertext transfer protocol (HTTP) (DASH) media presentation description (MPD), and wherein encrypting the segment generates an encrypted data content segment and an encrypted non-media segment. A method comprising sending a segment request, receiving an encrypted segment, wherein the encrypted segment comprises an encrypted data content segment and an encrypted non-media segment, and decrypting the encrypted segment in accordance with information provided in a DASH MPD to generate a data content segment and a non-media segment, wherein the non-media segment comprises a non-playable media. | 2014-10-16 |
20140310519 | METHOD AND APPARATUS FOR CONTROLLING ACCESS IN A SOCIAL NETWORK SERVICE - A key-based method for controlling access in a social network service includes: generating a core key and sub keys by segmenting a master key that is unique to a file owner, with the sub keys assigned differently to multiple groups that are divided according to trust level and relationship type; determining the group to which a file requester belongs by using at least one of a friend list of the file requester, a trust level between the file requester and the file owner, and a friend list of the file owner, and distributing a sub key corresponding to the determined group to the file requester, when the file requester requests a key distribution; and determining whether or not access to a file of the file owner is authorized by using the sub key distributed to the file requester and the core key, when the file requester requests the file. | 2014-10-16 |
20140310520 | METHOD FOR COMMUNICATING DATA AND ELECTRONIC DEVICE THEREOF - A method for transmitting control data and an electronic device are provided. The electronic device includes a control data processor for generating control data, and a file processor for generating a control data file comprising the control data generated by the control data processor and transmitting the control data file to another electronic device using a file transfer protocol. | 2014-10-16 |
20140310521 | ENCRYPTED DATA MANAGEMENT DEVICE, ENCRYPTED DATA MANAGEMENT METHOD, AND ENCRYPTED DATA MANAGEMENT PROGRAM - An invalidation scheme of a secret key is implemented, which is usable for a functional encryption scheme. In a cryptographic processing system | 2014-10-16 |
20140310522 | NETWORK APPARATUS FOR SECURE REMOTE ACCESS AND CONTROL - A network appliance is designed and configured to communicate over a data network and to provide secure on-demand remote access and control of a computing system in the context of remote support. | 2014-10-16 |
20140310523 | METHOD, APPARATUS AND SYSTEM FOR SECURE COMMUNICATION OF LOW-COST TERMINAL - Embodiments of the present invention provide a method for secure communication of a low-cost terminal, which solves a communication security problem in the low-cost terminal and on a network side. The method includes: selecting, by an access point, a ciphering algorithm and an integrity algorithm according to a security capability of the low-cost terminal after successful authentication and key negotiation between the low cost terminal and a mobility management entity, and acquiring a cipher key and an integrity key according to the ciphering algorithm and the integrity algorithm; sending, by the access point, a security mode command including the ciphering algorithm and the integrity algorithm to the low-cost terminal so that the low-cost terminal calculates the cipher key and the integrity key; and receiving, by the access point, a security mode complete response message sent by the low-cost terminal. Embodiments of the present invention apply to radio communication. | 2014-10-16 |
20140310524 | DATA MANAGEMENT DEVICE, POWER USAGE CALCULATION SYSTEM, DATA MANAGEMENT METHOD, AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a data management device includes a receiver; a first calculator; a second calculator; and a transmitter. The receiver is configured to receive at least one piece of encrypted data obtained by encrypting a piece of data and at least one message authentication code for the piece of encrypted data. The first calculator is configured to aggregate pieces of encrypted data received to calculate aggregated encrypted data corresponding to a sum of the pieces of data encrypted. The second calculator is configured to sum up message authentication codes received to calculate a total value of the message authentication codes for the aggregated encrypted data. The transmitter is configured to transmit the aggregated encrypted data and the total value of the message authentication codes. | 2014-10-16 |
20140310525 | METHOD FOR EXCHANGING STRONG ENCRYPTION KEYS BETWEEN DEVICES USING ALTERNATE INPUT METHODS IN WIRELESS PERSONAL AREA NETWORKS (WPAN) - A method for exchanging strong encryption keys between devices using alternate input methods. At least two devices that want to communicate with one another are set in key exchange mode. The at least two devices are to communicate with one another using a short range radio or personal area network. The at least two devices negotiate with one another to determine which of the at least two devices will generate an encryption key, wherein device A represents the negotiated device and device B represents the non-negotiated device. Device A generates the encryption key and transmits the encryption key to device B using an out-of band transmission channel. The out-of-band transmission channel may be transmitting the encryption key via audio tones. A validation process determines whether the transmission of the encryption key via the out-of-band transmission channel was successful. If the encryption key has been successfully validated, the at least two devices are enabled to automatically accept communications between them over the short range radio or personal area network. | 2014-10-16 |
20140310526 | SECURE SESSION CAPABILITY USING PUBLIC-KEY CRYPTOGRAPHY WITHOUT ACCESS TO THE PRIVATE KEY - A server establishes a secure session with a client device where a private key used in the handshake when establishing the secure session is stored in a different server. During the handshake procedure, the server receives a premaster secret that has been encrypted using a public key bound with a domain for which the client device is attempting to establish a secure session with. The server transmits the encrypted premaster secret to another server for decryption. The server receives the decrypted premaster secret and continues with the handshake procedure including generating a master secret from the decrypted premaster secret and generating one or more session keys that are used in the secure session for encrypting and decrypting communication between the client device and the server. | 2014-10-16 |
20140310527 | Secure Distribution of Content - Methods and systems are described for enabling secure delivery of a content item from a content source to a content receiving device associated with a decryption module configured for use with a split-key cryptosystem comprising encryption and decryption algorithms E and D, a cipher algorithm for generating encryption and decryption keys e,d on the basis of secret information S and a split-key algorithm for splitting e and/or d into i different split-encryption keys e | 2014-10-16 |
20140310528 | DIGITAL RIGHTS MANAGEMENT USING TRUSTED PROCESSING TECHNIQUES - The present invention discloses several methods to strengthen the integrity of entities, messages, and processing related to content distribution as defined by the Open Mobile Alliance (OMA) Digital Rights Management (DRM). The methods use techniques related to the Trusted Computing Group (TCG) specifications. A first embodiment uses TCG techniques to verify platform and DRM software integrity or trustworthiness, both with and without modifications to the DRM rights object acquisition protocol (ROAP) and DRM content format specifications. A second embodiment uses TCG techniques to strengthen the integrity of ROAP messages, constituent information, and processing without changing the existing ROAP protocol. A third embodiment uses TCG techniques to strengthen the integrity of the ROAP messages, information, and processing with some changes to the existing ROAP protocol. | 2014-10-16 |
20140310529 | HNB OR HeNB SECURITY ACCESS METHOD AND SYSTEM, AND CORE NETWORK ELEMENT - A Home (Evolved) NodeB (H(e)NB) security access method and system, and a core network element are disclosed. The method includes a security gateway (SeGW) signing a digital signature for identity information of an H(e)NB and sending the digital signature to the H(e)NB, the H(e)NB sending the identity information of the H(e)NB and the digital signature to the core network element, and the core network element performing a correctness verification on the identity information of the H(e)NB and the digital signature. | 2014-10-16 |
20140310530 | MESSAGE AUTHENTICATION METHOD IN COMMUNICATION SYSTEM AND COMMUNICATION SYSTEM - Each of ECUs counts the number of messages transmitted for each of CAN IDs. A transmission node that has transmitted a main message produces an MAC from a data field and the CAN ID in the main message and a counter value corresponding to the CAN ID, and transmits the MAC as an MAC message. A reception node that has received the main message produces an MAC from the data field and the CAN ID contained in the main message and the counter value corresponding to the CAN ID, and determines whether the MAC matches the MAC contained in the MAC message. By so doing, verification whether the main message is valid or not can be made. According to this configuration, message authentication by the MAC can be made without changing a CAN protocol. | 2014-10-16 |
20140310531 | METHOD AND SYSTEM FOR SECURING THE ENTRY OF DATA TO A DEVICE - A method and structure for entering authentication data into a device by displaying in an optical unit a key map which correlates data input into the device with keys of the device, the key map indicating data different from that of the keys of the device. | 2014-10-16 |
20140310532 | UNLOCKING A STORAGE DEVICE - An electronic device has a lower power state in which power to a storage device is disabled. Predetermined information stored in a memory is useable to unlock the storage device during a procedure to transition the electronic device from the lower power state to a higher power state. The predetermined information is different from a credential for use in unlocking the storage device. | 2014-10-16 |
20140310533 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME - An object is to solve all of the following problems caused when a volatile register and a non-volatile register are used as registers in a processor: degradation of the integrity of data stored in the non-volatile register; loss of data security due to the processor and a non-volatile memory device that are provided apart from each other; and slow data processing speed due to wiring delay or the like caused by these devices provided apart from each other. When data maintained in the volatile register is stored in the non-volatile register before supply of power supply voltage is stopped, the data is encrypted by an encryption circuit and stored in a non-volatile memory device that is provided separately from the processor. Then, the data stored in the non-volatile register is compared with the compressed and encrypted data stored in the non-volatile memory device. | 2014-10-16 |
20140310534 | DATA SCRAMBLING IN MEMORY DEVICES USING COMBINED SEQUENCES - A method for data storage includes generating a first scrambling sequence and a second scrambling sequence that is different from the first scrambling sequence. A combined sequence, which is equal to a bit-wise XOR between the first and second scrambling sequences, is generated. Data is copied from a first location in a memory in which the data is scrambled using the first scrambling sequence, to a second location in the memory in which the data is to be scrambled using the second scrambling sequence, by reading the data from the first location, scrambling the read data using the combined sequence, and then storing the data in the second location. | 2014-10-16 |
20140310535 | Electronic Device with Flash Memory Component - Electronic device ( | 2014-10-16 |
20140310536 | STORAGE DEVICE ASSISTED INLINE ENCRYPTION AND DECRYPTION - Various features pertain to inline encryption and decryption. In one aspect, inline read/write operations are performed by configuring an off-chip storage device to provide parameters to facilitate inline encryption/decryption of data by a host storage controller of a system-on-a-chip (SoC.) The parameters provided by the storage device to the host storage controller include an identifier that is the same for read and write operations for a particular block of data but differs from one block of data to another. The host storage controller employs the parameters as initial vectors to generate encryption keys for use in encrypting/decrypting data. Exemplary read and write operations of the host storage controller and the off-chip storage device are described herein. Examples are also described wherein the parameters are obtained from host memory rather than from the storage device. | 2014-10-16 |
20140310537 | System and Method for Aggressively Budgeting Power Allocation for an Information Handling System Using Redundant Configuration of Power Supply Units - A method that budgets power allocation for an information handling system (IHS) includes: in response to determining that the IHS is to be powered by a redundant configuration of PSUs, budgeting a first amount of power that is less than a maximum power that can be utilized by the system, and configuring the system to autonomously utilize unused operating margin of the secondary PSU(s) in a redundant configuration of the PSUs during periods in which the system requires greater than the first amount of power; and in response to the information handling system not being powered by a redundant configuration of multiple PSUs, budgeting a second amount of power for the system that is at least equal to the maximum power that can be utilized by the system and is within the output of the primary PSU. | 2014-10-16 |
20140310538 | Method for Protecting Electronic Device, and Electronic Device - A method for protecting an electronic device, where the electronic device includes a control switch for controlling output of a power supply, and the method includes: detecting whether an exception event occurs, and if it is detected that an exception event occurs, generating a control signal for controlling the control switch; and controlling, based on the control signal, the control switch to disconnect an output channel of the power supply. Correspondingly, an embodiment of the present invention further discloses an electronic device. In embodiments of the present invention, effective shutdown can be implemented after an exception occurs on an electronic device, thereby eliminating a potential security risk that an abnormal chip of the electronic device is continuously electrified after the electronic device shuts down because of an exception event. | 2014-10-16 |
20140310539 | Power Supply Unit (PSU) Right-Sizing that Supports Power Transients, with Mechanism for Dynamic Curtailment of Power Transients During a PSU Failure - A power controller of an information handling system (IHS) controls power allocation for the IHS with components that intermittently exhibit power transients. The power controller is configured to: identify an enhanced power state during which a maximum power required by the information handling system is greater than the amount of power provided by a primary PSU of a redundant configuration of PSUs; and allocate a portion of the unused operating margin of backup reserve power from the redundant PSUs to support intermittent power transients that occur during enhanced power state operation. The power controller is further configured to, in response to a detection of a condition that reduces an amount of unused operating margin of backup reserve power to less than an amount of additional power required to support the intermittent power transients, autonomously disable/limit the enhanced power state to prevent/limit an occurrence or magnitude of the intermittent power transients. | 2014-10-16 |
20140310540 | Interrupt Based Power State Management - A method and apparatus for power managed interrupt handling is disclosed. In one embodiment, a system includes one or more agents that may invoke an interrupt request. An interrupt controller is configured to receive and process the interrupt requests. When idle, the interrupt controller may be placed in a low power state. The system also includes an interrupt power control circuit coupled to receive interrupt request indications from each of the one or more agents that may invoke interrupts. The interrupt power control circuit is configured to assert a wakeup signal responsive to receiving an indication of an interrupt request from one of the agents. If the interrupt controller is in a low power state, it may exit the state and resume operation in an active state responsive to assertion of the wakeup signal. | 2014-10-16 |
20140310541 | Power Gating Shared Logic - We report methods, integrated circuit devices, and fabrication processes relating to power management transitions of multiple compute units sharing a resource. One method include, in response to an indication that a first compute unit of a plurality of compute units is attempting to enter a normal power state and in response to no other compute units being in a low power state, causing a resource to enter the normal power state, wherein the plurality of compute units share the resource; and causing the first compute unit to enter the normal power state. | 2014-10-16 |
20140310542 | METHOD FOR SAVING POWER ON MULTI-CHANNEL DEVICES - A method for turning a multi-channel link into a power saving mode may include detecting one or more events including a drop in a data throughput of the multi-channel link. In response to the detection of one or more events, data communication through one or more channels of the multi-channel link may be transferred to one or more other channels. The characteristics of the one or more channels may be adjusted to achieve power saving. Data communication through the one or more channels may be resumed at a reduced rate. Some of the one or more other channels of the multi-channel link may be configured to operate in a low-power or shut-down mode while the channels with adjusted characteristics are communicating data at the reduced rate. | 2014-10-16 |
20140310543 | METHOD AND APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM - A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention. | 2014-10-16 |
20140310544 | Method And Apparatus For A Zero Voltage Processor Sleep State - Embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. A voltage regulator may be coupled to a processor to provide an operating voltage to the processor. During a transition to a zero voltage power management state for the processor, the operational voltage applied to the processor by the voltage regulator may be reduced to approximately zero while an external voltage is continuously applied to a portion of the processor to save state variables of the processor during the zero voltage management power state. | 2014-10-16 |
20140310545 | Control Device for Current Switching and Electronic Device - A control device for current switching includes: a universal serial bus on-the-go (USB OTG) interface for connecting to a first device; a universal serial bus (USB) interface for connecting to a second device; a booster current-limiting circuit connected between the USB OTG interface and the USB interface, where the booster current-limiting circuit, the USB OTG interface, and the USB interface form a line for the device to supply power to a device; and a measuring and controlling unit connected to the booster current-limiting circuit, where the measuring and controlling unit is configured to change, after a current switching request is received, a resistance value of a current-limiting circuit in the booster current-limiting circuit, so that the first device supplies a corresponding current to the second device. The control device for current switching and the electronic device can improve universality of the control device for current switching. | 2014-10-16 |
20140310546 | Operating System Management of Network Interface Devices - Operating system management of network interface devices is described. In one or more implementations, a determination is made by an operating system that network traffic associated with one or more applications of the computing device has completed. Responsive to the determination, a network interface device is caused to transition to a mode to reduce power consumption of the network interface device by the operating system. | 2014-10-16 |
20140310547 | INTELLIGENT OVER-CURRENT PREVENTION - A system, method, and/or computer program product comprises an input/output (I/O) bus and an intelligent current bank that couples a voltage source to the I/O bus. The intelligent current bank includes an ammeter that measures a real-time flow of current to the I/O bus. In response to the current to the I/O bus exceeding a predetermined level, an intelligent Pulse-Width Modulator (iPWM) within the intelligent current bank selectively decreases current to one or more electronic devices on the I/O bus by shortening a duty cycle of voltage being received by the iPWM from the voltage source. | 2014-10-16 |
20140310548 | ELECTRONIC DEVICE AND METHOD FOR POWER MANAGEMENT - In a method for managing power of slave electronic devices using a master electronic device, the slave electronic devices are connected in sequence and an end one of the slave electronic devices is connected to the master electronic device. Each of the slave electronic devices determines and transmits their charging priority information to the master electronic device. The master electronic device determines a charging sequence of the slave electronic devices, determines a target one of the slave electronic devices according to the charging sequence, and sends a charging signal to the connected slave electronic devices, to charge the target one of the slave electronic devices. | 2014-10-16 |
20140310549 | FIFO Clock and Power Management - An apparatus and method for saving power when transmitting data across a clock boundary is disclosed. In one embodiment, an apparatus includes a FIFO coupled to receive data from circuitry in a first clock domain and output data to circuitry in a second clock domain. A first control circuit is responsible for writing data into the FIFO. A second control circuit is responsible for reading data from the FIFO. If the amount of data in the FIFO exceeds a first threshold, a power management circuit may place the first control circuit in a low power state. The second control circuit may monitor the amount of data in the FIFO. If the amount of data in the FIFO falls below a second threshold, it may assert an indication to the power management circuit. Thereafter, the power management circuit may cause the first control circuit to exit the low power state. | 2014-10-16 |
20140310550 | PCIE DEVICE POWER STATE CONTROL - An apparatus, system, and method, the method including receiving an indication of a idle state capability of a platform connected device; determining, by a chipset, an idle power state compatible with the device; and directing the device to enter the determined idle power state based on a power state of the chipset. | 2014-10-16 |
20140310551 | SYSTEM WAKEUP ON WIRELESS NETWORK MESSAGES - While an information handling device is in a reduced power state, the information handling device transitions from the reduced power state to a higher power state in response to receiving a message over an established wireless network connection that maintains a presence on a wireless network. In turn, the information handling device processes the message accordingly in the higher power state. | 2014-10-16 |
20140310552 | REDUCED-POWER SLEEP STATE S3 - Current computer systems support sleep states such as sleep state S | 2014-10-16 |
20140310553 | HARDWARE AND SOFTWARE FOR SYNCHRONIZED DATA ACQUISITION FROM MULTIPLE DEVICES - A computer may assign a master device and at least one slave device. A program may direct the master device to broadcast counts based on its data acquisition clock. Then at least one slave device may receive the broadcast count and determine the difference between the clock count of the slave and the clock count of the master. The slave may use the difference of the counts to control the slave's voltage-controlled crystal oscillator. | 2014-10-16 |
20140310554 | SYSTEM AND METHOD FOR GRAPH BASED K-REDUNDANT RESILIENCY FOR IT CLOUD - A method for enabling resiliency for cloud computing systems is described. The method includes modifying a topology graph of a network architecture by mapping processes flows onto the topology graph. A resiliency graph is created based on the modified topology graph. The method includes modifying the resiliency graph by translating at least one SLA into the resiliency graph. Overlaps and dependencies in the modified resiliency graph are identified. Apparatus and computer readable instructions are also described. | 2014-10-16 |
20140310555 | PHYSICAL DOMAIN ERROR ISOLATION AND RECOVERY IN A MULTI-DOMAIN SYSTEM - The disclosed embodiments disclose techniques for performing physical domain error isolation and recovery in a multi-domain system, where the multi-domain system includes two or more processor chips and one or more switch chips that provide connectivity and cache-coherency support for the processor chips, and the processor chips are divided into two or more distinct domains. During operation, one of the switch chips determines a fault in the multi-domain system. The switch chip determines an originating domain that is associated with the fault, and then signals the fault and an identifier for the originating domain to its internal units, some of which perform clearing operations that clear out all traffic for the originating domain without affecting the other domains of the multi-domain system. | 2014-10-16 |
20140310556 | MANAGEMENT APPARATUS AND MANAGEMENT METHOD - Management apparatus and method to prevent a drop in the service quality of data. In a computer system which replicates and holds data which is stored in a storage apparatus by a communication terminal in other storage apparatuses, physical position information of the storage apparatuses and the communication terminal is collected and, at the time of the disaster recovery processing, a storage apparatus for which the data of the secondary system is to be switched to the primary system is selected from among the storage apparatuses which hold the data of the secondary system on the basis of physical position information in a first predetermined period among the collected physical position information of the communication terminal, and a policy preconfigured for the data, and an instruction is issued to the selected storage apparatus to switch the data of the secondary system held by the storage apparatus to the primary system. | 2014-10-16 |
20140310557 | DESTAGING CACHE DATA USING A DISTRIBUTED FREEZER - Methods, apparatus and computer program products implement embodiments of the present invention that enable digital information devices having respective storage devices and memories to distributedly store, for a logical volume, data and first and second parity values across corresponding regions of the storage devices. Freezers having a one-to-one correspondence with the storage devices are distributedly stored in the memories. Upon detecting, in a cache, updated data for one or more first regions on the storage devices, existing data from the one or more first regions, and additional data for parity calculations are retrieved from one or more corresponding second regions on the storage devices, and first and the second parity values are calculated using the updated data, the existing data and the additional data. The updated data and the calculated first and second parity values are stored to the freezers, and then destaged from the freezers to the storage devices. | 2014-10-16 |
20140310558 | LOW- LEVEL CHECKING OF CONTEXT-DEPENDENT EXPECTED RESULTS - A processor-implemented method for diagnostic testing using an expected result parameter is provided. The processor-implemented method may include establishing a known system environment associated with a function under test and setting the expected result parameter corresponding to the function under test and the known system environment. A call is issued by the processor to execute the function under test. Before returning to the caller, the function under test compares an expected result value to an actual result value. The function under test determines an error based on the actual result value being different from the expected result value and performs a low-level diagnostic based on the determined error. Then the processor receives a return value from the function under test based on the issued call. | 2014-10-16 |
20140310559 | System And Method For Graph Based K- Redundant Resiliency For IT Cloud - An apparatus for enabling resiliency for cloud computing systems is provided. An apparatus includes a processor and a memory storing computer program code. The memory and the computer program code are configured to, with the processor, cause the apparatus to perform actions. The actions include modifying a topology graph of a network architecture by mapping processes flows onto the topology graph and creating a resiliency graph based on the modified topology graph. The actions also include modifying the resiliency graph by translating at least one SLA into the resiliency graph and identifying overlaps and dependencies in the modified resiliency graph. Apparatus and computer readable instructions are also described. | 2014-10-16 |
20140310560 | METHOD AND APPARATUS FOR MODULE REPAIR IN SOFTWARE - The present application relates to a method and apparatus for module repair in software. In the method, when a module in the software has an error, correct content corresponding to the erroneous content is obtained by way of accessing a web page address; then the correct content obtained is directly loaded into a system memory and the corresponding correct content is invoked directly from the memory when the module is used. The method of the present application results in the software possessing a self-repairing function and self-detection function, and can be applied in any software device. | 2014-10-16 |
20140310561 | DYNAMIC FUNCTION-LEVEL HARDWARE PERFORMANCE PROFILING FOR APPLICATION PERFORMANCE ANALYSIS - The invention is directed to a computer implemented method and a system that implements an application performance profiler with hardware performance event information. The profiler provides dynamic tracing of application programs, and offers fine-grained hardware performance event profiling at function levels. To control the perturbation on target applications, the profiler also includes a control mechanism to constraint the function profiling overhead within a budget configured by users. | 2014-10-16 |
20140310562 | Method and Device For Signing Program Crash - A method and a device for signing a program crash are disclosed, which are applied to the filed of communication technology. The device for signing the program crash firstly acquires stack information invoked when the program crash occurs during executing a process of an application program by a computer system, then acquires first stack information corresponding to the process of the application program from the acquired stack information, and signs the occurred program crash based on the first stack information. | 2014-10-16 |
20140310563 | COMPUTER-IMPLEMENTED METHODS AND SYSTEMS FOR TESTING ONLINE SYSTEMS AND CONTENT - Computer-implemented methods and systems are provided for scanning web sites and/or parsing web content, including for testing online opt-out systems and/or cookies used by online systems. In accordance with one implementation, a computer-implemented method is provided for testing an opt-out system associated with at least one advertising system that uses cookies. The method includes transmitting a first request to an opt-out system, wherein the first request corresponds to a first test for testing at least one of the opt-out system and an advertising system; receiving a first stream sent in response to the first request; determining a first outcome of the first test based on the first stream; and generating a report based on the first outcome. | 2014-10-16 |
20140310564 | Autonomous Service Management - Novel tools and techniques that offer more robust solutions for application service management. Some such solutions provide a service management framework for managing a software application. In some cases, the framework can include multiple tools to detect and/or remedy application problems at a variety of different levels. In another aspect, some solutions can define multiple application lifecycle phases, ranging from minor impairment to catastrophic failure. For each of such phases, the service management framework can define one or more diagnostic criteria and/or one or more corrective actions that can be taken to remedy a suboptimal condition of the application. | 2014-10-16 |
20140310565 | SCAN COMPRESSION RATIO BASED ON FAULT DENSITY - A processor-implemented method for determining scan compression ratio based on fault density is provided. The processor-implemented method may include calculating, by a processor, a fault density value for each of a plurality of partitions of an integrated circuit. The fault density is computed by the processor based on a ratio of a total number of faults per partition to a total number of flip-flops per partition. The processor-implemented method further includes the processor determining a compression ratio for each of the plurality of partitions based on the fault density value for each of the plurality of partitions and applying the compression ratio to each of the plurality of the partitions of the integrated circuit. | 2014-10-16 |
20140310566 | System and Method to Detect and Communicate Loss and Retention of Synchronization in a Real-Time Data Transfer Scheme - A system and method are described for correcting for a loss of message boundary in a real-time data transmission over an interconnect between a source node and a destination node in an apparatus. In the apparatus, a destination node received one or more messages, wherein each message includes one or more data frames, and each data frame of each message includes an end-of-message flag and a message sequence number, the end-of-message flag set when the data frame is the last data frame in a particular message, and the message sequence number is different for different messages. A loss of message boundary is determined for a previous message when a new data frame of a new message is received and the new message sequence number of the new data frame is different from the previous message sequence number and a last received data frame did not include a set end-of-message flag. To establish re-synchronization, the destination node transmits a synchronization loss message to the source node, and the destination node receives in reply a status report message, and the destination node can regain synchronization of the last received message data such that a previous message boundary can be determined according to the status report message. | 2014-10-16 |
20140310567 | TRANSMISSION APPARATUS INCLUDING ENCODER, RECEPTION APPARATUS INCLUDING DECODER, AND ASSOCIATED METHODS - An encoder and decoder using LDPC-CC which avoid lowering the transmission efficiency of information while not deteriorating error correction performance, even at termination; and an encoding method of the same. A termination sequence length determining unit determines the sequence length of a termination sequence transmitted added to the end of an information sequence, according to the information length (information size) and encoding rate of the information sequence. A parity calculation unit carries out LDPC-CC coding on the information sequence and the known-information sequence necessary for generating a termination sequence of the determined termination sequence length, and calculates a parity sequence. | 2014-10-16 |
20140310568 | RECEIVER, COMMUNICATION DEVICE, AND COMMUNICATION METHOD - A Sum-product decoder | 2014-10-16 |
20140310569 | Restoring ECC syndrome in non-volatile memory devices - A method of restoring an ECC syndrome in a non-volatile memory device having memory cells arranged in a plurality of sectors within a memory cell array, the method comprising identifying a first sector including at least one page having a disabled ECC (error correction code) flag; reading the value of all data bits in said at least one page; calculating values for ECC bits in said at least one page; and writing said data bit values and said calculated ECC bit values to a second sector in the memory cell array. | 2014-10-16 |
20140310570 | STALE DATA DETECTION IN MARKED CHANNEL FOR SCRUB - Embodiments relate to stale data detection in a marked channel for a scrub. An aspect includes bringing the marked channel online, wherein the computer comprises a plurality of memory channels comprising the marked channel and a remaining plurality of unmarked channels. Another aspect includes performing a scrub read of an address in the plurality of memory channels. Another aspect includes determining whether data returned by the scrub read from the marked channel is valid or stale based on data returned from the unmarked channels by the scrub read. Another aspect includes based on determining that the data returned by the scrub read from the marked channel is valid, not performing a scrub writeback to the marked channel. Another aspect includes based on determining that the data returned by the scrub read from the marked channel is stale, performing a scrub writeback of corrected data to the marked channel. | 2014-10-16 |
20140310571 | Local Erasure Codes for Data Storage - In some examples, an erasure code can be implemented to provide for fault-tolerant storage of data. Maximally recoverable cloud codes, resilient cloud codes, and robust product codes are examples of different erasure codes that can be implemented to encode and store data. Implementing different erasure codes and different parameters within each erasure code can involve trade-offs between reliability, redundancy, and locality. In some examples, an erasure code can specify placement of the encoded data on machines that are organized into racks. | 2014-10-16 |
20140310572 | EFFICIENT STORAGE OF ENCRYPTED DATA IN A DISPERSED STORAGE NETWORK - A method begins with a processing module obtaining data to store and determining whether substantially similar data to the data is stored. When the substantially similar data is not stored, the method continues with the processing module generating a first encryption key based on the data, encoding the first encryption key into encoded data slices in accordance with an error coding dispersal storage function, and storing the encoded data slices in a dispersed storage network (DSN) memory. The method continues with the processing module encrypting the data using an encryption key of the substantially similar data in accordance with an encryption function to produce encrypted data, compressing the encrypted data in accordance with a compression function to produce compressed data, storing the compressed data when the substantially similar data is stored. | 2014-10-16 |
20140310573 | SYSTEMS AND METHODS TO IMPROVE THE RELIABILITY AND LIFESPAN OF FLASH MEMORY - A method for controlling flash memory is described. The method includes selecting a new forward error correction (FEC) parameter set that provides more redundancy than a current FEC parameter set. The method also includes coding source information bits, using the new FEC parameter set, during write operations to a first corrupted page in the flash memory. The method further includes mapping the first corrupted page and at least one additional corrupted page in the flash memory to a single logical page with an expected page size. | 2014-10-16 |
20140310574 | Green eMMC Device (GeD) Controller with DRAM Data Persistence, Data-Type Splitting, Meta-Page Grouping, and Diversion of Temp Files for Enhanced Flash Endurance - A controller for a Super Enhanced Endurance Device (SEED) or Solid-State Drive (SSD) increases flash endurance using a DRAM buffer. Host accesses to flash are intercepted by the controller and categorized as data types of paging files, temporary files, meta-data, and user data files, using address ranges and file extensions read from meta-data tables. Paging files and temporary files are optionally written to flash. Full-page and partial-page data are grouped into multi-page meta-pages by data type in the DRAM before storage by lower-level flash devices such as eMMC, UFS, or iSSD. Caches in the DRAM buffer for storing each data type are managed and flushed to the flash devices by the controller. Write dates are stored for pages or blocks for management functions. A spare/swap area in DRAM reduces flash wear. Reference voltages are adjusted when error correction fails. | 2014-10-16 |
20140310575 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written. | 2014-10-16 |
20140310576 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written. | 2014-10-16 |
20140310577 | TRANSMITTING APPARATUS, INTERLEAVING METHOD THEREOF, RECEIVING APPARATUS, AND DEINTERLEAVING METHOD THEREOF - A transmitting apparatus and method, and a receiving apparatus and method are provided. The transmitting apparatus includes: an encoder configured to perform encoding on data including information bits; and a bit interleaver configured to perform interleaving on the information bits and parity bits generated by the encoding, wherein the bit interleaver is configured to classify the generated parity bits into a plurality of groups and write the information bits and the generated parity bits in a plurality of columns in a column direction such that parity bits included in a predetermined group among the plurality of groups are arranged in predetermined positions in the plurality of columns, to perform the interleaving. | 2014-10-16 |
20140310578 | DECODING APPARATUS AND METHOD - The present disclosure relates to a turbo decoder and decoding method thereof. The turbo decoder has a plurality of decoder cores. The decoding method includes: computing remaining decoding times for the multiple decoder cores; selecting a decoder core with the shortest remaining decoding time among the multiple decoder cores; and allocating a packet to the selected decoder core. The decoder cores of the turbo decoder are monitored in real time and resources are distributed through efficient decoder core selection enhancing decoding throughput. | 2014-10-16 |
20140310579 | METHOD FOR GENERATING FORWARD ERROR CORRECTION PACKET IN MULTIMEDIA SYSTEM AND METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING FORWARD ERROR CORRECTION PACKET - A method and apparatus for transmitting a Forward Error Correction (FEC) packet block including a plurality of FEC packets in a multimedia system are provided. The method includes generating a plurality of first FEC packet blocks by performing a first FEC encoding on a plurality of source symbols, each of the plurality of first FEC packet blocks including at least one source packet and at least one repair packet for repair of each of the at least one source packet, generating a second FEC packet block by performing a second FEC encoding on the plurality of first FEC packet blocks, the second FEC packet block including at least one repair packet for the plurality of first FEC packet blocks, and transmitting the second FEC packet block that includes, in header information of each of the at least one source packet and the at least one repair packet. | 2014-10-16 |
20140310580 | Cyclic Decoding for Cascaded Forward Error-Correction FEC Codes - A computer implemented method for a cyclic (forward-backward) decoding for a forward error-correction FEC scheme includes decoding a given k−1 | 2014-10-16 |
20140310581 | METHOD FOR FORMING A CRC VALUE AND TRANSMITTING AND RECEIVING APPARATUS THEREFOR - In a method for forming a CRC value using a plurality of data blocks, the CRC protection can be improved even further by virtue of the fact that, in order to form the CRC value, data blocks which are not transmitted to a receiver or have not been transmitted to a receiver are placed in front of data blocks which are transmitted to the receiver or have been transmitted to the receiver. | 2014-10-16 |
20140310582 | Apparatus and Method for Building an Electronic Form - A system and method for creating an electronic form used to chronicle a healthcare interaction between a patient and healthcare provider is provided. A repository stores form control data objects, each of the form control data objects enabling user data entry of information associated with a respective aspect of the healthcare interaction. A form processor acquires form control data objects associated with a particular healthcare interaction from the repository and generates form creation data including the acquired form control data objects and a formatting grid, the formatting grid receives at least one of the acquired form control data objects. A user interface generator generates a form creation user interface using the form creation data received from the form processor that enables a user to selectively position the at least one of the acquired form control data objects within the formatting grid in a desired position. | 2014-10-16 |
20140310583 | METHODS AND SYSTEMS FOR PROCESSING DOCUMENTS - The present disclosure describes a method and system for processing forms filled by a user. The system includes a scanner configured to scan a first form in a first language that includes one or more fillable fields filled with content; a content extractor configured to extract content from the scanned filled fields; a content processor configured to process the extracted content; and an embedding module configured to embed the processed content into a second form including one or more fields corresponding to the fillable fields of the first form. | 2014-10-16 |
20140310584 | MEDICAL CARE INFORMATION DISPLAY CONTROL APPARATUS, MEDICAL CARE INFORMATION DISPLAY CONTROL METHOD, AND MEDICAL CARE INFORMATION DISPLAY CONTROL PROGRAM - Identifying a display reference date according to a position in a first region representing a time axis received on a display screen, obtaining a number of display days of a second region in which a plurality of sets of medical care information of a display target person is displayed in time series on a daily basis, determining a plurality of medical care data dates as a plurality of display dates to be displayed in the second region in the order of closeness to the display reference date in a time axis direction such that the number of display days is satisfied based on the plurality of medical care data dates and the number of display days, and displaying medical care information corresponding to the determined plurality of display dates in the second region on a display screen. | 2014-10-16 |
20140310585 | BROWSING SYSTEM, TERMINAL, IMAGE SERVER, PROGRAM, COMPUTER-READABLE RECORDING MEDIUM STORING PROGRAM, AND METHOD - A browsing system ( | 2014-10-16 |
20140310586 | Systems and Methods for Displaying Annotated Video Content by Mobile Computing Devices - Systems and methods for displaying annotated video content by mobile computing devices. An example method may comprise: presenting, on a display of a mobile computing device, a video stream including a plurality of video frames; presenting a video annotation overlaid over a frame of the plurality of video frames; receiving a user interface command via a user input interface of the mobile computing device; and performing an action related to the video annotation, the action defined by the user interface command. | 2014-10-16 |
20140310587 | APPARATUS AND METHOD FOR PROCESSING ADDITIONAL MEDIA INFORMATION - Disclosed is an apparatus and a method for processing additional media information, including an acquisition unit to acquire, from a database, when media data is input through an interface, a pattern corresponding to the input media data and a processor to determine a sensory effect corresponding to the acquired pattern and generate a first annotation of the determined sensory effect. | 2014-10-16 |