40th week of 2015 patent applcation highlights part 81 |
Patent application number | Title | Published |
20150279992 | METHOD OF MANUFACTURING FIN FIELD EFFECT TRANSISTOR - The present invention provides a method of manufacturing a fin field effect transistor, comprising: providing an SOI substrate comprising a substrate layer ( | 2015-10-01 |
20150279993 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor structure is disclosed. The semiconductor structure comprises: a substrate ( | 2015-10-01 |
20150279994 | SEMICONDUCTOR DEVICE WITH FIN AND RELATED METHODS - A semiconductor device may include a substrate, a fin above the substrate and having a channel region therein, and source and drain regions adjacent the channel region to generate shear and normal strain on the channel region. A semiconductor device may include a substrate, a fin above the substrate and having a channel region therein, source and drain regions adjacent the channel region, and a gate over the channel region. The fin may be canted with respect to the source and drain regions to generate shear and normal strain on the channel region. | 2015-10-01 |
20150279995 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - Methods of forming a semiconductor device may include forming a fin-type active pattern that extends in a first direction on a substrate, the fin-type active pattern including a lower pattern on the substrate and an upper pattern on the lower pattern. A field insulating layer is formed on the substrate, the sidewalls of the fin-type active pattern, and a portion upper pattern protruding further away from the substrate than a top surface of the field insulating layer. A dummy gate pattern that intersects the fin-type active pattern and that extends in a second direction that is different from the first direction is formed. The methods include forming dummy gate spacers on side walls of the dummy gate pattern, forming recesses in the fin-type active pattern on both sides of the dummy gate pattern and forming source and drain regions on both sides of the dummy gate pattern. | 2015-10-01 |
20150279996 | SELF-ALIGNED CONTACT PROCESS ENABLED BY LOW TEMPERATURE - Self-aligned contacts of a semiconductor device are fabricated by forming a metal gate structure on a portion of a semiconductor layer of a substrate. The metal gate structure contacts inner sidewalls of a gate spacer. A second sacrificial epitaxial layer is formed on a first sacrificial epitaxial layer. The first sacrificial epitaxial layer is adjacent to the gate spacer and is formed on source/drain regions of the semiconductor layer. The first and second sacrificial epitaxial layers are recessed. The recessing exposes at least a portion of the source/drain regions. A first dielectric layer is formed on the exposed portions of the source/drain regions, and over the gate spacer and metal gate structure. At least one cavity within the first dielectric layer is formed above at least one of the exposed portions of source/drain regions. At least one metal contact is formed within the at least one cavity. | 2015-10-01 |
20150279997 | VERTICAL SUPER-THIN BODY SEMICONDUCTOR ON DIELECTRIC WALL DEVICES AND METHODS OF THEIR FABRICATION - The present invention is a semiconductor device comprising a semiconducting low doped vertical super-thin body (VSTB) formed on Dielectric Body Wall (such as STI-wall as isolating substrate) having the body connection to bulk semiconductor wafer on the bottom side, isolation on the top side, and the channel, gate dielectric, and gate electrode on opposite to STI side surface. The body is made self-aligned to STI hard mask edge allowing tight control of body thickness. Source and Drain are made by etching holes vertically in STI at STI side of the body and filling with high doped crystalline or poly-Si appropriately doped with any appropriate silicides/metal contacts or with Schottky barrier Source/Drain. Gate first or Gate last approaches can be implemented. Many devices can be fabricated in single active area with body isolation between the devices by iso-plugs combined with gate electrode isolation by iso-trenches. The body can be made as an isolated nano-plate or set nano-wire MOSFET's on the STI wall to form VSTB SOI devices. | 2015-10-01 |
20150279998 | SEMICONDUCTOR DEVICE HAVING FIN CHANNEL AND METHOD FOR FORMING THE SAME - A semiconductor device includes an active region with a first gate trench formed when a gate region is etched to a first depth, a device isolation film defining the active region and including a second gate-trench formed when a gate region is etched to a second depth, a gate buried below the first gate trench and the second gate trench, and a source plug and a drain plug formed when a conductive material is deposited in a source region and a drain region of the active region. | 2015-10-01 |
20150279999 | FINFET DEVICES WITH DIFFERENT FIN HEIGHTS IN THE CHANNEL AND SOURCE/DRAIN REGIONS - One method disclosed includes, forming a sacrificial gate structure trench in a stack of sacrificial material layers, forming a sacrificial gate structure within the trench, performing at least one process operation to remove at least portions of the stack of sacrificial material layers and thereby expose sidewalls of the sacrificial gate structure, forming a sidewall spacer adjacent the exposed sidewalls of the sacrificial gate structure, removing the sacrificial gate structure so as to define a replacement gate cavity between the spacers, forming a replacement gate structure in the replacement gate cavity, and forming a gate cap above the replacement gate structure within the replacement gate cavity. | 2015-10-01 |
20150280000 | TRANSISTORS, METHODS OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICES INCLUDING TRANSISTORS - According to example embodiments, a transistor includes a gate, a channel layer that is separate from the gate, a gate insulating layer between the gate and the channel layer, and a source electrode and a drain electrode respectively contacting a first region and a second region of the channel layer. The gate insulating layer includes an impurity metal containing region that includes an impurity metal and contacts the channel layer. The gate insulating layer includes an impurity metal non-containing region contacting the gate that is not doped with the impurity metal. | 2015-10-01 |
20150280001 | SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE - A semiconductor device excellent in writing operation is provided. In a structure where a data voltage supplied to a source line is supplied to a node of a memory cell via a bit line, a switch is provided between memory cells connected to the bit line. During a period in which the data voltage is supplied to the node of the memory cell, the switch on the bit line, which is provided between the memory cells, is off. With such a structure, parasitic capacitance of the bit line during a period in which the data voltage is supplied to the node of the memory cell can be reduced. As a result, writing of the data voltage into the memory cell can be performed fast. | 2015-10-01 |
20150280002 | METAL OXIDE THIN FILM TRANSISTOR WITH CHANNEL, SOURCE AND DRAIN REGIONS RESPECTIVELY CAPPED WITH COVERS OF DIFFERENT GAS PERMEABILITY - An apparatus is provided that includes a substrate and source and drain regions within an annealed active layer having resulted from an annealing of an active layer comprising metal-oxide and formed on the substrate, and an impermeable layer over the source and drain regions of the annealed active layer, wherein the annealing resulting in the annealed active layer was performed with the impermeable layer over portions of the active layer corresponding to the source and drain regions, thereby resulting in a reduction of a resistivity of the source and drain regions of the annealed active layer relative to the active layer. In another aspect, a junctionless transistor is provided wherein the entire active area has a low resistivity based on annealing of an active layer including metal oxide while uncovered or at least partially covered with layers of various gas permeability under oxidizing or non-oxidizing conditions. | 2015-10-01 |
20150280003 | SEMICONDUCTOR DEVICE - A transistor that is to be provided has such a structure that a source electrode layer and a drain electrode layer between which a channel formation region is sandwiched has regions projecting in a channel length direction at lower end portions, and an insulating layer is provided, in addition to a gate insulating layer, between the source and drain electrode layers and a gate electrode layer. In the transistor, the width of the source and drain electrode layers is smaller than that of an oxide semiconductor layer in the channel width direction, so that an area where the gate electrode layer overlaps with the source and drain electrode layers can be made small. Further, the source and drain electrode layers have regions projecting in the channel length direction at lower end portions. | 2015-10-01 |
20150280004 | EMBEDDED NONVOLATILE MEMORY - A nonvolatile memory embedded in an advanced logic circuit and a method forming the same are provided. In the nonvolatile memory, the word lines and erase gates have top surfaces lower than the top surfaces of the control gate. In addition, the word lines and the erase gates are surrounded by dielectric material before a self-aligned silicidation process is performed. Therefore, no metal silicide can be formed on the word lines and the erase gate to produce problems of short circuit and current leakage in a later chemical mechanical polishing process. | 2015-10-01 |
20150280005 | METHOD FOR DRIVING SEMICONDUCTOR DEVICE - To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period. | 2015-10-01 |
20150280006 | PRINTED TRANSISTOR AND FABRICATION METHOD - A method for fabricating a thin film transistor includes printing source, drain and channel regions on a passivated transparent substrate, forming a gate dielectric over the channel region and forming a gate conductor over the gate dielectric. A permanent antireflective coating is deposited over the source region, drain region and gate electrode, and an interlevel dielectric layer is formed over the permanent antireflective coating. Openings in the permanent antireflective coating and the interlevel dielectric layer are formed to provide contact holes to the source region, drain region and gate electrode. A conductor is deposited in the contact holes to electrically connect to the source region, drain region and gate electrode. Thin film transistor devices and other methods are also disclosed. | 2015-10-01 |
20150280007 | DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME - It is an object of the present invention to provide a method for manufacturing a display device in which unevenness generated under a light-emitting element does not impart an adverse effect on the light-emitting element. It is another object of the invention to provide a method for manufacturing a display device in which penetration of water into the inside of the display device through a film having high moisture permeability can be suppressed without increasing processing steps considerably. A display device of the present invention comprises a thin film transistor and a light-emitting element, the light-emitting element including a light-emitting laminated body interposed between a first electrode and a second electrode; wherein the first electrode is formed over an insulating film formed over the thin film transistor; and wherein a planarizing film is formed in response to the first electrode between the first electrode and the insulating film. | 2015-10-01 |
20150280008 | MULTI-GATE THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY DEVICE - The present invention discloses a multi-gate thin film transistor for realizing a multi-gate occupying a small area, pixels provided with the multi-gate TFTs are high in aperture ratio, and a display device provided with the multi-gate TFTs is high in resolution. The multi-gate thin film transistor comprises: at least three gate electrodes; a plurality of active layers corresponding to each of the gate electrodes, respectively, the active layers being formed into an integrated structure; a source electrode connected with one of the plurality of active layers; and a plurality of drain electrodes connected with each of the remainder of the plurality of active layers, respectively. The present invention further discloses an array substrate comprising the multi-gate thin film transistor, and a display device. | 2015-10-01 |
20150280009 | Semiconductor Device and Method for Manufacturing the Same - A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region. | 2015-10-01 |
20150280010 | METHOD FOR MANUFACTURING POLYCRYSTALLINE SEMICONDUCTOR THIN FILM AND TRANSISTOR DEVICE STRUCTURE USING THE SAME - A transistor device structure includes a substrate, a first polycrystalline semiconductor thin film and a first transistor unit. The first polycrystalline semiconductor thin film is disposed on the substrate. A grain diameter of the first polycrystalline semiconductor thin film is greater than 1 micrometer and a thickness of the first polycrystalline semiconductor thin film is less than three hundredths of the grain diameter. The first transistor unit is disposed on the first polycrystalline semiconductor thin film and includes a first gate dielectric layer and a first gate structure. The first gate dielectric layer is disposed on a surface of the first polycrystalline thin film semiconductor. The first gate structure is disposed on a surface of the first gate dielectric layer. | 2015-10-01 |
20150280011 | Method of Manufacturing N-Doped Graphene and Electrical Component Using NH4F, and Graphene and Electrical Component Thereby - This disclosure relates to a method of manufacturing n-doped graphene and an electrical component using ammonium fluoride (NH | 2015-10-01 |
20150280012 | ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - A transistor includes a channel layer in which a plurality of graphene whose edge portions are terminated with modifying groups different from each other are bonded to each other; a gate electrode formed on the channel layer via a gate insulating film; and a source electrode and a drain electrode formed on the channel layer. | 2015-10-01 |
20150280013 | TRANSISTOR AND SEMICONDUCTOR DEVICE - A transistor with small parasitic capacitance can be provided. A transistor with high frequency characteristics can be provided. A semiconductor device including the transistor can be provided. Provided is a transistor including an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor has a first region where the first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween; a second region where the first conductor overlaps with the second conductor with the first and second insulators positioned therebetween; and a third region where the first conductor overlaps with the third conductor with the first and second insulators positioned therebetween. The oxide semiconductor including a fourth region where the oxide semiconductor is in contact with the second conductor; and a fifth region where the oxide semiconductor is in contact with the third conductor. | 2015-10-01 |
20150280014 | TFT AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE - The present invention provides a TFT and a manufacturing method thereof, an array substrate and a display device. The TFT comprises a gate, an active layer located on the gate, an ohmic contact layer located on the active layer, and a first electrode and a second electrode located on the ohmic contact layer, wherein the first electrode and the second electrode are partially overlapped with the active layer, the ohmic contact layer is located within a region where the first electrode and the second electrode are overlapped with the active layer; the active layer is partially overlapped with the gate, the active layer comprises at least one opening region partially overlapped with the gate; and the first electrode and/or the second electrode extends beyond the active layer through the at least one opening region. | 2015-10-01 |
20150280015 | DIODE WITH INSULATED ANODE REGIONS - A diode is integrated on a semiconductor chip having anode and cathode surfaces opposite to each other. The diode comprises a cathode region extending inwardly from the cathode surface, a drift region extending between the anode surface and the cathode region, and a plurality of anode regions extending from the anode surface in the drift region. The diode further comprises a cathode electrode coupled with the cathode region, and an anode electrode that contacts one or more contacted anode regions of said anode regions and is electrically insulated from one or more floating anode regions of the anode regions. The diode is configured so that charge carriers are injected from the floating anode regions into the drift region in response to applying of a control voltage exceeding a threshold voltage. | 2015-10-01 |
20150280016 | DISCRETE CAPACITOR AND MANUFACTURING METHOD THEREOF - A discrete capacitor of the present invention includes a substrate having a front surface portion, an impurity diffusion layer formed on the front surface portion of the substrate, an oxide film formed on the substrate and having a first opening to selectively expose the impurity diffusion layer, a dielectric film formed on the impurity region having been exposed from the oxide film, and a first electrode opposed to the impurity diffusion layer with the dielectric film therebetween, wherein the impurity concentration on the front surface portion of the impurity diffusion layer is 5×10 | 2015-10-01 |
20150280017 | NANOMETER SIZED STRUCTURES GROWN BY PULSED LASER DEPOSITION - Nanometer sized materials can be produced by exposing a target to a laser source to remove material from the target and deposit the removed material onto a surface of a substrate to grow a thin film in a vacuum chamber | 2015-10-01 |
20150280018 | PASSIVATION OF LIGHT-RECEIVING SURFACES OF SOLAR CELLS - Methods of passivating light-receiving surfaces of solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a silicon substrate having a light-receiving surface. An intrinsic silicon layer is disposed above the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the intrinsic silicon layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer. In another example, a solar cell includes a silicon substrate having a light-receiving surface. A tunneling dielectric layer is disposed on the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the tunneling dielectric layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer. | 2015-10-01 |
20150280019 | SOLAR CELL - It is an object of the present invention to provide a solar cell capable of exhibiting excellent photoelectric conversion efficiency even when ultraviolet light is blocked. The present invention relates to a solar cell including: a cathode; an anode; a photoelectric conversion layer disposed between the cathode and the anode; and an electron transport layer disposed between the cathode and the photoelectric conversion layer, the electron transport layer containing titanium oxide and at least one element selected from the group consisting of pentavalent elements and hexavalent elements. | 2015-10-01 |
20150280020 | Method of passivating a silicon substrate for use in a photovoltaic device - A method of passivating a silicon substrate for use in a photovoltaic device, comprising providing a silicon substrate having a bulk and exhibiting a front surface and a rear surface, and forming by liquid phase application a dielectric layer on at least said rear surface. The dielectric layer formed at the rear surface is capable of acting as a reflector to enhance reflection of light into the bulk of the silicon substrate, and the dielectric layer is capable of releasing hydrogen into the bulk as well as onto a surface of the silicon substrate in order to provide hydrogenation and passivation. The present invention provides an inexpensive, low cost method of improving the electrical and/or optical performance of photovoltaic devices through the application of coating chemicals onto the backside of the silicon substrate. | 2015-10-01 |
20150280021 | FOIL-BASED METALLIZATION OF SOLAR CELLS - Approaches for the foil-based metallization of solar cells and the resulting solar cells are described. In an example, a solar cell includes a substrate. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the substrate. A conductive contact structure is disposed above the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal seed material regions providing a metal seed material region disposed on each of the alternating N-type and P-type semiconductor regions. A metal foil is disposed on the plurality of metal seed material regions, the metal foil having anodized portions isolating metal regions of the metal foil corresponding to the alternating N-type and P-type semiconductor regions. | 2015-10-01 |
20150280022 | SURFACE PREPARATION AND UNIFORM PLATING ON THROUGH WAFER VIAS AND INTERCONNECTS FOR PHOTOVOLTAICS - Photovoltaic devices are formed by laser drilling vias through silicon substrates and, following surface preparation of the via sidewalls, plating a continuous, electrically conductive layer on the via sidewalls to electrically connect the emitter side of the cell with the back side of the cell. The electrically conductive layer can be formed on portions of a base emitter within the vias and on the back side of the substrate. Alternatively, the electrically conductive layer can be formed on a passivation layer on the via sidewalls and back side of the cell. | 2015-10-01 |
20150280023 | UNIFORMLY DISTRIBUTED SELF-ASSEMBLED CONE-SHAPED PILLARS FOR HIGH EFFICIENCY SOLAR CELLS - A method for fabricating a photovoltaic device includes applying a diblock copolymer layer on a substrate and removing a first polymer material from the diblock copolymer layer to form a plurality of distributed pores. A pattern forming layer is deposited on a remaining surface of the diblock copolymer layer and in the pores in contact with the substrate. The diblock copolymer layer is lifted off and portions of the pattern forming layer are left in contact with the substrate. The substrate is etched using the pattern forming layer to protect portions of the substrate to form pillars in the substrate such that the pillars provide a radiation absorbing structure in the photovoltaic device. | 2015-10-01 |
20150280024 | COMPOSITION FOR FORMING SOLAR CELL ELECTRODE, AND ELECTRODE PRODUCED FROM COMPOSITION - A composition for solar cell electrodes includes a conductive powder, a glass frit, an organic vehicle, and a thixotropic agent, the composition satisfying each of Formulae 1 to 7 described herein. A solar cell electrode is produced from the composition. A method of manufacturing a solar cell includes printing the composition in a predetermined pattern over a front surface of a wafer, and firing the printed composition pattern to form at least electrode. | 2015-10-01 |
20150280025 | HIGHLY EFFICIENT PHOTOVOLTAIC ENERGY HARVESTING DEVICE - A photovoltaic energy harvesting (PVEH) device comprises a single-junction photovoltaic cell. The photovoltaic cell includes a light converting element made of a wide band-gap III-V active material spectrally matched to an ambient light source, a light receiving side that is free from front metal contact gridlines, and at least one discrete metal contact element placed on the light receiving side that realizes power extraction. The active material of the light converting element may be made of (Al)GaInP compounds. The active material of the light converting element may be spectrally matched to ambient light in the form of at least one of an artificial light source and natural sunlight, and combinations thereof. The PVEH device may have a plurality of photovoltaic cells inter-connected in series to achieve a higher open-circuit voltage. A total fractional power loss due to series resistance, shunt resistance and contact shading is less than 20%. | 2015-10-01 |
20150280026 | FLEXIBLE TRANSPARENT SOLAR CELL AND PRODUCTION PROCESS OF THE SAME - The invention provides a flexible transparent solar cell and a production process of the same, and belongs to the technical field of solar cell. The flexible transparent solar cell comprises: a flexible transparent substrate, a transparent front-electrode, a cell unit, a transparent back-electrode and a transparent encapsulating layer, which are disposed in this order; the transparent front-electrode comprising a metallic grid thin film layer and a graphene layer; and the transparent back-electrode comprising a nano metal layer and a graphene layer. The invention can be used in production of flexible transparent solar cell, in order to improve conductivity and transparency of solar cells. | 2015-10-01 |
20150280027 | CONVERSION OF METAL SEED LAYER FOR BUFFER MATERIAL - Approaches for forming solar cells with a converted seed layer as a buffer material and the resulting solar cells are described. In an example, a method of fabricating a solar cell includes converting regions of a seed layer disposed on a plurality of p-n junctions of the solar cell to form a pattern of interdigitated converted regions. The converted regions are configured to electrically insulate non-converted regions of the seed layer from each other and provide a barrier to a laser that is, in fabricating the solar cell, directed towards the seed layer such that the barrier substantially avoids degradation of at least the plurality of p-n junctions from the laser. | 2015-10-01 |
20150280028 | SOLAR CELL HAVING A PLURALITY OF SUB-CELLS COUPLED BY A METALLIZATION STRUCTURE - Solar cells having a plurality of sub-cells coupled by metallization structures, and singulation approaches to forming solar cells having a plurality of sub-cells coupled by metallization structures, are described. In an example, a solar cell, includes a plurality of sub-cells, each of the sub-cells having a singulated and physically separated semiconductor substrate portion. Adjacent ones of the singulated and physically separated semiconductor substrate portions have a groove there between. The solar cell also includes a monolithic metallization structure. A portion of the monolithic metallization structure couples ones of the plurality of sub-cells. The groove between adjacent ones of the singulated and physically separated semiconductor substrate portions exposes a portion of the monolithic metallization structure. | 2015-10-01 |
20150280029 | METALLIZATION OF SOLAR CELLS - Approaches for the metallization of solar cells and the resulting solar cells are described. In an example, a method of fabricating a solar cell involves forming a plurality of alternating N-type and P-type regions in or above a substrate. The method also involves forming a metal seed layer on the plurality of alternating N-type and P-type regions. The method also involves patterning at least a portion of the metal seed layer at regions in alignment with locations between the alternating N-type and P-type regions. The method also involves, subsequent to the patterning, etching to form trenches at the locations between the alternating N-type and P-type regions, isolating the alternating N-type and P-type regions from one another. | 2015-10-01 |
20150280030 | METHOD FOR PRODUCING A PHOTOVOLTAIC CELL HAVING A HETEROJUNCTION, AND RESULTING PHOTOVOLTAIC CELL - A method for producing a heterojunction solar cell including the following successive steps: providing a substrate made from crystalline semiconductor material, doped with a first type of doping, and provided with a first main face; depositing a first layer of intrinsic amorphous semiconductor material on said first main face of the substrate; and forming a second layer of amorphous semiconductor material on the first layer. The method includes deposition of a barrier layer between the first and second layers, said barrier layer being of different nature from those of the first and second layers and includes doping of the second layer by ion implantation. | 2015-10-01 |
20150280031 | SOLAR CELLS WITH TUNNEL DIELECTRICS - A solar cell can have a first dielectric formed over a first doped region of a silicon substrate. The solar cell can have a second dielectric formed over a second doped region of the silicon substrate, where the first dielectric is a different type of dielectric than the second dielectric. A doped semiconductor can be formed over the first and second dielectric. A positive-type metal and a negative-type metal can be formed over the doped semiconductor. | 2015-10-01 |
20150280032 | HIGH EFFICIENCY PHOTOVOLTAIC CELLS - Novel structures of photovoltaic cells (also called as solar cells) are provided. The cells are based on nanoparticles or nanometer-scaled wires, tubes, and/or rods, which are made of electrical materials covering semiconductors, insulators, and also metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications such as in space, commercial, residential and industrial applications. | 2015-10-01 |
20150280033 | QUANTUM DOT OPTICAL DEVICES WITH ENHANCED GAIN AND SENSITIVITY AND METHODS OF MAKING SAME - Various embodiment include optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit having an array of conductive regions, and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a film includes a network of fused nanocrystals, the nanocrystals having a core and an outer surface, wherein the core of at least a portion of the fused nanocrystals is in direct physical contact and electrical communication with the core of at least one adjacent fused nanocrystal, and wherein the film has substantially no defect states in the regions where the cores of the nanocrystals are fused. Additional devices and methods are described. | 2015-10-01 |
20150280034 | SEMICONDUCTOR INFRARED PHOTODETECTORS - A semiconductor device capable of enhanced sub-bandgap photon absorption and detection is described. This semiconductor device includes a p-n junction structure formed of a semiconductor material, wherein the p-n junction structure is configured such that at least one side of the p-n junction (p-side or n-side) is spatially confined in at least one dimension of the device (e.g., the direction perpendicular to the p-n junction interface). Moreover, at least one side of the p-n junction (p-side or n-side) is heavily doped. The semiconductor device also includes electrical contacts formed on a semiconductor substrate to apply an electrical bias to the p-n junction to activate the optical response at target optical wavelength corresponds to an energy substantially equal to or less than the energy band-gap of the first semiconductor material. In particular embodiments, the semiconductor material is silicon. | 2015-10-01 |
20150280035 | HIGH OPERATING TEMPERATURE RESONANT TUNNELLING QUANTUM WELL PHOTODETECTOR - An semiconductor structure comprises a first quantum well having a first state (E | 2015-10-01 |
20150280036 | THz DISTRIBUTED DETECTORS AND ARRAYS - Terahertz (THz) distributed detectors, and arrays of detectors that utilize structured surface plasmonic effects for more efficient coupling to free space are discussed. One example distributed detector includes a detector junction comprising a Schottky or tunneling interface between a semiconductor and a detector metal, an ohmic junction comprising an ohmic interface between the semiconductor and an ohmic metal, and a gap that separates the detector junction from the ohmic junction. Structured surface plasmons concentrate an electric field in the gap when the distributed detector is exposed to THz radiation polarized perpendicular to the gap. | 2015-10-01 |
20150280037 | SOLAR CELL SEALING FILM AND SOLAR CELL MODULE USING THE SAME - A solar cell sealing film comprising a resin material comprising an olefin (co)polymer, and a wavelength conversion material, wherein the wavelength conversion material is a europium complex represented by the following formula (I): | 2015-10-01 |
20150280038 | THERMAL MANAGEMENT - A solar energy receiver can include a heat sink configured to cool or otherwise dissipate heat. The heat sink can include a plurality of fin members, each having bases that are generally aligned with each other. The bases of the fin members can be connected to one another with connection devices that are spaced away from the bases, so as to improve thermal conductivity performance characteristics. | 2015-10-01 |
20150280039 | METHOD OF PRODUCTION OF BACK-CONTACT BACK-SHEET FOR PHOTOVOLTAIC MODULES - The present invention provides a method for producing a back-contact back-sheet for a photovoltaic module comprising back-contact cells. The method comprising providing a substrate ( | 2015-10-01 |
20150280040 | HEAT EXCHANGER FOR PHOTOVOLTAIC PANELS - The heat exchanger for photovoltaic (PV) panels is a heat exchanger that maintains a uniform temperature for cooling PV modules. The heat exchanger is a box-shaped enclosure attached to the rear face of the PV panel. The enclosure has an inlet end, an outlet end, and a plurality of parallel baffles disposed between the ends defining a plurality of channels dividing fluid flow through the enclosure into parallel paths. The spaces between the ends of the baffles and the inlet and outlet ends define an inlet header and an outlet header. In one embodiment, the fluid inlet and outlet are disposed in diagonally opposite corners of the disclosure, opening into triangular input and output headers. In another embodiment, the fluid inlet and outlet are centered at the ends of the enclosure, and the outlet header is V-shaped with the vertex extending into the enclosure along its centerline. | 2015-10-01 |
20150280041 | CONCENTRATED PHOTOVOLTAIC MODULE - The present invention relates to a concentrated photovoltaic module and, more particularly, to a concentrated photovoltaic module that is capable of efficiently dissipating the heat generated in a solar cell to the atmosphere. The concentrated photovoltaic module according to the present invention includes: a concentrated lens array module having at least one condenser lens; a solar cell positioned at the lower end of the condenser lens; a substrate positioned at the lower end of the solar cell and supplied with the heat generated in the solar cell; a flat plate-type heat pipe positioned at the lower end of the substrate; a flat plate-type heat sink positioned at the lower end of the flat plate-type heat pipe; and a condenser lens array structure fixing the condenser lens array module to the substrate. | 2015-10-01 |
20150280042 | Systems and Methods for Advanced Ultra-High-Performance InP Solar Cells - Systems and Methods for Advanced Ultra-High-Performance InP Solar Cells are provided. In one embodiment, an InP photovoltaic device comprises: a p-n junction absorber layer comprising at least one InP layer; a front surface confinement layer; and a back surface confinement layer; wherein either the front surface confinement layer or the back surface confinement layer forms part of a High-Low (HL) doping architecture; and wherein either the front surface confinement layer or the back surface confinement layer forms part of a heterointerface system architecture. | 2015-10-01 |
20150280043 | SOLAR CELL WITH TRENCH-FREE EMITTER REGIONS - Methods of fabricating solar cells having trench-free emitter regions, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A thin dielectric layer is disposed on a portion of the back surface of the substrate. A first polycrystalline silicon emitter region is disposed on a first portion of the thin dielectric layer and doped with an impurity of a first conductivity type. A second polycrystalline silicon emitter region is disposed on a second portion of the thin dielectric layer proximate to the first polycrystalline silicon emitter region disposed on the first portion of the thin dielectric layer. The second polycrystalline silicon emitter region is doped with an impurity of a second, opposite, conductivity type. A total concentration of the impurity of the first conductivity type in the first polycrystalline silicon emitter region is at least an order of magnitude greater than a total concentration of the impurity of the second conductivity type in the second polycrystalline silicon emitter region. | 2015-10-01 |
20150280044 | SPACE SOLAR ARRAY MODULE AND METHOD FOR FABRICATING THE SAME - A solar cell module and method for fabricating the same are provided. The solar cell module comprises: an array of solar cells, each of the solar cells having an area of about 0.01 mm | 2015-10-01 |
20150280045 | RADIATION AND TEMPERATURE HARD MULTI-PIXEL AVALANCHE PHOTODIODES - The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current. | 2015-10-01 |
20150280046 | PHOTOTRANSISTOR CAPABLE OF DETECTING PHOTON FLUX BELOW PHOTON SHOT NOISE - Disclosed herein is a phototransistor (PT) comprising an emitter, a collector, a floating base, wherein the PT is configured to detect a photon flux incident on the PT and the photon flux being lower than one single photon within f, or wherein the PT is configured to detect a photon flux incident on the PT and the photon flux being below a photon shot noise of the photon flux within f, or wherein the PT is configured to detect a photon flux incident on the PT and the photon flux is 1/√{square root over (β)} of a photon shot noise of the photon flux within f, or wherein the PT is capable of detecting a photon flux incident on the PT and the photon flux being below 2f, or wherein the PT is capable of detecting a photon flux incident on the PT and the photon flux being 2f/β, wherein f is an electrical bandwidth of the PT and β is a current amplification gain of the PT. | 2015-10-01 |
20150280047 | SEMICONDUCTOR PHOTOSENSOR FOR INFRARED RADIATION - A photosensor for the detection of infrared radiation in the wavelength range of 1 to 1000 micrometers consists of a semiconductor substrate with a highly doped interaction volume for the incoming radiation. At the edge of this highly doped region, an extended gate electrode is placed consisting of a conducting material on top of an insulating layer. On the other side of the gate electrode, another highly doped semiconductor region is placed, acting as a charge collector. Through free carrier absorption in the interaction volume, incoming photons impart their energy on mobile charge carriers. In the case of free electrons, the gate electrode is biased slightly below the reset voltage of the interaction volume, so that the electrons carrying the additional energy of the absorbed photons can predominantly make the transition from the interaction volume across the gate electrode area to the charge collector volume. | 2015-10-01 |
20150280048 | METHOD FOR MANUFACTURING POLYCRYSTALLINE SILICON THIN-FILM SOLAR CELLS BY MEANS METHOD FOR CRYSTALLIZING LARGE-AREA AMORPHOUS SILICON THIN FILM USING LINEAR ELECTRON BEAM - One embodiment of the present invention relates to a method of manufacturing polycrystalline silicon thin-film solar cell by a method of crystallizing a large-area amorphous silicon thin film using a linear electron beam, and the technical problem to be solved is to crystallize an amorphous silicon thin film, which is formed on a low-priced substrate, by means of an electron beam so as for same to easily be of high quality by having high crystallization yield and to be processed at a low temperature. To this end, one embodiment of the present invention provides a method of manufacturing polycrystalline silicon thin-film solar cell by means of a method for crystallizing a large-area amorphous silicon thin film using a linear electron beam, the method comprising: a substrate preparation step for preparing a substrate; a type 1+ amorphous silicon layer deposition step for forming a type 1+ amorphous silicon layer on the substrate; a type 1 amorphous silicon layer deposition step for forming a type 1 amorphous silicon layer on the type 1+ amorphous silicon layer; an absorption layer formation step for forming an absorption layer by radiating a linear electron beam to the type 1 amorphous silicon layer and thus crystallizing the type 1 amorphous layer and the type 1+ amorphous silicon layer; a type 2 amorphous silicon layer deposition step for forming a type 2 amorphous silicon layer on the absorption layer; and an emitter layer formation step for forming an emitter layer by radiating a linear electron beam to the type 2 amorphous silicon layer and thus crystallizing the type 2 amorphous silicon layer, wherein the linear electron beam is radiated from above type 1 and type 2 amorphous silicon layers in a linear scanning manner in which to reciprocate in a predetermined area. | 2015-10-01 |
20150280049 | Multi-junction Thin-Film Silicon Solar Cells with a Recrystallized Silicon-based Sub-Cell - This application relates to systems and methods for multi-junction solar cells that includes at least one recrystallized silicon layer. The recrystallized silicon lay may have a microcrystalline structure following a heat treatment or laser treatment of an amorphous silicon layer. The multi-junction solar cell may be a p-i-n or n-i-p structure that may include a p-type doped silicon layer, an intrinsic silicon layer, and an n-doped silicon layer. In one embodiment, the intrinsic layer in either type of structure may be the recrystallized silicon layer. | 2015-10-01 |
20150280050 | METHOD OF MAKING PHOTOVOLTAIC DEVICE THROUGH TAILORED HEAT TREATMENT - A method of fabricating a photovoltaic device includes a step of forming an absorber layer above a substrate of the photovoltaic device, a step of forming a buffer layer over the absorber layer, and a step of pre-heating the photovoltaic device at a first heating rate to a selected temperature. The first heating rate being higher than 5° C./minute. The method further includes a step of forming a front contact layer over the buffer layer at the selected temperature, after the step of pre-heating the photovoltaic device. | 2015-10-01 |
20150280051 | DIFFUSER HEAD APPARATUS AND METHOD OF GAS DISTRIBUTION - An apparatus and method of forming a top contact layer of a thin film solar cell with improved layer thickness uniformity. Apparatus comprises a diffusion head for introduction of a processing gas into a chamber. The diffusion head includes a diffusion plate with a plurality of openings, each opening having a first cylindrical portion and a second conical-frustum portion. | 2015-10-01 |
20150280052 | METHOD FOR MANUFACTURING LIGHT EMITTING DEVICE - A manufacturing method for a light emitting device can include providing a bonding layer over a base, and disposing a shim plate with an opening over the bonding layer. A light emitting body is disposed over the bonding layer exposed from the opening of the shim plate. A lens is formed by approaching a die having a concave portion at its surface, to the shim plate, covering an upper surface of the light emitting body and an upper surface of the shim plate with a lens formation material within the concave portion, and then hardening the lens formation material. | 2015-10-01 |
20150280053 | OPTOELECTRIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing an optoelectric device comprising a semiconductor substrate, pads on a surface of the substrate; semiconductor elements, each element being in contact with a pad; and a dielectric region extending in the substrate from the surface and connecting, for each pair of pads, one of the pads in the pair to the other pad in the pair, the method successively comprising the forming of the pads and the forming of the region, wherein the region is formed by nitriding of the substrate, the method comprising the successive steps of: depositing a layer on the substrate; forming portions on the layer; etching the parts of the layer which are not covered with the portions to form the pads; removing the portions; and nitriding the pads and the parts of the substrate which are not covered with the pads, wherein the nitriding step successively comprises: a first step of nitriding of the pads at a first temperature; and a second step of nitriding of the parts of the substrate which are not covered with the pads at a second temperature different from the first temperature. | 2015-10-01 |
20150280054 | METHOD FOR MAKING LIGHT EMITTING DIODE - The disclosure relates to a method of making light emitting diode. The method includes following steps: providing a free-standing carbon nanotube film, wherein the carbon nanotube film includes a number of carbon nanotubes aligned and connected with each other via van der Waals force; suspending the carbon nanotube film and inducing defects on the surface of the carbon nanotubes; growing a nano-material layer on the surface of the carbon nanotubes via atomic layer deposition; removing the carbon nanotube film by annealing to form a number of nanotubes; wherein the number of nanotubes are successively aligned and connected with each other to form a free-standing nanotube film; setting the nanotube film on a substrate; growing a first semiconductor layer, an active layer and a second semiconductor layer on the substrate; and applying a first electrode on the second semiconductor layer and a second electrode on the first semiconductor layer. | 2015-10-01 |
20150280055 | METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR ELEMENT - A first nitride semiconductor layer laminating step includes a first step and a second step. In the first step, an entire upper surface of the sapphire substrate is coated with a first nitride semiconductor layer, while supplying oxygen. In the second step, crystals of the first nitride semiconductor layer are grown by supplying oxygen at a smaller flow rate than that of oxygen supplied in the first step, or without supplying the oxygen. | 2015-10-01 |
20150280056 | GRADED ELECTRON BLOCKING LAYER - A light emitting device includes a p-side heterostructure, an n-side heterostructure, an active region disposed between the p-side heterostructure and the n-side heterostructure. An electron blocking layer (EBL) disposed between the p-side heterostructure and the active region comprises an aluminum containing group-III-nitride alloy. An aluminum composition of the EBL decreases as a function of distance along a [0001] direction from the active region towards the p-side heterostructure over a majority of the thickness of the EBL. | 2015-10-01 |
20150280057 | METHODS OF FORMING PLANAR CONTACTS TO PSEUDOMORPHIC ELECTRONIC AND OPTOELECTRONIC DEVICES - In various embodiments, smooth contact layers are formed on polarization-doped light-emitting devices to enable high photon extraction efficiencies. | 2015-10-01 |
20150280058 | SEMICONDUCTOR MATERIAL - A semiconductor wafer comprising a substrate; a first AlGaN layer on the substrate; a second AlGaN layer on the first AlGaN layer; a GaN layer on the second AlGaN layer; and a plurality of crystalline GaN islands between the first and second AlGaN layers. | 2015-10-01 |
20150280059 | LIGHT-EMITTING DEVICE AND LIGHT-EMITTING DEVICE PACKAGE - A light-emitting device, according to one embodiment of the present invention, comprises: a first conductive semiconductor layer; an active layer on the first conductive semiconductor layer; a blocking layer on the active layer; and a second conductive semiconductor layer on the blocking layer, wherein the active layer comprises a plurality of quantum well layers and quantum barrier layers, and the quantum well layer is formed from In | 2015-10-01 |
20150280060 | NANOWIRE-BASED OPTOELECTRONIC DEVICE FOR LIGHT-EMISSION - A light-emitting diode is provided, including an active semiconductor area for the radiative recombination of electron-hole pairs having a plurality of nanowires, each made of an unintentionally doped semiconductor material, a first semiconductor area for radially injecting holes into each nanowire, the first semiconductor area being made of a doped semiconductor material having a first conductivity type and having a bandgap that is greater than the bandgap of the semiconductor material of the nanowires, and a second semiconductor area for axially injecting electrons into each nanowire, the second semiconductor area being made of a doped semiconductor material having a second conductivity type that is opposite to that of the first conductivity type. | 2015-10-01 |
20150280061 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a semiconductor light emitting device includes first and second conductive layers, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting part. The second semiconductor layer is provided between the first conductive layer and the first semiconductor layer. The light emitting part is provided between the first and second semiconductor layers. The second conductive layer is in contact with the second semiconductor layer and the first conductive layer between the second semiconductor layer and the first conductive layer. The first and second conductive layers are transmittable to light emitted from the light emitting part. The first conductive layer includes a polycrystal having a first average grain diameter. The second conductive layer includes a polycrystal having a second average grain diameter of 150 nanometers or less and smaller than the first average grain diameter. | 2015-10-01 |
20150280062 | NANOSTRUCTURE SEMICONDUCTOR LIGHT EMITTING DEVICE - A nanostructure semiconductor light emitting device includes a base layer, an insulating layer, a plurality of light emitting nanostructures, and a contact electrode. The base layer is formed of a first conductivity-type semiconductor material. The insulating layer is disposed on the base layer. Each light emitting nanostructure is disposed in a respective opening of a plurality of openings in the base layer, and includes a nanocore formed of the first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore. The contact electrode is spaced apart from the insulating layer and is disposed on a portion of the second conductivity-type semiconductor layer. A tip portion of the light emitting nanostructure has crystal planes different from those on side surfaces of the light emitting nanostructure. | 2015-10-01 |
20150280063 | LIGHT EMITTING DIODE - The disclosure relates to a light emitting diode. The light emitting diode includes a first semiconductor layer, an active layer, and a second semiconductor layer, a first electrode, a second electrode and a nanotube film. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked with each other in that order. The first electrode is electrically connected with the second semiconductor layer. The second electrode is electrically connected with the first semiconductor layer. The nanotube film is located on one of the first semiconductor layer, the active layer and the second semiconductor layer. The nanotube film comprises a number of nanotubes orderly arranged and combined with each other by ionic bonds. | 2015-10-01 |
20150280064 | LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME - Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural layer comprises a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement. Also, a method for fabricating the light emitting diode is disclosed. | 2015-10-01 |
20150280065 | LIGHT EMITTING ELEMENT AND METHOD OF MANUFACTURING THE SAME - A light emitting element includes a crystal growth substrate formed in a flat shape and that has a translucency, a semiconductor layer that constitutes a light emitting element structure and is formed at a side of a first surface of the crystal growth substrate, irregularities formed on a second surface of the crystal growth substrate, the second surface being an opposite surface of the first surface, and a protective layer that has a translucency and a predetermined hardness and brittleness, and covers the irregularities formed on the second surface of the crystal growth substrate. | 2015-10-01 |
20150280066 | SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. A plurality of protrusions and a plurality of recesses are provided at the first side. Peaks of the protrusions are positioned closer to the second side than an end on the second insulating film side of the optical layer at the outer periphery. | 2015-10-01 |
20150280067 | LIGHT EMITTING ELEMENT ARRAY, SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, PRINTING HEAD AND IMAGE FORMING APPARATUS - A light emitting element array includes a semiconductor thin-film layer in which a plurality of light emitting portions are arranged. The plurality of light emitting portions are driven to emit light in such a manner that an arrangement direction of the plurality of light emitting portions defines a main scanning direction. The plurality of light emitting portions are arranged in such a manner that adjacent light emitting portions are displaced from each other in a sub scanning direction perpendicular to the main scanning direction by a certain amount. An end portion of the semiconductor thin-film layer in the sub scanning direction has a shape along a pattern in which the plurality of light emitting portions are arranged. | 2015-10-01 |
20150280068 | NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE - A light emitting device comprises a laminate including a first layer having a first surface on a first side of the laminate, a second layer having a second surface on the first side of the laminate, and a light emitting layer between the first layer and the second layer. A first electrode on the first side contacts the first surface and is reflective of light emitted by the light emitting layer. A second electrode on the first side contacts the second surface and extends through a recess in the laminate. The recess extends from the first surface to the second surface of the second layer. The primary light emission surface of the laminate is a surface of the second layer on a second side of the laminate. An edge of the first electrode is concentric with an edge of the second electrode. | 2015-10-01 |
20150280069 | Nitride Underlayer and Fabrication Method Thereof - A nitride layer with embedded hole structure can be used for fabricating GaN-based LED of high external quantum efficiency through epitaxial growth. The approaches can have advantages such as reducing the complexity chip process for forming hole structure, reducing impacts from the chip process on chip reliability, effective reduction of hole structure size and increase of device stability, crush resistance, and reliability. A fabrication method of an underlayer structure with embedded micro-hole structure is also provided. | 2015-10-01 |
20150280070 | LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME - Embodiments provide a light emitting diode and a method of fabricating the same. The light emitting diode includes a base, a light emitting structure disposed on the base, at least one first electrode disposed on the light emitting structure; and a second electrode disposed under the light emitting structure, wherein at least a portion of the second electrode is covered by the base and the base includes a supporting insulator and at least one bulk electrode embedded in the supporting insulator and electrically connected to the light emitting structure, and a surface of the at least one bulk electrode is exposed through the supporting insulator. The light emitting diode has excellent reliability and efficiency. | 2015-10-01 |
20150280071 | LIGHT EMITTING ELEMENT AND LIGHT EMITTING DEVICE USING THE SAME - A light emitting element includes a semiconductor stacked layer body having an n-type semiconductor layer, an active layer, and a p-type semiconductor layer in this order, and a plurality of exposed portions defined at an upper surface side of the semiconductor stacked layer body, the plurality of exposed portions respectively exposing a part of the n-type semiconductor layer, a p-side electrode arranged in a first region and electrically connected with an upper surface of the p-type semiconductor layer and, arranged at one corner above the p-type semiconductor layer in a plan view, and an n-side electrode electrically integrally connected to the plurality of exposed portions and arranged in a different region in a plan view. In a plan view, the semiconductor stacked layer body has a rectangular shape and the plurality of exposed portions includes, a plurality of first exposed portions arranged at substantially equal intervals along a side of the semiconductor stacked layer body and a plurality of second exposed portions arranged closer to the p-side electrode than the first exposed portions are to the p-side electrode. The plurality of second exposed portions include at least one second exposed portion which has a shortest distance to the first exposed portions, the shortest distance to the first exposed portions being longer than a shortest distance among the first exposed portions. The at least one second exposed portion also has a shortest distance to the p-side electrode shorter than the shortest distance among the first exposed portions. | 2015-10-01 |
20150280072 | SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, the second insulating film is provided between the first interconnect portion and the second interconnect portion, and at an outer periphery of a side face of the semiconductor layer. The optical layer is provided on the first side, and on the second insulating film at the outer periphery. The optical layer is transmissive with respect to light emitted from the light emitting layer. The film is provided between the second insulating film at the outer periphery and the optical layer. The film has a roughened surface on a side in contact with the optical layer. | 2015-10-01 |
20150280073 | SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND PRODUCTION METHOD THEREFOR - An object is to realize a semiconductor light-emitting element having further increased light extraction efficiency than before, and a production method therefor. The method for producing a semiconductor light-emitting element of the present invention includes: a step (a) of preparing a substrate; a step (b) of forming a first semiconductor layer, an active layer and a second semiconductor layer on the upper layer of the substrate in this order from below; a step (c) of forming a first conductive layer constituting a reflective electrode on the upper layer of the second semiconductor layer; a step (d) of forming a second conductive layer, without previously conducting annealing, constituting a first protective layer in a thickness of equal to or less than 7 nm on an upper surface of the first conductive layer after the step (c); and a step (e) of conducting annealing after the step (d). | 2015-10-01 |
20150280074 | LIGHT-EMITTING DIODE WITH IMPROVED LIGHT EXTRACTION EFFICIENCY - According to the present invention, a light-emitting diode with improved light extraction efficiency comprises: a semiconductor laminated structure including an N-layer, a light-emitting layer, and a P-layer formed on a substrate; an N-type electrode formed on the N-layer; and a P-type electrode formed on the P-layer, wherein the N-type electrode and the P-type electrode include a pad electrode and a dispersion electrode, and the N-type electrode and/or the P-type electrode includes a reflective electrode layer for reflecting light onto the dispersion electrode. Thus, the light-emitting diode has a reflective electrode layer on the electrode so as to improve light extraction efficiency. Further, a reflective layer is patterned beneath a pad unit, thus forming roughness and improving adhesion. | 2015-10-01 |
20150280075 | LIGHT SOURCE MODULE - A light source module is provided. The light source module includes a flexible printed circuit board, plural light-emitting diodes and plural first light-absorbing portions. The flexible printed circuit board has a first edge and a second edge opposite to the first edge. The light-emitting diodes are disposed on the flexible printed circuit board near the first edge. The first light-absorbing portions are disposed on the flexible printed circuit board near the second edge, in which the first light-absorbing portions are alternately arranged with the light-emitting diodes. | 2015-10-01 |
20150280076 | LIGHT EMITTING DEVICE INCLUDING A FILTER AND A PROTECTIVE LAYER - A method according to embodiments of the invention includes providing a plurality of LEDs ( | 2015-10-01 |
20150280077 | Light Emitting Device that Includes Protective Film Having Uniform Thickness - A light emitting device includes an electrically conductive member provided with a reflective film; a light emitting element mounted on the reflective film; and a protective film continuously covering a surface of the light emitting element and a surface of the reflective film. A thickness of the protective film on the reflective film in a vicinity of the light emitting element is substantially equal to a thickness of the protective film on the reflective film in the region except for the vicinity of the light emitting element. | 2015-10-01 |
20150280078 | WHITE FLIP CHIP LIGHT EMITTING DIODE (FC LED) AND FABRICATION METHOD - A white flip chip light emitting diode (FC LED) includes a flip chip (LED) die configured to emit electromagnetic radiation; reflective sidewalls on the (LED) die; and a wavelength conversion member having a uniform thickness and a surface area greater than or equal to a footprint of the flip chip (LED) die configured to change a wavelength of the electromagnetic radiation to produce white light. A method for fabricating the white flip chip light emitting diode (FC LED) includes the steps of: providing the flip chip (LED) die; forming reflective sidewalls on the flip chip (LED) die; and forming a wavelength conversion member on the flip chip (LED) die. | 2015-10-01 |
20150280079 | PHOSPHOR, LIGHT EMITTING DEVICE AND LIGHTING APPARATUS - An object of the invention is to provide a phosphor that emits a light containing much red and green light components and a light-emitting device and a lighting apparatus comprising the phosphor that have favorable color rendering properties. An oxide nitride phosphor having a garnet structure represented by Formula [1]: A | 2015-10-01 |
20150280080 | LIGHT EMITTING DEVICE - A light emitting device includes a light emitting element and a luminescent color conversion layer covering a light emitting surface of the light emitting element. The luminescent color conversion layer includes a transparent synthetic resin material and integrated particles provided inside the transparent synthetic resin material, each of the integrated particles being a mixture of phosphors and a dispersively binding material that are bonded to each other. The dispersively binding material has transparency and bondability to the phosphors. The luminescent color conversion layer is arranged such that primary light and secondary light are mixed to generate a mixed color light and such that the mixed-color light is emitted outside from the luminescent color conversion layer, the primary light being excitation light emitted by the light emitting element, and the secondary light being a portion of the primary light that has been is color-converted by an excitation of the phosphors. | 2015-10-01 |
20150280081 | METHOD OF MANUFACTURING LIGHT EMITTING DEVICE - In a method of manufacturing a light emitting device, a luminescent color conversion member made of a translucent material including phosphors is directly fixed to light emitting surface side of light emitting elements in a light emitting element group, and a stack of the light emitting element group and the luminescent color conversion member is divided into a plurality of chips. In each of the light emitting elements, a piece of the luminescent color conversion member is directly fixed to the light emitting surface of the light emitting element. | 2015-10-01 |
20150280082 | LIGHT EMITTING DEVICE - A light emitting device includes a base member, a light emitting element, and a sealing member. The substrate includes a wiring portion. The element is arranged on or above the substrate. The sealing member covers the element, and at least a part of the substrate. The sealing member includes a wavelength conversion member. The part of the substrate is divided into first and second sections by a straight line that passes through the center of the part as viewed in plan view. The wiring portion is arranged so that its area on the first section side is larger than on the second section side. The element is arranged so that its area in the second section is larger than the first section. The height of the sealing member on the second section side is greater than on the first section side. | 2015-10-01 |
20150280083 | WAVELENGTH CONVERTED LIGHT EMITTING DEVICE - A structure according to embodiments of the invention includes a plurality of LEDs attached to a mount. A wavelength converting layer is disposed over the LEDs. A transparent layer is disposed over the wavelength converting layer. Reflective material is disposed between neighboring LEDs. | 2015-10-01 |
20150280084 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING SAME - According to an embodiment, a semiconductor light emitting device includes a semiconductor layer, a first and a second interconnect parts and a first and a second insulating films. The semiconductor layer has a first side and a second side opposite to the first side, and includes a first conductivity type layer, a second conductivity type layer and a light emitting layer. The first interconnect part is electrically connected to the first conductivity type layer. The second interconnect part is electrically connected to the second conductivity type layer. | 2015-10-01 |
20150280085 | Polyester Resin Composition Having Improved Mechanical Properties and Moldability - A polyester resin composition includes: (A) a polyester resin which includes a polymer of a dicarboxylic acid component including an aromatic dicarboxylic acid and a diol component including an alicyclic diol having a trans/cis isomer ratio of about 2.3 or more; (B) a white pigment; and (C) inorganic fillers. A molded article formed from the polyester resin composition can exhibit improved mechanical properties and moldability, and thus can be suitable for light emitting diode (LED) reflectors. | 2015-10-01 |
20150280086 | WAFER LEVEL LIGHT-EMITTING DIODE ARRAY - A wafer level light-emitting diode (LED) array includes: a growth substrate; a plurality of LEDs arranged over the substrate, each including a first semiconductor layer, an activation layer, and a second semiconductor layer; a plurality of upper electrodes formed from a common material and electrically connected to the first semiconductor layers of the corresponding LEDs; and first and second pads arranged over the upper electrodes. The LEDs are connected in series by the upper electrodes, the first pad is electrically connected to an input LED from among the LEDs connected in series, and the second pad is electrically connected to an output LED from among the LEDs connected in series. Accordingly, a flip chip-type LED array can be provided which can be driven with a high voltage. | 2015-10-01 |
20150280087 | LIGHT-EMITTING DIODE HAVING A SILICON SUBMOUNT AND LIGHT-EMITTING DIODE LAMP - A light-emitting diode having a silicon submount includes a silicon submount and a light-emitting diode (LED) chip. The silicon submount includes a power management integrated circuit formed in an inside of the silicon submount, a P-electrode formed on a bottom side thereof, an N-electrode formed on the bottom side thereof, and a heat dissipation ground portion formed on the bottom side thereof. The power management integrated circuit is electrically coupled to the P-electrode and the N-electrode. The LED chip is eutecticly bonded to a top side of the silicon submount, and the LED chip is electrically coupled to the P-electrode and the N-electrode. A heat-dissipation channel is defined from the LED chip to the heat dissipation ground portion via the inside of the silicon submount. The power management integrated circuit replaces a conventional power supply controller, thereby providing a more optimized LED. | 2015-10-01 |
20150280088 | LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - A light-emitting device includes a first light-emitting element, a second light-emitting element, a third light-emitting element placed between the first and second light-emitting elements, and a bonding wire passing directly over the third light-emitting element and connecting the first light-emitting element with the second light-emitting element. | 2015-10-01 |
20150280089 | SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a semiconductor light-emitting device includes a first electrode and a second electrode provided on the same side of a semiconductor layer. A first insulating film covers the first electrode and the second electrode. Openings in the first insulating film expose portions of the first electrode and the second electrode. Wiring portions are respectively provided on the first insulating film and in the openings in the first insulating films. A first wiring portion is connected to the first electrode and a second wiring portion is connected to the second electrode. A second insulating film is provided between a first wiring portion and a second wiring portion, with a portion of the second insulating film being provided in a gap between the first insulating film and the first wiring portion. | 2015-10-01 |
20150280090 | METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE, LIGHT-EMITTING DEVICE, AND PROJECTOR - A method of manufacturing a light-emitting device, includes: disposing a first conductive paste on a substrate and sintering the first conductive paste to forma first bonding layer; disposing a second conductive paste on a semiconductor light-emitting element and sintering the second conductive paste to form a second bonding layer; polishing surfaces of the first bonding layer and the second bonding layer; and causing a third conductive paste to intervene between the first bonding layer and the second bonding layer and sintering the third conductive paste to bond the first bonding layer and the second bonding layer together. | 2015-10-01 |
20150280091 | LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a light-emitting device is provided, including: providing a base, which includes a heat dissipation layer made of graphene; forming a buffer layer on the heat dissipation layer; and forming a light emission unit on the buffer layer. The light-emitting device so made includes a graphene-made heat dissipation layer that effectively dissipates away heat emitting from an emissive layer of the light emission unit so as to effectively reduce the temperature of the light-emitting device and extend the service life of the light-emitting device. Particularly, when the light-emitting device is a light-emitting diode, the emissive layer thereof is a quantum dot emissive layer for effectively improving color saturation of the light-emitting diode and enhancing color displaying performance of the light-emitting diode. | 2015-10-01 |