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35th week of 2009 patent applcation highlights part 61
Patent application numberTitlePublished
20090217004CACHE WITH PREFETCH - A prefetch bit (2009-08-27
20090217005METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR SELECTIVELY ACCELERATING EARLY INSTRUCTION PROCESSING - A method for selectively accelerating early instruction processing including receiving an instruction data that is normally processed in an execution stage of a processor pipeline, wherein a configuration of the instruction data allows a processing of the instruction data to be accelerated from the execution stage to an address generation stage that occurs earlier in the processor pipeline than the execution stage, determining whether the instruction data can be dispatched to the address generation stage to be processed without being delayed due to an unavailability of a processing resource needed for the processing of the instruction data in the address generation stage, dispatching the instruction data to be processed in the address generation stage if it can be dispatched without being delayed due to the unavailability of the processing resource, and dispatching the instruction data to be processed in the execution stage if it can not be dispatched without being delayed due to the unavailability of the processing resource, wherein the processing of the instruction data is selectively accelerated using an address generation interlock scheme. A corresponding system and computer program product.2009-08-27
20090217006Heuristic backtracer - A heuristic backtracer is described. In one embodiment, a scanner scans a stack of an application for a pointer to a word of a machine code of the application. A preceding byte locator identifies one or more bytes immediately preceding the pointed-to machine code. A parser parses the one or more bytes immediately preceding the pointed-to machine code of the machine code for a call instruction. A return address identifier determines the pointed-to as a return address when the one or more bytes constitute the call instruction.2009-08-27
20090217007DISCOVERY OF A VIRTUAL TOPOLOGY IN A MULTI-TASKING MULTI-PROCESSOR ENVIRONMENT - A computer program product, apparatus and method for identifying processors in a multi-tasking multiprocessor network, the computer program product including a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method including storing a service record for a port to which an LID has been assigned, retrieving service records for nodes to which channel paths may connect, retrieving path records that provide address destinations for the nodes identified in the service records, initiating channel initialization for the channel paths defined for the port and removing the service record for the port.2009-08-27
20090217008Program conversion device, and secret keeping program - Provided is a program conversion apparatus for generating a secret holding program, which disables a malicious analyzer from analyzing the an original program easily.2009-08-27
20090217009SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR TRANSLATING STORAGE ELEMENTS - A system, method and computer program product for translations in a computer system. The system includes a general purpose register containing a base address of an address translation table. The system also includes a millicode accessible special displacement register configured to receive a plurality of elements to be translated. The system further includes a multiplexer for selecting a particular one of the plurality of elements from the millicode accessible special displacement register and for generating a displacement or offset value. The system further includes an address generator for creating a combined address containing the base address from the general purpose register and the generated displacement or offset value.2009-08-27
20090217010DATA PROCESSOR DEVICE HAVING TRACE CAPABILITIES AND METHOD - In response to determining an event has occurred, information is stored at a trace buffer of an integrated circuit. When the trace buffer is full, execution of instructions at a CPU is halted to allow the trace buffer information to be accessed at an external interface to the integrated circuit device. The CPU is continually halted as the trace buffer is filled to facilitate retrieving all information written to the trace buffer.2009-08-27
20090217011DATA PROCESSING DEVICE AND METHOD THEREOF - A processor begins exception processing in response to an exception event. Exception processing by the processor is halted during exception processing to facilitate debugging. The exception event can be a reset exception event or an interrupt exception event. Normal exception processing by the data processor can be resumed after debugging, or exception processing by the data processor can be aborted to allow the normal execution of instructions by the data processor to resume. An exception event can be selectively treated as an interrupt or a reset.2009-08-27
20090217012MICROARCHITECTURE, METHOD AND COMPUTER PROGRAM PRODUCT FOR EFFICIENT DATA GATHERING FROM A SET OF TRACE ARRAYS - An architecture for collecting performance data in a processor, that includes: a trace read control unit and a trace data collect unit, each unit coupled to a plurality of trace array and multiplex units for providing performance data, the coupling accomplished by a trace read control bus, a data select bus, a trace row address bus and a data return bus; wherein each of the trace array and multiplex units receives a trace read signal and provides data including trace data and the trace read signal to the trace data collect unit. A method and a computer program product are provided.2009-08-27
20090217013METHOD AND APPARATUS FOR PROGRAMMATICALLY REWINDING A REGISTER INSIDE A TRANSACTION - Embodiments of the present invention provide a system that allocates registers in a processor. The system starts by commencing a transaction, wherein commencing the transaction involves preserving a pre-transactional state of registers in a first register file. The system then allocates one or more registers for temporary use during the transaction. Upon finishing using each allocated register during the transaction, the system executes an instruction that restores the allocated register to the pre-transactional state.2009-08-27
20090217014PROCESSOR, MEMORY DEVICE, PROCESSING DEVICE, AND METHOD FOR PROCESSING INSTRUCTION - A processor includes a VM trap logic and a buffering logic. The VM trap logic determines whether or not an instruction acquired from a VM (Virtual Machine) satisfies a predetermined VM trap condition. The buffering logic determines whether or not the instruction acquired from the VM satisfies a predetermined buffering condition.2009-08-27
20090217015SYSTEM AND METHOD FOR CONTROLLING RESTARTING OF INSTRUCTION FETCHING USING SPECULATIVE ADDRESS COMPUTATIONS - A system and method for controlling restarting of instruction fetching using speculative address computations in a processor are provided. The system includes a predicted target queue to hold branch prediction logic (BPL) generated target address values. The system also includes target selection logic including a recycle queue. The target selection logic selects a saved branch target value between a previously speculatively calculated branch target value from the recycle queue and an address value from the predicted target queue. The system further includes a compare block to identify a wrong target in response to a mismatch between the saved branch target value and a current calculated branch target, where instruction fetching is restarted in response to the wrong target.2009-08-27
20090217016SYSTEM AND METHOD FOR SEARCH AREA CONFINED BRANCH PREDICTION - A system and method for performing search area confined branch prediction in a processor are provided. The system includes a branch target buffer (BTB) to hold branch information for branch prediction, where the branch information includes a branch address. The system also includes search logic for searching the BTB to locate a branch address. The system additionally includes throttle logic to stop searching the BTB in response to reaching a predefined search limit.2009-08-27
20090217017METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR MINIMIZING BRANCH PREDICTION LATENCY - A method, system, and computer program product for minimizing branch prediction latency in a pipelined computer processing environment are provided. The method includes detecting a branch loop utilizing branch instruction addresses and corresponding target addresses stored in a branch target buffer (BTB). The method also includes fetching the branch loop into a pre-decode instruction buffer and qualifying the branch loop for loop lockdown. The method further includes locking an instruction stream that forms the branch loop in the pre-decode instruction buffer and processing qualified branch loop instructions from the buffer and powering down instruction fetching and branch prediction logic (BPL) associated with the BTB.2009-08-27
20090217018METHODS, APPARATUS AND ARTICLES OF MANUFACTURE FOR REGAINING MEMORY CONSISTENCY AFTER A TRAP VIA TRANSACTIONAL MEMORY - Embodiments of the invention provide a method for regaining memory consistency after a trap via transactional memory. Transactional memory and a transactional memory log are used to undo changes made to memory from a transaction start point up to the point of a trap event. After the trap event is processed, and the changes are rolled back, the program can resume execution at the beginning of the transaction.2009-08-27
20090217019Method for Processing Interrupt Requests in a Processor - A method for processing interrupt requests in a processor is suitable for executing at least two threads in parallel, wherein an instruction pipeline is provided for each of the at least two threads. One of the at least two threads is defined as a main thread for processing programs. Another thread of the at least two threads is assigned to the main thread as an interrupt thread. After an interrupt request is received, the processor stores interrupt data in a register assigned to the interrupt thread. Subsequently, the processing of an interrupt routine is started in the interrupt thread and at least part of the interrupt routine is executed in the interrupt thread.2009-08-27
20090217020Commit Groups for Strand-Based Computing - Strand-based computing hardware and dynamically optimizing strandware are included in a high performance microprocessor system. The system operates in real time automatically and unobservably to parallelize single-threaded software into parallel strands for execution by cores implemented in a multi-core and/or multi-threaded microprocessor of the system. The system organizes native instructions of the strands into commit groups. With respect to each commit group, results are either atomically committed or entirely discarded. A hierarchical two-level rollback mechanism enables rolling back at a granularity of a single one of the commit groups, or alternatively rollback at a granularity of an entire strand. The system operates to respond to local events (e.g. branch misprediction) via rollback of commit groups, and to global events (e.g. strand-level mis-speculation) via rollback of strands. Rolling back of commit groups of a particular strand only affects commit groups of the particular strand, leaving other strands unaffected.2009-08-27
20090217021SYSTEM AND METHOD FOR FAST RESTART OF A GUEST OPERATING SYSTEM IN A VIRTUAL MACHINE ENVIRONMENT - The present invention provides a system and method for fast restart of a guest operating system executing on a virtual machine operating system in a virtual machine environment. During initialization, the guest operating system saves a set of checkpoint information to persistent storage. Upon detection of an error condition during operation, the guest operating system begins a re-initialization procedure in accordance with an illustrative embodiment of the present invention. During the re-initialization procedure, the guest operating system retrieves the checkpoint information and configures itself using the retrieved information. By utilizing the retrieved information, the guest operating system avoids the need to perform lengthy configuration discovery routines, thereby shortening the re-initialization time substantially.2009-08-27
20090217022METHOD AND APPARATUS FOR LOADING CLASSES AND RE-ORGANIZING CLASS ARCHIVES - A method and apparatus for loading classes to virtual machines and a method and apparatus for reorganizing class archives. The method for loading a class to a virtual machine includes organizing a class archive before class loading such that the organized class archive includes a class contraction portion and loading only the class contraction portion of the class archive to the virtual machine at the moment of class loading. By first loading the class contraction portion from the organized class archive to the virtual machine at the moment of loading, the present invention curtails code redundancy, shortens loading time and reduces occupied memory resources.2009-08-27
20090217023Method for upgrading a microprocessor-controlled device with a new software code via a communication network - In a method for equipping a microprocessor-controlled device with new software code via a communication network, the device has a non-volatile program memory, with two memory areas, a first memory area and a second memory area. The first memory area (boot sector) is provided for a basic program, which provides a first operating system and first functionalities of the device, and the second memory area (update sector) is provided for the software code to be transferred. The first memory area is protected by hardware means against overwriting. The following method steps are performed. First, there is a system boot with the basic program from the first memory area. In such case, a system variable UPDATE is read. In case this has the value “perform update”, an invocation of a function “perform firmware update” occurs. Then this variable is set to the value “invalid firmware”. Next, a connection is established to a superordinated unit and the new software code is transferred into the device. Following storage of the new software code in the second memory area, a test of the new software code for bit error is performed. In case bit errors have occurred during the transfer, a new system boot is performed. If no bit errors have occurred, the new software code is executed from the second memory area and the system variable UPDATE is written with the value “valid firmware”. Through this method, a safe equipping of microprocessor-controlled devices with new software code via a communication network is possible.2009-08-27
20090217024Recovering from Hard Disk Errors that Corrupt One or More Critical System Boot Files - A system, method, and program product is provided that recovers from a sector error affecting a critical file. A damaged sector prevents a critical file from being read prevents the computer system from booting. A controller records a sector number corresponding to the damaged sector. The system is rebooted using an alternative boot media. The system accesses the primary nonvolatile storage media after the rebooting. The damaged sector number is read from the error log and a file map is used to determine the critical file that is stored in the damaged sector. A backup copy of the critical file is retrieved from a backup media. The backup copy is written to the primary media using undamaged sectors and the critical file is mapped to the undamaged sectors. The system is subsequently booted successfully from the primary nonvolatile storage media.2009-08-27
20090217025Method and System for Implementing a Diagnostic or Correction Boot Image Over a Network Connection - The present invention is directed to a system that initiates specific maintenance and diagnostic boot images on remote computers. The system is used to select a particular remote device over a network. A particular new boot image is also selected, and that boot image is tailored to operate a maintenance or diagnostic function on the target machine. The new boot image is downloaded to the target, and the target is rebooted with the new boot image. The new boot image is selected from other specific boot images. Upon reboot, the new boot image performs the diagnostic or maintenance routines on the remote target machine. At some predetermined point, the original boot image is swapped back, and the machine rebooted once again. This returns the machine to its original image.2009-08-27
20090217026METHOD FOR CHANGING POWER STATES OF A COMPUTER - A method for changing power states of a computer sends a shutdown event to all running applications before the computer goes to sleep to prevent data loss in a sleep state of the computer. Furthermore, the method stores a system memory image into a flash memory before the computer goes to the sleep state. Moreover, the method restores the system memory image from the flash memory to the system memory when the computer exit the sleep state to come back the work state.2009-08-27
20090217027Safe e-mail for everybody - Like wearing seatbelts. Like using condoms. Security measures only work if done correctly and done all the time, but we don't use security measures when burden weighs more heavily than risk. That's why e-mail is rarely encrypted. Too difficult. Too costly. Balanced against little perceived risk in sending e-mails in the clear. Our simple, yet secure, e-mail encryption system changes that. It's easy to use—anyone who can use e-mail can use our encryption system. Users pay no charge for basic service—it's free. We make money in other ways. Other e-mail encryption systems cost too much, are too complex, need special hardware, and are not compatible. Ours is safe, easy, and free, and viral adoption can make our system the global standard for sending secure e-mails. With the privacy people get from our invisible, easy-to-use system, e-mail will be safe for everybody.2009-08-27
20090217028METHOD OF ADDING A POSTSCRIPT MESSAGE TO AN EMAIL - A system and method providing for appending of a note or instruction to the contents of an email such that the note or instructions is only appended to emails of selected recipients of a group of recipients, with only the email going to the other recipients of the group of recipients is provided.2009-08-27
20090217029KERBEROS TICKET VIRTUALIZATION FOR NETWORK LOAD BALANCERS - An exemplary group ticket for a Kerberos protocol includes a service ticket encrypted with a dynamic group key and a plurality of enveloped pairs where each pair includes a name associated with a member of a group and an encrypted the dynamic group key for decryption by a key possessed by the member of the group where decryption of an encrypted dynamic group key allows for decryption of the service ticket. Other exemplary methods, systems, etc., are also disclosed.2009-08-27
20090217030ADAPTIVE SERVER PERFORMANCE ADJUSTMENT - Apparatus, systems, and methods may operate to calculate the cryptographic throughput for a gateway server, calculate the input-output throughput for the gateway server, and responsive to determining that the cryptographic throughput is less than the input-output throughput, add nodes to the gateway server cryptographic buffer queue when a projection indicates that the sum of data remaining in the cryptographic buffer queue and data available to enter the cryptographic buffer queue is greater than a preselected watermark value. Additional apparatus, systems, and methods are disclosed.2009-08-27
20090217031Electrical System of a Motor Vehicle With a Master Security Module - The invention relates to an electrical system of a motor vehicle with control apparatuses, which communicate with one another by means of a data bus. To recognise manipulations to the electrical system of a motor vehicle, in particular on the software of the control apparatuses of the electrical system, and to derive suitable measures, it is proposed that a master security module is provided in a first control apparatus and a client security module is provided in each case in a plurality of the further second control apparatuses, and the master security module of the first control apparatus, preferably a central gateway control apparatus, signs a message and sends the signed message to at least one of the second control apparatuses by means of the data bus. The client security module of the second control apparatus checks the signed message received from the master security module as to whether it comes from an authorised master security module.2009-08-27
20090217032METHOD FOR GENERATING SAK, METHOD FOR REALIZING MAC SECURITY, AND NETWORK DEVICE - A method for generating a secure association key (SAK), a method for realizing medium access control security (MACsec) and a network device are provided. The method for generating an SAK includes the following steps. A sending key selection protocol (KSP) instance sends a key selection protocol data unit (KSPDU) to the other KSP instances in the same secure connectivity association (CA). The KSPDU includes a secure connectivity association key identifier (CKI) of the instance and information about a MACsec level that the sending KSP instance belongs to. If the receiving KSP instance and the sending KSP instance belong to the CA with the same MACsec level, an SAK is generated based on the KSPDU. The MACsec of multiple levels in a communication network and the secure MACsec network communication with multiple levels are realized, thus ensuring the confidentiality of the network communication.2009-08-27
20090217033Short Authentication Procedure In Wireless Data Communications Networks - In a wireless communications network including at least one authenticator and at least one authentication server, wherein the authenticator is adapted to interact with the authentication server for authenticating supplicants in order to conditionally grant thereto access to the wireless communications network, a short authentication method for authenticating a supplicant, the method including: providing a shared secret, shared by and available at the supplicant and the authentication server; having the supplicant provide to the authenticator an authentication token, wherein the authentication token is based on the shared secret available thereat; having the authenticator forward the authentication token to the authentication server; having the authentication server ascertain an authenticity of the received authentication token based on the shared secret available thereat; in case the authenticity of the authentication token is ascertained, having the authentication server generate a first authentication key based on the shared secret available thereat, and provide the generated authentication key to the authenticator; having the supplicant generate a second authentication key based on the shared secret; and having the supplicant and the authenticator exploit the generated first and the second keys for communicating with each other. The short authentication method is particularly useful in situations of handoff of the supplicant from an authenticator to another.2009-08-27
20090217034Multi-step digital signature method and system - A multi-step signing system and method uses multiple signing devices to affix a single signature which can be verified using a single public verification key. Each signing device possesses a share of the signature key and affixes a partial signature in response to authorization from a plurality of authorizing agents. In a serial embodiment, after a first partial signature has been affixed, a second signing device exponentiates the first partial signature. In a parallel embodiment, each signing device affixes a partial signature, and the plurality of partial signatures are multiplied together to form the final signature. Security of the system is enhanced by distributing capability to affix signatures among a plurality of signing devices and by distributing authority us affix a partial signature among a plurality of authorizing agents.2009-08-27
20090217035Bilaterally Generated Encryption Key System - Bilaterally Generated Encryption Key System is a variable password based computationally non intensive symmetric encryption key system dispensing with memorization and exchange of keys, capable of providing one encryption key for each object exchanged between two parties, two different encryption keys per transaction and a plurality of encryption keys for a session, integrating authentication and securing transactions preventing breaking attempts. The Password/Encryption Key is a random permutation of Character Units of Variable Character Set System of authentication devices {FIG. 2009-08-27
20090217036DIGITAL RIGHTS MANAGEMENT - In a digital rights management (DRM) scheme a mobile terminal (2009-08-27
20090217037Method and Devices for Secure Measurements of Time-Based Distance Between Two Devices - In order to provide a secure measurement of Round Trip Time (RTT), the calculation of RTT and the authentication data are separated. A device A sends a message to device B to start the method. Both devices generate a random number and device A waits for device B to finish. Device A sends its random number to B, which answers with its own random number, and device A calculates the RTT. If the RTT is below a certain limit, device A then requires authentication data, which is calculated by device B and sent to device A that verifies the authentication data. The RTT can thus be securely calculated regardless of the calculating resources of device B. Alternate embodiments, a system and devices are also provided.2009-08-27
20090217038Methods and Apparatus for Locating a Device Registration Server in a Wireless Network - Methods and apparatus for locating and accessing a data server in a wireless network are disclosed. The disclosed techniques may be used to allow a wireless device provided with temporary credentials to access a wireless network and obtain a network address for a data server for downloading subscription credentials. An exemplary wireless device comprises a processing unit configured to send an access authentication request to a wireless network, and to receive an authentication challenge value from the wireless network in response. The processing unit is further configured to generate a cryptographic response from the authentication challenge value and to send the cryptographic response to the wireless network, and to also derive a data server address from the authentication challenge value. Thus, the authentication challenge value serves two purposes—as a challenge key for use in a network access authentication procedure, and as a carrier for data server address information.2009-08-27
20090217039System, Method and Apparatus for Authenticating Calls - The present invention provides a system, method and apparatus for authenticating calls that is a robust Anti-vishing solution. The present invention can identify Caller ID spoofing, verify dialed number to detect man-in-the middle and verify called party against dialed digits to detect impersonation. This solution can handle calls coming from any phone any where with little impact on user experience. Two separate solutions are tailored for smart phones (communication devices capable of running application software) and traditional phones to reduce the impact to user experience while providing robust verification.2009-08-27
20090217040INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND COMPUTER READABLE RECORDING MEDIUM - An information processing apparatus for collecting apparatus data from an apparatus connected through a network and sending the apparatus data to a server connected through the network includes a recording unit storing a secret key and a public key certificate which are encrypted by key data and commonly distributed; an obtaining unit for obtaining, from the information processing apparatus, individual identification data by which the information processing apparatus can be uniquely identified, sending a request to provide the predetermined key data through the network to the server by specifying the individual identification data, and receiving the key data encrypted by the individual identification data from the server; and a decoder for obtaining the individual identification data from the information processing apparatus, decoding the key data by using the individual identification data, and decoding the common public key certificate and the secret key by using the decoded key data.2009-08-27
20090217041PROVISIONAL SIGNATURE SCHEMES - A method and apparatus for implementing portions of a provisional signature scheme are disclosed. In one embodiment, the method comprises creating a provisional signature by performing an operation on a message and completing the provisional signature to create a final signature on the message. Such a scheme may be used for server assisted signature schemes, designated confirmer signature schemes and blind signature schemes.2009-08-27
20090217042PROVISIONAL SIGNATURE SCHEMES - A method and apparatus for implementing portions of a provisional signature scheme are disclosed. In one embodiment, the method comprises creating a provisional signature by performing an operation on a message and completing the provisional signature to create a final signature on the message. Such a scheme may be used for server assisted signature schemes, designated confirmer signature schemes and blind signature schemes.2009-08-27
20090217043METHOD AND SYSTEM FOR MUTUAL AUTHENTICATION OF NODES IN A WIRELESS COMMUNICATION NETWORK - A method as provided enables mutual authentication of nodes in a wireless communication network. The method includes processing at a first node a beacon message received from a second node, wherein the beacon message comprises a first nonce value (step 2009-08-27
20090217044AUTOMATED KEY MANAGEMENT SYSTEM AND METHOD - A system and method for automatic key and certificate management is disclosed. In particular, a key store in a base computer contains both new and previously viewed cryptographic keys. In one embodiment, for each new key, if a corresponding certificate matches an existing certificate, the new certificate may be automatically downloaded to a mobile communications device without prompting a user.2009-08-27
20090217045PHYSICAL SECRET SHARING AND PROOFS OF VICINITY USING PUFS - The present invention relates to a method of creating challenge-response pairs, a method of authenticating a plurality of physical tokens, a system for creating challenge-response pairs and a device for authenticating a plurality of physical tokens. A basic idea of the invention is to interconnect a plurality of physical tokens (2009-08-27
20090217046METHOD AND APPARATUS FOR THE SECURE IDENTIFICATION OF THE OWNER OF A PORTABLE DEVICE - An authentication system is provided that includes a portable device and a decryption node. An individual uses the portable device, such as a portable device like a cell phone to compute a challenge and a response. The challenge and response is sent to a decryption node. In response, the decryption node computes a presumed response and compares the presumed response to the response of the portable device, in order to authenticate the individual associated with the portable device.2009-08-27
20090217047SERVICE PROVIDING SYSTEM, SERVICE PROVIDING SERVER AND INFORMATION TERMINAL DEVICE - A service providing system is provided, which includes a client device capable of accessing a tamper-resistant secure memory, an area management server managing memory area of the secure memory and a service providing server providing service that uses the secure memory to the client device, and which improves the security at the time of sending an access control list provided by the area management server and an instruction set provided by the service providing server to the client device by using a digital signature and a certificate.2009-08-27
20090217048WIRELESS DEVICE AUTHENTICATION BETWEEN DIFFERENT NETWORKS - A method and system for roaming between heterogeneous networks. The method involves authenticating a mobile communication device on a first network, providing the device with a single-use token that can be used to sign-on to a second network without requiring conventional re-authentication over the second network. The method and system allows a token or set of tokens to be sent to a mobile device over a secure and trusted channel. The token can then be sent over another network, operating over a different protocol to an authentication system where its contents are verified and authorization to access the new network is generated such that the token does not need to be processed by the new network. Hence the mobile device does not need to re-authenticate to the new network.2009-08-27
20090217049METHOD FOR LINKING A DIGITAL CONTENT TO A PERSON - A process is proposed for linking digital content specific to the person. This is marked by the following steps: generation of a on-to-one key, generation of a first data record that contains the key and data space identifying the person, implementation of the key in the digital content.2009-08-27
20090217050SYSTEMS AND METHODS FOR OPTIMIZING SIGNATURE VERIFICATION TIME FOR A CRYPTOGRAPHIC CACHE - Embodiments provide systems and methods to optimize signature verification time for a cryptographic cache. Time is reduced by eliminating at least some of the duplicative application of cryptographic primitives. In some embodiments, systems and methods for signature verification comprise obtaining a signature which was previously generated using an asymmetrical cryptographic scheme, and determining whether an identical signature has previously been stored in a signature cache. If an identical signature has been previously stored in the signature cache, retrieving previously generated results corresponding to the previously stored identical signature, the results a consequence of application of cryptographic primitives of the asymmetrical cryptographic scheme corresponding to the identical signature. The results are forwarded to a signature verifier. In at least some embodiments, at least one of these functions occurs in a secure execution environment.2009-08-27
20090217051Method for distribution of multimedia tracks through computer networks - A method for distributing multimedia files through a computer network comprises the steps of selecting a multimedia track from an archive, encoded in a digital file according to a conventional encoding which comprises a header and a division into frames; converting a plurality of the conventionally encoded frames into encrypted frames; applying a digital signature in the header; generating an audio file which comprises a signed header, a plurality of frames with conventional encoding and a plurality of encrypted frames.2009-08-27
20090217052Method for time-stamped watermarking, method and device for time stamp decoding use - The invention relates to a method for watermarking at least one timestamp in a set of support data, comprising the following steps for each timestamp: association with the timestamp of the value at a given time of a reference timestamp signal, that is a determinist signal varying over time in a given temporal reference and being written as s(t), wherein t is incremented according to an incrementing step equal to one predetermined time unit; and watermarking of the value in the set of support data. The invention also relates to a corresponding decoding method comprising the following steps: reading, in the set of support data, of at least one value of a phase-shifted timestamp signal, of the same form as the reference timestamp signal but having in relation to this signal an unknown phase shift φ in a given temporal reference, the previous watermarking of each timestamp consisting in a watermarking of the value at a given watermarking time of the reference timestamp signal; estimation of the phase shift φ from the at least one read value of the phase-shifted timestamp signal and from the knowledge of the reference timestamp signal; and for the at least one read value, read at a given time t2009-08-27
20090217053IMAGE FORMING APPARATUS, DATA PROCESSING METHOD, AND COMPUTER READABLE RECORDING MEDIUM - An image forming apparatus capable of executing a program in plural program execution environments is disclosed. The disclosed image forming apparatus includes a storage unit storing cryptographic data related to a cryptographic function; a first recording unit configured to obtain the cryptographic data from the storage unit and record the cryptographic data in a first storage area that can be referenced from the plural program execution environments; and plural second recording units provided in the plural program execution environments and configured to obtain the cryptographic data from the first storage area and record the cryptographic data in a second storage area for each of the plural program execution environments so that the cryptographic data can be referenced by the program executed in the plural program execution environments.2009-08-27
20090217054SECURE SOFTWARE AND HARDWARE ASSOCIATION TECHNIQUE - In an embodiment, authenticated hardware and authenticated software are cryptographically binded using symmetric and asymmetric cryptography. Cryptographically binding the hardware and software ensures that original equipment manufacturer (OEM) hardware will only run OEM software. Cryptographically binding the hardware and software protects the OEM binary code so it will only run on the OEM hardware and cannot be replicated or altered to operate on unauthorized hardware. This cryptographic binding technique is referred to herein as secure software and hardware association (SSHA).2009-08-27
20090217055Apparatus and Method for Preventing Unauthorized Copying - The present invention relates to an apparatus for preventing unauthorized copying that comprises a casing, an optical storage device, a control center installed in the casing and coupled to the optical storage device, and an input/output port installed in the casing and exposed from the casing and coupled to an electronic device, such that if a user places a medium into the optical storage device, the control center will determine whether or not the medium is a read-once medium; if yes, then the content of the medium will be copied to the control center. In the meantime, the electronic device is examined to check whether or not the electronic device is a copy permit user; if yes, then the control center will copy the content of the medium to the electronic device. The present invention also provides a method for preventing unauthorized copying.2009-08-27
20090217056Secure and Usable Protection of a Roamable Credentials Store - A tool which facilitates a balancing of security with usability enabling secure user access to multiple secure sites and locations from several computing devices utilizing a roamable credential store (RCS) which is highly resistant to offline attack. The RCS facilitates a protected Unified Credential Vault (UCV) via a multi-stage encryption process such that user credentials are protected by making offline dictionary attacks prohibitively expensive to an attacker without causing usability to deteriorate commensurately.2009-08-27
20090217057Download And Burn To Rent System - A system and method provide for content to be downloaded by an information handling system (IHS) and written to an optical storage medium. The content is protected by a content protection system. The content on the storage medium may be decrypted and displayed by a playback device. An invalid credential is written to the storage medium, for example, after display of the content. The invalid credential restricts decryption of the content. Examples of credentials that may be invalidated by writing an invalid credential to the storage medium include any keys, usage rules, or other items required for the decryption of content, for example, under content scrambling system (CSS) or advanced access content system (AACS) content protection systems.2009-08-27
20090217058SECURE DATA TRANSFER AFTER AUTHENTICATION BETWEEN MEMORY AND A REQUESTER - Systems and/or methods are presented that can facilitate controlling access to secure memory blocks within a memory module. The subject innovation can employ key components that can contain two or more storage locations for authentication information that can facilitate controlling access to secure memory block components. Secure memory block counter components can be employed to indicate which storage location within the key component contains current authentication information associated with the respective secure memory block components. The disclosed subject matter allows for multiple secure memory block components to have separate authentication information to provide more than one user or entity to store data in their own secure memory block component. Multiple storage locations associated with the key components to substantially alleviated or eliminate the loss of secure areas of a memory module if power is lost during the updating of the authentication information associated with the secure areas.2009-08-27
20090217059Utilizing Networked Three Dimensional Voltage Regulation Modules (VRM) to Optimize Power and Performance of a Device - A method, system, and computer program for using an array of networked 3D voltage regulation modules (VRMs) to optimize power usage by components on a voltage island in real time is presented. The networked VRM devices work in parallel to supply adequate power to connected voltage islands, and to supplement other VRMs in the system that may require additional power in the case of a critical event.2009-08-27
20090217060POWER SUPPLY CONTROL DEVICE - To improve the efficiency of power supply units, and save the power of a device. A power supply control device for controlling on/off of a plurality of power supply units which supply power to a device, includes: a necessary power amount obtaining device which obtains a necessary power amount that shows a value of a power amount required by the device; a power supply unit specifying device which extracts combinations of a single or a plurality of power supply units capable of supplying the necessary power amount based on power amount-efficiency tables, calculates an efficiency of the power amount supplied to the device from the power supply units of the respective combinations, and specifies a combination of the power supply units whose calculated efficiencies satisfy a preset condition; and a power supply controller which controls the power supply units in specified combination to supply the power to the device.2009-08-27
20090217061COMPUTER SYSTEM, STORAGE SYSTEM, AND DEVICE CONTROL METHOD - A computer system, storage system, and device control method which keep and operate long-term data stored in a disk device using its characteristics for a long time and at low cost, in a storage system or in a storage system using an external storage connection method. A computer system comprises a host computer, a storage system, and a management server, which are connected to one another via a network. The storage system receives a request to detach a logical device, specifies a logical device to be processed with information included in the request and a physical device corresponding to the relevant logical device, releases a definition of a host path of the logical device, and stops the physical device.2009-08-27
20090217062SYSTEM AND METHOD FOR COMMUNICATING INFORMATION RELATING TO POWERED DEVICE POWER INTERRUPTION AND ASSOCIATED POWER SOURCING EQUIPMENT FALLBACK POWER - A system and method for communicating information relating to powered device (PD) power interruption and associated power sourcing equipment (PSE) fallback power. A PD can be powered using a primary local power source and a secondary power over Ethernet (PoE) power source. The PD communication can provide information that relates to PSE power delivery to the PD that is contingent upon detection of a failure occurring at the powered device.2009-08-27
20090217063Information processing apparatus - An information processing apparatus includes: a data processing unit configured to perform predetermined data processing; a power supply circuit having a first operation mode in which power is supplied to the data processing unit and a second operation mode in which no power is supplied to the data processing unit; and a mode switching control unit configured to, upon receiving a mode switching request from an apparatus on a network via a communication protocol of a communication protocol layer higher than the network access layer, instruct the power supply circuit to switch between the first operation mode and the second operation mode in response to the mode switching request.2009-08-27
20090217064Power supply controlling apparatus and power supply controlling system - A power supply controlling apparatus includes: a first determination portion that determines whether a power supply is output from an information processing apparatus that outputs a video signal and is connected to the power supply controlling apparatus; a second determination portion that, when it is determined that the power supply is output from the information processing apparatus, determines whether a switch signal that indicates turning off a power supply of a power supply device supplying the power supply to the information processing apparatus has been received from a remote device outputting the switch signal in response to the depression of a switch, the power supply device and the remote device being connected to the power supply controlling apparatus; and a discard portion that discards the switch signal when it is determined that the switch signal has been received from the remote device.2009-08-27
20090217065POWER MANAGEMENT BASED ON POLICY - A machine's power usage may be managed by a power-management policy. When a program makes a request that involves use of one of the machine's power-consuming devices, the policy may take into account factors such as the program's status, where the status indicates the program's relative level of justification to consume power. A component may intercept a request to use a device before the request reaches the driver, and may deflect requests that, if carried out, are not consistent with power usage policy. Infrastructure supports the use of policies that determine whether a particular device's power state will be changed.2009-08-27
20090217066CONTROLLING CONNECTION STATUS OF NETWORK ADAPTERS - A method, medium and implementing processing system are provided for controlling the number of Ethernet adapters connected in an EtherChannel depending upon the current bandwidth requirements of the system. This system reduces power consumption, inter alia, wherever possible while not sacrificing performance or flexibility of an EthernetChannel. An exemplary embodiment EtherChannel's total bandwidth utilization is monitored and controlled. When the bandwidth utilization is a predetermined amount less than or more than a predetermined threshold level, power supplied to one or more of the physical Ethernet adapters that are part of the EtherChannel is adjusted, i.e. reduced or increased, accordingly. In another embodiment, in systems where ethernet devices support different levels of power, the power supplied to one or more adapters can be systematically incrementally reduced or increased in response to reduced or increased bandwidth utilization.2009-08-27
20090217067Systems and Methods for Reducing Power Consumption in a Redundant Storage Array - A method for reducing power consumption in a mirrored disk array including first disk resources mirrored with second disk resources is provided. A write request to write particular data to the mirrored disk array is received. In response to receiving the write request, the first disk resources are spun to write the particular data to the first disk resources, and the particular data is stored to a cache memory without spinning the second disk resources. Subsequent to storing the particular data to the first disk resources and storing the particular data to the cache memory, the second disk resources are spun to write the particular data from the cache memory to the second disk resources.2009-08-27
20090217068Structure For Detecting Clock Gating Opportunities In A Pipelined Electronic Circuit Design - A design structure for a pipeline electronic processor device may be embodied in a machine readable medium for designing, manufacturing or testing a processor integrated circuit. The design structure may embody a pipeline electronic circuit that enables power conservation in the stages of the pipeline via a simulation that identifies clock-gating opportunities among the stages of the pipeline. In one embodiment, simulation results assist a designer in the design of the pipeline electronic circuit design structure to achieve power conservation by incorporating clock-gating circuitry among the stages of the pipeline at clock gating opportunity locations that the simulation identifies.2009-08-27
20090217069Power Management Method for a Multi-Microprocessor System - A power management method for a multi-microprocessor system is provided. The multi-microprocessor system comprises a first microprocessor and a second microprocessor. The power management method comprises steps of receiving a power down instruction; transmitting a power down notice signal to the first microprocessor from the second microprocessor, transmitting a reply signal from the first microprocessor to the second microprocessor in response to the power down notice signal, and turning off power of the first microprocessor by the second microprocessor.2009-08-27
20090217070Dynamic Bus Parking - Systems and methods of power management provide for issuing a power saving message from a processor toward a controller and using the controller to conduct a power saving activity in response to the power saving message. In one embodiment, the power saving message is issued by de-asserting a bus arbitration signal and the power saving activity can include disabling one or more input buffers of the controller.2009-08-27
20090217071DATA PROCESSING DEVICE AND METHOD FOR SWITCHING STATES THEREOF - The present invention provides a data processing device and a method for switching states thereof. The data processing device comprises an operating system and a communication interface for communicating with another data processing device, wherein the communication interface is enabled when the operating system stays in the operating state of the operating system, and the communication interface is disabled when the operating system stays in a low-power-consumption state. The method for switching states comprises the following steps of: detecting whether the communication interface stays in the operating state of the communication interface and generating detection information; determining whether the operating system stays in the operating state of the operating system when the detection information indicates that the communication interface stays in the operating state of the communication interface, and generating determination information; generating a system state holding command when the determination information indicates that the operating system stays in the operating state of the operating system; and controlling the operating system to stay in the operating state of the operating system based on the system state holding command. The present invention can not only secure communication via the data communication interface, but also allow the operating system to handle normally and stably an interrupt, so as to reduce the system power consumption.2009-08-27
20090217072AUTOMATED ELECTRICAL POWER SAVINGS IN VIRTUALIZATION ENVIRONMENTS - Methods and apparatus, including computer program products, are provided for shutting down a host, such as a computer, server, and the like, to enable power savings. In one aspect, there is provided a computer-implemented method. The computer-implemented method includes determining whether to shutdown an application at a virtual machine. The determination is made using information from the application. The virtual machine and application operate on a host. A power management mechanism of the host may be initiated to enable a power savings when compared to not shutting down the host. Related apparatus, systems, methods, and articles are also described.2009-08-27
20090217073SYSTEM FOR MODULATING SIGNALS OVER POWER LINES TO UNDERSTAND THE POWER DISTRIBUTION TREE - A power distribution system comprises an input power line configured to supply power produced by a power source, one or more power distribution components operatively connected to receive power supplied by the power source, one or more intelligent system resources, and a power management component. Each power distribution component has one or more power outputs for distributing power along a power line connected thereto and is configured to modulate a carrier signal containing identification data along the power line connected to each output. Each system resource is operatively connected to receive power distributed by at least one of the one or more power distribution components. Each system resource is configured to receive and demodulate the carrier signal modulated by each power distribution component from which it receives power, generate a list of each power distribution component from which it receives power, and pass the list to a system bus. The power management component is configured to receive and process each list from the system bus to generate a mapping of the at least power distribution component from which each system resource receives power.2009-08-27
20090217074TIME SYNCHRONIZATION IN UNITS AT DIFFERENT LOCATIONS - To synchronize units of a formation evaluation/drilling operation evaluation system, a time delay associated with a communications link between a master unit and a slave unit of the formation evaluation/drilling operation evaluation system is determined. The master unit has a master time clock that provides universal time. The time delay associated with the communications link is used to enable synchronization of time provided by a slave time clock in the slave unit to the universal time.2009-08-27
20090217075Signal Phase Verification for Systems Incorporating Two Synchronous Clock Domains - The present invention implements a mechanism which enables zero-delay verification tools to detect clock domain crossing violation in device under test designs comprising two different clock domains where the fast clock is an integer multiple of the slow clock by inserting undefined (i.e., invalid) values on slow clock domain signals during the clock periods when the signals are not supposed to be captured. The undefined values are contained in the logic cone and emulate timing uncertainly of the path. Propagation of the undefined values through the capturing latch indicates improper clock domains crossing handling.2009-08-27
20090217076PERSONAL IDENTIFICATION MEDIUM, DISPLAY METHOD FOR A PERSONAL IDENTIFICATION MEDIUM, TIME AND ATTENDANCE MANAGEMENT SYSTEM, AND CUSTOMER INFORMATION MANAGEMENT SYSTEM - A personal identification medium enables easily confirming specific information. A time and attendance management system and a customer information management system both use the personal identification medium. An individual information storage unit 2009-08-27
20090217077METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PROCESSOR ERROR CHECKING - A method for processor error checking including receiving an instruction data, generating a pre-processing parity data based on the instruction data, maintaining the pre-processing parity data, processing the instruction data, generating a post-processing parity data based on the processed instruction data, checking for an error related to processing the instruction data by comparing the post-processing parity data to the pre-processing parity data, and transmitting an error signal that indicates the error related to processing the instruction data occurred if the post-processing parity data does not match the pre-processing parity data, wherein checking for the error related to processing the instruction data is performed without using a duplicate processing circuitry.2009-08-27
20090217078APPARATUS AND METHODS FOR MANAGING MALFUNCTIONS ON A WIRELESS DEVICE - Apparatus and methods for managing predetermined malfunction events in a wireless device operating in a wireless communications network. Malfunction event data and operational data are recorded by the wireless device based on a selected malfunction event tracking configuration. Further, a recovery module associated with the wireless device operates to attempt to recover information leading up to and including the malfunction event. The collected information may be transmitted to a user manager in the form of a malfunction event log. The malfunction event log may be analyzed to characterize the malfunction, and is particularly useful for determining the sequence and identity of events leading to the malfunction, including a crash, freeze and reset.2009-08-27
20090217079METHOD AND APPARATUS FOR REPAIRING MULTI-CONTROLLER SYSTEM - A method and apparatus for repairing a multi-controller system is provided. The method includes: starting network boot, by a controller whose system boot fails, to download repair files from a controller whose operation is normal; and repairing, by the controller whose system boot fails, its own system, based on the repair files. The apparatus includes at least two controllers, and a network boot unit coupled to the at least two controllers, configured to start network boot by a controller whose system boot fails. Each controller includes a detection unit, a local boot unit, a repair file downloading unit, and a repairing unit. According to embodiments of the invention, after system boot fails to any controller, system repair may be performed automatically by downloading system files from another controller through network boot.2009-08-27
20090217080DISTRIBUTED FAULT TOLERANT ARCHITECTURE FOR A HEALTHCARE COMMUNICATION SYSTEM - A healthcare communication system includes a first plurality of computer devices, such as patient stations, staff stations, and a master station, that are operable as a nurse call system. The first plurality of computer devices may have core nurse call functionality residing on an embedded computing platform. At least one of the first plurality of computer devices may have a graphical display screen. A second plurality of computer devices may be operable to provide the first plurality of computer devices with additional functionality via software plug-ins that are transmitted to the first plurality of computer devices. The first plurality of computer devices may be interconnected logically and/or physically in a tiered architecture arrangement to provide fault isolation among the tiers so that faults occurring in computer devices of one tier don't affect the operability of computer devices in other tiers and so that faults occurring in any of the second plurality of computer devices don't affect the core nurse call functionality of the first plurality of computer devices.2009-08-27
20090217081System for providing an alternative communication path in a SAS cluster - The present invention is a system and method for supporting an alternative peer-to-peer communication over a network in a SAS cluster when a node cannot communicate with another node through a normal I/O bus (Serial SCSI bus). At startup, driver may establish the alternative path for communication but may not use it as long as there is an I/O Path available. In the present invention, two types of P2P calls, such as event notification calls and cluster operation calls may be supported.2009-08-27
20090217082Method of Achieving High Reliablility of Network Boot Computer System - In a network computer system, recovery may be impossible from a fault when the fault occurs in a network switch in a network or a device such as an external disk device. Provided is a computer system that includes a plurality of servers, a plurality of network, a plurality of external disk devices, and a management computer, in which the management computer detects a fault which is occurred, retrieves an application stop server inaccessible to the used disk due to the fault, retrieves the disk for storing the same contents as contents stored in the disk used by the retrieved application stop server and the external disk device including the disk, retrieves an application resuming server capable of accessing the retrieved external disk device, and transmits an instruction to boot by using the retrieved disk to the retrieved application resuming server.2009-08-27
20090217083FAILOVER METHOD THROUGH DISK TAKEOVER AND COMPUTER SYSTEM HAVING FAILOVER FUNCTION - When a primary server executing a task fails in a computer system where a plurality of servers are connected to an external disk device via a network and the servers boot an operation system from the external disk device, task processing is taken over from the primary server to a server that is not executing a task in accordance with the following method. The method for taking over a task includes the steps of detecting that the primary server fails; searching the computer system for a server that has the same hardware configuration as that of the primary server and that is not running a task; enabling the server, searched for as a result of the search, to access the external disk device; and booting the server from the external disk device.2009-08-27
20090217084Digital Signage Redundancy - The subject matter of this specification can be embodied in, among other things, a method that includes transmitting content to a location for presentation across a plurality of display devices that each present a portion of the content. The method includes receiving an indication that a first portion of the content managed by a first computing device is unable to be presented on a first display device. The method also includes transmitting a command to display the first portion on a second display device (where the second display device is configured to present a second portion of the content) if the received indication specifies that the first display device experienced a failure or transmitting a command that the first portion be displayed on the first display device using a second computing device if the received indication specifies that the first computing device experienced a failure.2009-08-27
20090217085SYSTEMS AND METHODS FOR INCREMENTAL RESTORE - An embodiment relates generally to a method of restoring data in storage systems. The method includes providing for a current snapshot of a primary storage system at a secondary storage system and mounting an empty volume in the primary storage system. The method also includes receiving a request for a selected block of data in the primary storage system and retrieving a restore block from the secondary storage system, where the restore block encompasses the selected block of data. The method further includes writing the restore block to the empty volume in the primary storage system as an incremental restore process.2009-08-27
20090217086Disk array apparatus, disk array control method and disk array controller - An error table stores information indicating the occurrence of an error. A statistical score addition table stores the number of scores for disk or path according to the error. A control unit adds the first number of scores to the error disk. Also, when the information indicating the occurrence of the error is not stored in the error table, the control unit adds the second number of scores smaller than the first number of scores to the path to the error disk, while when the information is stored, the control unit adds the third number of scores larger than the first number of scores to the path. The control unit separates the path or disk of which the number of scores exceeds a threshold from the disk array apparatus.2009-08-27
20090217087COMPUTER DEVICE, CONTINUING OPERATION METHOD FOR COMPUTER DEVICE, AND PROGRAM - A computer device that includes a plurality of processor boards each provided with a processor, a memory, and a chipset, includes a first processor board that makes data in a cache, which have become unfixed as a result of an uncorrectable failure, invalid when the uncorrectable failure occurs on the first processor board in operation, and switches from the first processor board to a second processor board for replacement, and the second processor board that re-executes an instruction that was being executed in the first processor board when the failure occurred.2009-08-27
20090217088POWER OVER ETHERNET POWERED DEVICE WITH POWER FALLBACK STATES - A power over Ethernet (PoE) powered device with power fallback states. A powered device can be powered using a primary local power source and a secondary PoE power source. To enable consistent behavior by the powered device, a controlled power fallback state can be defined that would ensure limited functionality in the powered device upon a failure of the primary local power source. For example, the limited functionality could include a communication channel to the switch, diagnostic circuitry, etc.2009-08-27
20090217089METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR CONNECTION STATE RECOVERY AFTER FAULT - A method, system, and computer program product for connection state recovery of a connection after fault in a networked channel-to-channel computer system are provided. The method includes identifying essential data in response to detecting a state change in a channel of the computer system, the essential data including connection state information used in performing a recovery operation. The method also includes separating the essential data from transient or incidental data, augmenting the essential data with validation data, and storing the augmented essential data in a memory location of a control unit in communication with the channel. In response to initiation of a recovery operation, the method includes retrieving the augmented essential data and validating contents of persistent data fields containing the essential data. The method further includes using the contents to restore the connection to an operational state when it is determined that the contents of the persistent data fields are valid.2009-08-27
20090217090Method, operating system and computing hardware for running a computer program - A method for running a computer program on computing hardware, in particular on a microprocessor. The computer program includes multiple program objects designed as tasks, for example. Transient and permanent errors are detected during the running of the computer program on the computing hardware. To be able to handle these transient errors constructively when they occur in a computer system in such a way that the functionality and function reliability of the computer system are restored within the shortest possible error tolerance time, at least one program object that has already been sent for execution is set into a defined state on detection of an error and is restarted from this state. The program object is a runtime object of the computer program, for example, also known as a task. One or more tasks that are still being executed or have already been executed on occurrence of an error are restarted and run again.2009-08-27
20090217091DATA BACKING UP FOR NETWORKED STORAGE DEVICES USING DE-DUPLICATION TECHNIQUE - A technique of backing up data for networked storage devices using de-duplication is disclosed in which a communication device divides a to-be-stored new file into data blocks, defines and updates a statistical value representative of a history of reference to each data block within previous files, and transmits the statistical value to another communication device. The communication device, upon reception of the statistical value, selects a preloaded data block, based on the received statistical value, and transmits to another communication device a copying request for making a copy of a real data block identical to the preloaded data block. The communication device, upon reception of the copy, stores the copy as the preloaded data block.2009-08-27
20090217092Method and Device for Controlling a Computer System Having At Least Two Execution Units and One Comparator Unit - A method for controlling a computer system having at least two execution units and one comparator unit, which system is operated in the lock-step mode and in which the results of the at least two execution units are compared, wherein when or after an error is detected by the comparator unit, an error-detection mechanism is processed on at least one execution unit for this execution unit.2009-08-27
20090217093Fault Diagnosis of Serially-Addressed Memory Modules on a PC Motherboard - A test adaptor board connects to a personal computer (PC) motherboard that tests a memory module in a test socket. A standard memory module socket is removed from a target DRAM module slot on the component side and the test adaptor board connects to the target DRAM module slot on the reverse (solder) side of the motherboard. The target DRAM module slot is a middle slot, such as the second or third of four DRAM module slots. The first and fourth DRAM module slots are populated with known good memory modules storing the BIOS at a high address and an operating system image and a test program at a low address. The test program accesses a memory module in the test socket to locate defects. The motherboard does not crash since the BIOS, OS image, and test program are not stored in the memory module under test.2009-08-27
20090217094Verification Support Device, A Verification Support Method, A Program, and a Recording Medium Recording Medium Recorded With the Program On It - A verification support device that supports verification of a changed state by using changed state data and relating data. The verification support device includes a state with an abnormal condition generating unit adds the abnormal condition to the changed state thereby generating a changes state with an abnormal condition. The verification device also includes an abnormal condition inspection unit that inspects whether the abnormal data may reach the changed state based on the generated changed state with the abnormal condition and the relating data.2009-08-27
20090217095MEANS AND METHOD FOR DEBUGGING - A data processing system is provided comprising at least one processing unit (PU) for data processing and a debugger means (DM) for debugging the processing of the at least one processing unit (PU) based on a plurality of breakpoints. The debugger means (DM) comprises a first register (BAR) for storing a base address for one of the plurality of breakpoints, wherein the debugging means (DM) initiates the debugging of the processing of the at least one processing units (PU) based on the base address stored in the first breakpoint register, i.e. the base address register. A second breakpoint register (OR) is provided for storing an offset for obtaining subsequent breakpoints. A logic arithmetic unit (LAU) is provided for repetitively calculating a breakpoint condition based on the base address stored in the first breakpoint register and the offset stored in the second breakpoint register and for updating the base address stored in the first breakpoint register.2009-08-27
20090217096Diagnosing Communications Between Computer Systems - Diagnosing communications between computer systems includes sending a message from a sending node to a receiving node. The receiving node detects an error in the receiving node receiving the message and captures the data regarding the error on the receiving. A diagnostic log request is sent from the receiving node to the sending node, the diagnostic log request including a request for the sending node to log information. The sending node diagnoses the communications error in response to the diagnostic log response.2009-08-27
20090217097PORTAL FACILITATING TELECOMMUNICATION INSTALLATION AND REPAIR SERVICES - A web server includes software to support a remotely accessible web portal for installation and repair services in conjunction with a telecommunication service provided to a customer by a provider. The software includes instructions to provide a first I&R user interface, including a plurality of selectable I&R objects in response to a first input from a remote field device, receive a second input from the remote field device indicating a user's selection of one of the I&R objects, generate a request to invoke an I&R application in response to receiving the input, transmit the request to invoke the I&R application to an I&R system, receive I&R data generated by the I&R application from the I&R system, and convey information indicative of the I&R data to the remote field device.2009-08-27
20090217098MANAGING USE OF STORAGE BY MULTIPLE PAGEABLE GUESTS OF A COMPUTING ENVIRONMENT - Management of storage used by pageable guests of a computing environment is facilitated. An enhanced suppression-on-protection facility is provided that enables the determination of which level of protection (host or guest) caused a fault condition, in response to an attempted storage access.2009-08-27
20090217099OPERATIONS MANAGEMENT APPARATUS, OPERATIONS MANAGEMENT SYSTEM, DATA PROCESSING METHOD, AND OPERATIONS MANAGEMENT PROGRAM - An operations management apparatus which acquires performance information for each of a plurality of performance items from a plurality of controlled units and manages operation of the controlled units includes 2009-08-27
20090217100TEST SCRIPT TRANSFORMATION ANALYZER WITH ECONOMIC COST ENGINE - An economic engine generates accurate cost estimates for adapting a test script for use against an evolving application. Applications often have complex graphical user interfaces for which the permutations and combinations of GUI elements give rise to an enormous field of potential commands and command sequences to be tested. Furthermore, these applications change over time, rendering prior test scripts unworkable. The economic engine generates cost reports that reliably estimate the resources and time needed to produce new test scripts and test subsequent application versions, while greatly reducing the time, cost, and resource expenditures needed to arrive at subsequent application versions.2009-08-27
20090217101PROCESS AND DEVICE FOR MONITORING A MACHINE - A process for monitoring a machine, within the framework of a FMEA process for at least one component of the machine for at least one predetermined fault which can be diagnosed by means of a diagnosis diagram and a diagnosis system with sensors for detecting physical parameters of the machine, a diagnosis priority number being determined which is the product of the following index quantities: severity of the effect of occurrence of the fault with respect to the serviceability of the machine; expected machine-specific consequential costs when a fault occurs, and the possibility of correction of the fault. The diagnosis priority number is used in the evaluation of the diagnosis diagram, the diagnosis system, the current machine state, the necessary maintenance measures and/or the failure risk of the machine.2009-08-27
20090217102Fault Diagnosis of Serially-Addressed Memory Chips on a Test Adaptor Board To a Middle Memory-Module Slot on a PC Motherboard - A standard memory module socket is removed from a target DRAM module slot on the component side and the test adaptor board connects to the target DRAM module slot on the reverse (solder) side of a personal computer motherboard, or an extender card may be used. The target DRAM module slot is a middle slot, such as the second or third of four DRAM module slots. The first and fourth DRAM module slots are populated with known good memory modules storing the BIOS at a high address and an operating system image and a test program at a low address. The test program accesses a memory chip in a test socket on a test adaptor board that is connected to the target DRAM module slot to locate defects. The motherboard does not crash since the BIOS, OS image, and test program are not stored in the memory chip under test.2009-08-27
20090217103LOGICAL TO PHYSICAL CONNECTIVITY VERIFICATION IN A PREDEFINED NETWORKING ENVIRONMENT - A method, information system, and computer readable storage medium verify predefined connectivity for I/O devices. Current predefined logical connection data and actual physical connection data is gathered. The predefined logical connection data and the actual physical connection data are formatted into a plurality of sortable tables. At least a portion of the predefined logical connection data is formatted into a predefined channels table and at least a portion of the actual physical connection data is formatted into a node information table. The portion of the predefined logical connection data is compared with the portion of the actual physical connection data. The portion of the predefined logical connection data is determined to substantially match/not match the portion of the actual physical connection data. At least one predefined logical connection associated with the predefined logical connection data that fails to substantially match the actual physical connection data is displayed to a user.2009-08-27
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