30th week of 2013 patent applcation highlights part 19 |
Patent application number | Title | Published |
20130187638 | VARIABLE RELUCTANCE SENSOR USING SPATIALLY MODULATED MAGNETIC FIELDS - A sensor includes a magnetic piece with a magnetic array, a conductive coil and ferromagnetic object. The magnetic array provides a spatially modulated magnetic field that is concentrated in the near-field. A processor calculates the ferromagnetic object's speed based on voltage induced in the conductive coil. The ferromagnetic object's movement through the magnetic field causes a change in the magnetic flux, and the rate of change is proportional to the induced voltage. | 2013-07-25 |
20130187639 | INDUCTIVE DETECTION TYPE ROTARY ENCODER - A first reception wiring and a first magnetic flux coupler form a first track having a shape periodically changing in a rotation direction of the rotor at a first pitch. A second reception wiring and a second magnetic flux coupler form a second track having a shape periodically changing in a rotation direction of the rotor at a second pitch. The first reception wiring and the second reception wiring are stacked via a first insulative layer in a direction in which a rotation shaft extends. The first magnetic flux coupler and the second magnetic flux coupler are stacked via a second insulative layer in a direction in which the rotation shaft extends. | 2013-07-25 |
20130187640 | MULTIPOLAR ENCODER FOR POSITION SENSORS, AND DETECTION DEVICE INCLUDING SUCH AN ENCODER COMBINED WITH AT LEAST ONE POSITION SENSOR - A position sensor coder of the type comprising a multipolar magnetic annulus ( | 2013-07-25 |
20130187641 | Method and Apparatus for Magnetic Response Imaging - A method for identifying, measuring, and monitoring metal loss through corrosion ferromagnetic piping includes drive coils secured to the pipe and driven to emit a magnetic field which is transmitted through the object by magnetic domains in the object. Response coils detect the magnetic domains and generate a response signal. Response coils may be saddle or loop coils, or printed coils on flexible substrates that are applied to conform to the pipe peripheral surface. The system operates reiteratively over an extended period of time to detect loss of magnetic domains which is an important indicator of corrosion and deterioration of the object. | 2013-07-25 |
20130187642 | METHODS OF CHARACTERIZING A COMPONENT OF A POLYCRYSTALLINE DIAMOND COMPACT BY AT LEAST ONE MAGNETIC MEASUREMENT - In an embodiment, a method of characterizing a polycrystalline diamond compact is disclosed. The method includes providing the polycrystalline diamond compact, and measuring at least one magnetic characteristic of a component of the polycrystalline diamond compact. | 2013-07-25 |
20130187643 | TESTING DEVICE AND TESTING METHOD FOR NON DESTRUCTIVE DETECTION OF A DEFECT IN A TEST PIECE BY MEANS OF AN EDDY CURRENT - A test set-up ( | 2013-07-25 |
20130187644 | HALL-EFFECT SENSOR ISOLATOR - A coupler is disclosed that employs hall-effect sensing technology. Specifically, the coupler is configured to produce an output voltage by converting the magnetic field generated by a current conductor at an input side. The output and input sides may be electrically isolated from one another but may be coupled via the hall-effect sensing technology, such as a hall-effect sensor. | 2013-07-25 |
20130187645 | MAGNETORESISTOR INTEGRATED SENSOR FOR MEASURING VOLTAGE OR CURRENT, AND DIAGNOSTIC SYSTEM - The invention relates to an integrated sensor, including terminals ( | 2013-07-25 |
20130187646 | ELECTRONIC MODULE ASSEMBLY FOR INFLATABLE PERSONAL RESTRAINT SYSTEMS AND ASSOCIATED METHODS - Electronics module assemblies (“EMAs”) for inflatable personal restraints and associated systems are described herein. An EMA configured in accordance with an embodiment of the present technology can include, for example, a housing having a body portion, cover portion that attaches to the body portion to form an enclosure, and protrusion extending outwardly from the cover portion. The protrusion can have an outer boundary at which the protrusion projects away from the cover portion. The EMA can further include a crash sensor within the enclosure in an area defined by the outer boundary of the protrusion. The protrusion can form an envelope of space around the crash sensor that defines a minimum distance an external object with a magnetic field can come to the crash sensor without activating it. The EMA can optionally include a magnetic field configured to disable the crash sensor upon the detection of an external magnetic field. | 2013-07-25 |
20130187647 | NMR LOGGING APPARATUS - Technologies including NMR logging apparatus and methods are disclosed. Example NMR logging apparatus may include surface instrumentation and one or more downhole probes configured to fit within an earth borehole. The surface instrumentation may comprise a power amplifier, which may be coupled to the downhole probes via one or more transmission lines, and a controller configured to cause the power amplifier to generate a NMR activating pulse or sequence of pulses. Impedance matching means may be configured to match an output impedance of the power amplifier through a transmission line to a load impedance of a downhole probe. Methods may include deploying the various elements of disclosed NMR logging apparatus and using the apparatus to perform NMR measurements. | 2013-07-25 |
20130187648 | ESTIMATING AND DISPLAYING MOLECULAR SIZE INFORMATION OF A SUBSTANCE - Estimating and displaying information about the size of molecules within a substance from nuclear magnetic resonance (NMR) maps and/or logs. Methods include utilizing a relationship between the molecular size (e.g., mean chain length), and either a moment of diffusion or a relaxation distribution, to create a scale on a two-dimensional map. In one case, applying the relationship between the molecular size, and either a moment of diffusion or a relaxation distribution, to one-dimensional diffusion or relaxation distributions for the purpose of estimating the mean chain length of molecules within the substance. In another case, a method includes determining mean chain lengths of molecules within a substance and providing a one-dimensional NMR log showing the mean chain lengths at a plurality of depths. In some cases, the NMR log includes actuatable regions for examining two-dimensional NMR maps or chain length distributions of the substance corresponding with distinct depths of the substance. | 2013-07-25 |
20130187649 | System for Motion Corrected MR Diffusion Imaging - A system determines motion correction data for use in diffusion MR imaging using an RF signal generator and magnetic field gradient generator which sequentially acquire in a single first direction through a volume, first and second slice sets individually comprising multiple individual diffusion image slices. The first set of slices and the second set of slices are spatially interleaved within the volume, by providing in acquiring the second slice set, a low flip angle RF pulse successively followed by a non-diffusion image data readout magnetic field gradient for acquisition of data representing a two dimensional (2D) non-diffusion image used for motion detection of the first slice set successively followed by, a first diffusion imaging RF pulse followed by a first diffusion imaging phase encoding magnetic field gradient for preparation for acquiring data representing a diffusion image slice of the second slice set. | 2013-07-25 |
20130187650 | DYNAMIC B0 FIELD DETECTION BY MAGNETIC RESONANCE NAVIGATORS, AND CORRECTION FOR MULTICHANNEL RECEPTION AND/OR TRANSMISSION RF COIL CONFIGURATIONS - In a method for calculating a B | 2013-07-25 |
20130187651 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - In one embodiment, an MRI apparatus ( | 2013-07-25 |
20130187652 | Method for Motion Correction in Magnetic Resonance Imaging Using Radio Frequency Coil Arrays - A method for motion correction using coil arrays, termed “MOCCA,” is provided, in which coil-dependent motion-related signal variations are employed to determine information related to motion in two and three directions. With such a method, navigator echoes are not required, nor is the acquisition of additional data required to resolve complex motions in more than one direction. The motion estimation and compensation method provided by MOCCA is also applicable to applications of cardiac, respiratory, and other physiological self-gating techniques. | 2013-07-25 |
20130187653 | ACTIVATION OF FIELD COILS OF A MAGNETIC RESONANCE SYSTEM HAVING EDDY CURRENT COMPENSATION - A controller of a magnetic resonance system determines an activation signal vector based on a target field predetermined for the controller in conjunction with field characteristics of field coils known to the controller. The activation signal vector includes a respective activation signal for each field coil. The controller determines the activation signal vector such that within a predetermined examination volume of the magnetic resonance system, any deviation of an ideal field that would result if ideal coils were subjected to the activation signals of the activation signal vector from the target field is minimized. The controller determines a compensation signal vector based on the activation signal vector in conjunction with eddy current characteristics of the field coils known to the controller. The compensation signal vector is used to minimize a deviation of an actual field from the target field within the predetermined examination volume of the magnetic resonance system. | 2013-07-25 |
20130187654 | Metal detector for use with conductive media - A pulse-induction type metal detector using a transmitter coil energizing pulse that selectively reduces the amplitude of background signals from conductive soils, ores and salt water. The detector can be operated with higher amplification of the received signals than conventional detectors, without driving the input amplifier into saturation. This makes it possible to detect land mines, tramp metal and gold in media whose characteristics make detection with conventional metal detectors difficult. | 2013-07-25 |
20130187655 | System and Method for In-Sea Electrode Conditioning - Disclosed are methods and systems for conditioning electrodes while deployed in the sea with a marine electromagnetic survey system. An embodiment of the method may comprise deploying electrodes in seawater during a marine electromagnetic survey. The method further may comprise coupling at least one of the electrodes to a controllable current/voltage source while the electrodes are deployed in the seawater. The method further may comprise sending a first conditioning signal from the controllable current/voltage source to the at least one of the electrodes coupled to the controllable current/voltage source. | 2013-07-25 |
20130187656 | Methods for Monitoring Functionality of a Switch and Driver Units for Switches - A gate driver unit includes an input stage, an output stage, a read/write interface, and a monitoring stage. The input stage is configured to receive control signals and forward the control signals to the output stage and the monitoring stage. The read/write interface is configured to receive configuration data and forward the configuration data to the monitoring stage. The monitoring stage is configured to capture and evaluate signals of a power switch connected to the gate driver unit and synchronize the evaluation of the signals of the power switch to the control signals. The evaluation of the signals and the synchronization of the evaluation are based on the configuration data. | 2013-07-25 |
20130187657 | DISCHARGE CURVE CALIBRATION SYSTEM AND CALIBRATION METHOD FOR INITIAL DISCHARGING CURVE OF BATTERY - An embodiment of the invention provides a calibration method for an initial discharging curve of a battery. The method includes: acquiring an initial discharging curve of a battery; measuring a first open circuit voltage at a first time point and a second open circuit voltage at a second time point; according to the initial discharging curve, acquiring a first discharge capacity corresponding to the first open circuit voltage and a second discharge capacity corresponding to the second open circuit voltage according to the initial discharging curve; calculating an ideal discharge capacity according to the first discharge capacity and the second discharge capacity; measuring an real discharge capacity between the first time point and the second time point; determining a total discharge capacity difference according to the ideal discharge capacity and the real discharge capacity to calibrate the initial discharging curve to generate a current discharging curve. | 2013-07-25 |
20130187658 | Testing Methods And Pass/Fail Criteria For Electric Joints - In one embodiment, a method of evaluating a battery module includes: applying a tension load to a test coupon, the test coupon including a segment of a battery terminal connected to a segment of an interconnector busbar; and measuring electrical resistance across the segments of the test coupon. In certain instances, the method further includes applying a different, second tension load to the segments of the test coupon and repeating the measuring of electrical resistance. In certain other instances, the method further includes forming a plot between various values of electrical resistance as a function of various tension loads. | 2013-07-25 |
20130187659 | BATTERY SYSTEM FOR VEHICLE, ON-VEHICLE BATTERY MODULE, AND CELL CONTROLLER - A battery system for vehicle comprises a battery unit that is constituted with a plurality of serially connected cell groups each include a plurality of serially connected battery cells, integrated circuits that are each disposed in correspondence to one of the cell groups of the battery unit and each measure terminal voltages at the battery cells in the corresponding cell group, and a signal transmission path through which one of the integrated circuits is connected to another one of the integrated circuits or to a circuit other than that of the integrated circuits. | 2013-07-25 |
20130187660 | VOLTAGE MEASURING APPARATUS FOR PLURAL BATTERY - In a voltage measuring apparatus for a plural battery according to the present invention, each of voltage detecting ICs ( | 2013-07-25 |
20130187661 | Test System for Plug-in Connectors, Aircraft or Spacecraft and Method - A test system for plug-in connectors, especially for plug-in connectors in an airplane. A transmitting device which is designed for sending out a test signal to the plug-in connectors to be tested, and comprising at least one receiving device for each plug-in connector to be tested which is electrically coupled with the respective plug-in connector and which is designed for receiving the transmitted test signal and outputting an acknowledgement signal in response to receiving the transmitted test signal. Furthermore, the present invention creates an aircraft or a spacecraft and a method. | 2013-07-25 |
20130187662 | DETERMINATION OF THE LOCATION OF AN ELECTRICAL DISTURBANCE - According to an embodiment of the present invention, an apparatus for determining the location of an electrical disturbance in a circuit is provided. The apparatus has at least one sensor configured to determine the relative phase of current and voltage waveforms across the circuit inductance of a portion of the circuit produced by a voltage or current perturbation, and a controller configured to identify the location of the electrical disturbance within the circuit from the relative phase of the current and voltage waveforms. | 2013-07-25 |
20130187663 | LOW-VOLTAGE TESTING DEVICE FOR HIGH-VOLTAGE FREQUENCY CONVERTER OF SERIAL SUPERPOSITION VOLTAGE TYPE - A low-voltage testing device for a high-voltage frequency converter of a serial superposition voltage type including a tap transformer, power portion, monitoring box, analog interface board, voltage detecting portion and remote control portion, in which the tap transformer is connected to the power portion, the power portion is connected to the voltage detecting portion, the monitoring box is connected to the power portion via an optical fiber and the analog interface board is connected to the monitoring box and the remote control portion respectively. | 2013-07-25 |
20130187664 | APPARATUS AND METHOD FOR DIAGNOSTICS OF A CAPACITIVE SENSOR - In at least one embodiment, an apparatus for diagnosing a state of a capacitive sensor is provided. The apparatus includes a control unit for being operably coupled to a decoupling device that exhibits a drift condition and to the capacitive sensor. The control unit being configured to determine an impedance of the capacitive sensor and to determine a characteristic of the capacitive sensor based on at least the impedance. The control unit being further configured to determine a characteristic of the decoupling device based on the characteristic of the capacitive sensor and to provide an estimated capacitance based on the characteristic of the decoupling device, the estimated capacitance being indicative of the state of the capacitive sensor. | 2013-07-25 |
20130187665 | DISAGGREGATION APPARATUS FOR IDENTIFYING AN APPLIANCE IN AN ELECTRICAL NETWORK - The invention relates to a disaggregation apparatus for identifying an appliance in an electrical network ( | 2013-07-25 |
20130187666 | VOLUMETRIC INDUCTION PHASE SHIFT DETECTION SYSTEM FOR DETERMINING TISSUE WATER CONTENT PROPERTIES - A method and apparatus of determining the condition of a bulk tissue sample, by: positioning a bulk tissue sample between a pair of induction coils (or antennae); passing a spectrum of alternating current (or voltage) through a first of the induction coils (or antennae); measuring spectrum of alternating current (or voltage) produced in the second of the induction coils (or antennae); and comparing the phase shift between the spectrum of alternating currents (or voltages) in the first and second induction coils (or antennae), thereby determining the condition of the bulk tissue sample. | 2013-07-25 |
20130187667 | Inspection Equipment and Inspection Method - Foreign metal inspection equipment is provided with: a conveying device for conveying a sample to be subjected to inspection; electrodes positioned so as to face the surface of the sample; a measurement device for measuring the capacitance between the electrodes and the sample being conveyed by the conveying device; and a processing unit that inspects for foreign metal mixed in the sample on the basis of the change in capacitance measured by the measurement device. | 2013-07-25 |
20130187668 | METHOD OF MEASURING A PHYSICAL PARAMETER AND ELECTRONIC INTERFACE CIRCUIT FOR A CAPACITIVE SENSOR FOR IMPLEMENTING THE SAME - The method is for measuring a physical parameter by an electronic circuit connected to a two differential capacitor sensor having two fixed electrodes and a common moving electrode. The electronic circuit supplies first and second digital measuring signals. Each measuring cycle consists on biasing the electrodes by the measuring voltage based on the first digital signal, connecting the fixed electrodes to a supply voltage source for a first biasing, biasing the electrodes by the measuring voltage based on the second digital measuring signal, and inversely connecting the fixed electrodes to a supply voltage source for a second biasing. In first successive measuring cycles, the first and second digital signals are adapted to each cycle by a large step value. In second successive measuring cycles, the first and second digital signals are adapted to each cycle by a small step value until the end of the conversion. | 2013-07-25 |
20130187669 | Calibration of Micro-Mirror Arrays - A built-in self-calibration system and method for a micro-mirror array device, for example, operating as a variable focal length lens is described. The calibration method comprises determining a capacitance value for each micro-mirror element in the array device at a number of predetermined reference angles to provide a capacitance-reference angle relationship. From the capacitance values, an interpolation step is carried to determine intermediate tilt angles for each micro-mirror element in the array. A voltage sweep is applied to the micro-mirror array and capacitance values, for each micro-mirror element in the array, are measured. For a capacitance value that matches one of the values in the capacitance-reference angle relationship, the corresponding voltage is linked to the associated tilt angle to provide a voltage-tilt angle characteristic which then stored in a memory for subsequent use. | 2013-07-25 |
20130187670 | CAPACITIVE SENSORS AND METHODS OF FABRICATION - Apparatus and methods related to capacitive sensors are provided. Metal walls are formed in an interdigitated pattern. A dielectric material corresponding to a selected analyte is deposited in contact with the metal walls thus defining a capacitive sensor. Exposure to the analyte causes the electrical capacitance to vary in accordance with intensity. Analyte detection or measurement, data acquisition, or other operations can be performed by way of the capacitive sensors of the present teachings. | 2013-07-25 |
20130187671 | Non-Destructive Evaluation Methods For Electric Joints - In one embodiment, a method of evaluating electric joints includes: partially separating a terminal portion from a busbar portion of a joint formed between a battery cell terminal and an interconnector busbar; and measuring electric resistance between the terminal portion and the busbar portion. In another embodiment, the step of measuring includes connecting the terminal portion of the joint to a first clip of a first polarity and connecting the busbar portion of the joint to a second clip of an opposing polarity. | 2013-07-25 |
20130187672 | Electrical Resonance Detection of Particles and Analytes in Microfluidic Channels - A conductivity counter and method of determining conductivity of a fluid sample are disclosed. The counter is suitable for high-speed, accurate counting of discrete events or items, such as cancer cells, passing through a fluid sample cell. A variable frequency current source is used to supply an excitation current to a sample cell connected in parallel with an inductance or the electrical equivalence of an inductance. This configuration can be accurately modeled as a parallel RLC circuit when the system is operated at a stable frequency. The current source frequency is tuned to the resonance frequency of the equivalent RLC circuit, which effectively eliminates the capacitive and inductive components of the impedance, leaving only purely resistive components. The output signal is due to perturbations in the fluid sample, such as passing cancer cells. | 2013-07-25 |
20130187673 | LOW-CONDUCTIVITY CONTACTING-TYPE CONDUCTIVITY MEASUREMENT - A method of measuring low conductivity of a liquid sample using a contacting-type conductivity sensor is provided. The method includes applying a first excitation current to a contacting-type conductivity sensor at a first drive frequency. A first voltage response to the first excitation current is determined. A second excitation current is applied to the contacting-type conductivity sensor at a second drive frequency higher than the first drive frequency. A second voltage response to the second excitation current is determined. A conductivity output is provided based, at least in part, on the first and second voltage responses. A system for measuring conductivity of a liquid at or below 100 μS/cm is also provided. | 2013-07-25 |
20130187674 | TEST STATION FOR WIRELESS DEVICES AND METHODS FOR CALIBRATION THEREOF - A test station for wireless devices and methods for calibration thereof. The test station includes a signal generator, a calibrator, a scanner having receiving and transmitting antennas, a signal analyzer, and a computer. Under the direction of the computer, the signal generator generates a calibration signal in accordance with a programmable calibration signal script. The calibrator may be used to emulate either a wireless device in transmit mode by transmitting the calibration signal to the scanner for analysis by the signal analyzer, or a wireless device in receive mode by receiving the calibration signal from the scanner for analysis by the signal analyzer. The behavior of the test station is calibrated by correlating signal parameters of the calibration signal as specified by the calibration signal script and as measured at the signal analyzer. | 2013-07-25 |
20130187675 | MAINTAINING A WAFER/WAFER TRANSLATOR PAIR IN AN ATTACHED STATE FREE OF A GASKET DIPOSED - A wafer translator and a wafer, removably attached to each other, provides the electrical connection to electrical contacts on integrated circuits on a wafer in such a manner that the electrical contacts are substantially undamaged in the process of making such electrical connections. Various embodiments of the present invention provide a gasketless sealing means for facilitating the formation by vacuum attachment of the wafer/wafer translator pair. In this way, no gasket is required to be disposed between the wafer and the wafer translator. Air, or gas, is evacuated from between the wafer and wafer translator through one or more evacuation pathways in the gasketless sealing means. | 2013-07-25 |
20130187676 | INSPECTION APPARATUS - An inspection apparatus includes a probe card having a plurality of probes arranged to correspond to each chip of a semiconductor wafer under inspection and contacting a plurality of electrodes of each chip and a test head electrically connected to the respective probes of the probe card and applying test signals from a tester, and a plurality of tester lands of a probe substrate electrically connected respectively to the plurality of probes. A plurality of electrical connecting portions on the tester side of the test head, corresponding to the respective tester lands, are arranged to constitute a plurality of arrangement areas sectioned to correspond to the respective chips under inspection, and the plurality of probes of the probe substrate are connected to the corresponding tester lands provided in the arrangement areas in units of chips under inspection. | 2013-07-25 |
20130187677 | SYSTEM AND METHOD FOR CALIBRATING CHIPS IN A 3D CHIP STACK ARCHITECTURE - A system and method is disclosed for adaptively adjusting a driving strength of a signal between a first and second chip in a 3D architecture/stack. This may be used to adaptively calibrate a chip in a 3D architecture/stack. The system may include a transmission circuit on one chip and a receiver circuit on another chip. Alternatively, the system may include a transmission and receiver circuit on just one chip. | 2013-07-25 |
20130187678 | METHOD OF DETECTING A FAULT IN A PERMANENT-MAGNET ALTERNATOR AND POWER SUPPLY DEVICE COMPRISING A DETECTOR MODULE - A method of detecting a failure of an alternator supplying three-phase electricity to a load, the method comprising the steps of determining a duty ratio for each of the phases at the output of the alternator, determining phase differences between the phases at the output of the alternator; and determining the presence of a failure as a function of the phase differences and as a function of a comparison of the duty ratios. A power supply device is also provided for implementing the method. | 2013-07-25 |
20130187679 | ENHANCED PERFORMANCE MEMORY SYSTEMS AND METHODS - Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units. | 2013-07-25 |
20130187680 | Complementary Logic Device Comprising Metal-to-Insulator Transition Material - A complementary logic technology is disclosed whereby a logic gate comprises at least two metal-to-insulator transition (MIT) elements and at least two thermoelectric elements, each MIT element being thermally coupled to a corresponding thermoelectric element. In logic gates, each electric signal at an input terminal of a logic gate is first converted into two complementary thermal signals, and these thermal signals in turn determine the status of the output terminal of the logic gate, thereby generating an electrical output signal inverse to the electrical input signal or an output signal which is a Boolean operation on input signals. The parallel connection(s) of thermoelectric elements of the logic gate is used to create corresponding thermal signals for each electrical input signal. The MIT elements of the logic gate are then arranged to, in response to the associated thermal signals, execute a Boolean operation. | 2013-07-25 |
20130187681 | ANALOG SIGNAL SOFT SWITCHING CONTROL WITH PRECISE CURRENT STEERING GENERATOR - A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers. | 2013-07-25 |
20130187682 | SUB-NYQUIST SAMPLING OF SHORT PULSES - A method for signal processing includes accepting an analog signal, which consists of a sequence of pulses ( | 2013-07-25 |
20130187683 | LINEARIZING FIELD EFFECT TRANSISTORS IN THE OHMIC REGION - Apparatus and methods are disclosed related to using one or more field effect transistors as a resistor. One such apparatus can include a field effect transistor (FET), averaging resistors and a bidirectional current source. The averaging resistors can apply an average of a voltage at the source of the FET and a voltage at the drain of the FET to the gate of the field effect transistor. The bidirectional current source can turn the FET on and off. The FET can operate in the ohmic region when on. Such an apparatus can improve the linearity of the FET as a resistor, for example, at lower frequencies near or at direct current (DC). In some implementations, the apparatus can include one or more current sources to remove an offset introduced by the bidirectional current source at the source and/or the drain of the FET. | 2013-07-25 |
20130187684 | FAST GATE DRIVER FOR SILICON CARBIDE JUNCTION FIELD-EFFECT (JFET) SWITCHING DEVICES - Devices and techniques are described for selectively driving an electronically controllable switching device between on and off states. A first signal driver provides a respective output selectively switchable between “on” and “off” states responsive to an input signal. A second signal driver likewise provides a respective output selectively switchable between “on” and “off” states responsive to the input signal. Each of the respective outputs is switchable to an overriding isolated state responsive to an enable signal. The outputs are combined at a driving node, such that only one of the outputs drives the node at any given time. Additionally, one of the outputs is coupled to the output node through a current limiting resistor. Accordingly for each switching cycle, the switching device can be pre-charged by a high-current output, then held on for a predetermined period by a controlled-current output, and held off during other periods. | 2013-07-25 |
20130187685 | DITHER CONTROL CIRCUIT AND DEVICES HAVING THE SAME - A dither control circuit includes a pseudo random number generator, which generates a pseudo random number sequence in response to a frequency-divided clock signal, and a dither circuit which dithers an input digital code by using at least one output bit of the pseudo random number sequence and outputs a dithered digital code corresponding to a result of the dithering. The dither circuit may output, as the dithered digital code, a digital code corresponding to a sum of or a difference between the input digital code and the input digital code based on the at least one output bit. The dithered digital code may be input to an accumulator which operates in-sync with the frequency-divided clock signal. | 2013-07-25 |
20130187686 | FLIP-FLOP CIRCUIT, FREQUENCY DIVIDER AND FREQUENCY DIVIDING METHOD - In response to a first level of the clock signal, an inverting output of a flip-flop circuit is connected, via a non-inverting input thereof, to a first intermediate node of the flip-flop circuit and a non-inverting output of the flip-flop circuit is connected, via an inverting input thereof, to a second intermediate node of the flip-flop circuit. In response to a second level of the clock signal, the first intermediate node is connected, via a third intermediate node of the flip-flop circuit, to the non-inverting output and the second intermediate node is connected, via a fourth intermediate node of the flip-flop circuit, to the inverting output. A first cross-coupled gates arrangement of the flip-flop circuit is coupled between the first and second intermediate nodes. A second cross-coupled gates arrangement of the flip-flop circuit is coupled between the third and fourth intermediate nodes. | 2013-07-25 |
20130187687 | POWER-ON RESET CIRCUIT AND METHOD OF USE - The disclosed power-on reset circuit provides an indication of when and whether a supply voltage Vdd has reached a trigger voltage level Vtrig. The disclosed circuit includes a flip-flop circuit and a first comparator circuit. The circuit according to the invention has a D input node of the flip-flop circuit coupled to the supply voltage. The first comparator circuit outputs a clock signal, where the flip-flop circuit is clocked by the clock signal. A Q output node of the flip-flop circuit provides the power-on reset signal, where the power-on reset signal is in a LO state when the supply voltage is at a voltage level that is less than the trigger voltage level Vtrig. The power-on reset signal is in a HI state when the supply voltage is at a voltage level that is greater than the trigger voltage level Vtrig. | 2013-07-25 |
20130187688 | POLAR TRANSMITTER HAVING FREQUENCY MODULATING PATH WITH INTERPOLATION IN COMPENSATING FEED INPUT AND RELATED METHOD THEREOF - A frequency modulating path for generating a frequency modulated clock includes a direct feed input arranged for directly modulating frequency of an oscillator, and a compensating feed input arranged for compensating effects of frequency modulating on a phase error; wherein the compensating feed input is resampled by a down-divided clock that is an integer edge division of the oscillator. A reference phase generator for generating a reference phase output includes a resampling circuit, an accumulator and a sampler. The resampling circuit is for resampling a modulating frequency command word (FCW) input to produce a plurality of samples. The accumulator is for accumulating the samples to generate an accumulated result. The sampler is for sampling the accumulated result according to a frequency reference clock, and accordingly generating a sampled result, wherein the reference phase output is updated according to at least the sampled result. | 2013-07-25 |
20130187689 | PHASE-LOCKED LOOP WITH TWO NEGATIVE FEEDBACK LOOPS - A phase-locked loop with two negative feedback loops including: a phase frequency detector which includes phase difference between the input clock and the feedback clock in a frequency-phase-locked loop and outputting up or down signals based on the phase difference; a charge pump outputting the current proportional to the up and down signals outputted from the phase frequency detector; a loop filter outputting the voltage by filtering the current outputted from the charge pump; a voltage controlled oscillator outputting the frequency based on the voltage outputted from the loop filter; a divider dividing the frequency outputted from the voltage controlled oscillator and feedbacking to the phase frequency detector; a frequency-voltage converter generating the voltage corresponding to the frequency outputted from the voltage controlled oscillator, and suppressing noise of the voltage controlled oscillator by feedbacking the generated voltage to the voltage controlled oscillator. | 2013-07-25 |
20130187690 | CAPACITIVE MULTIPLICATION IN A PHASE LOCKED LOOP - A frequency synthesizer circuit is disclosed. The frequency synthesizer circuit includes a phase and frequency detector. The frequency synthesizer circuit also includes a first charge pump and a second charge pump, each coupled to the phase and frequency detector. The frequency synthesizer circuit also includes a loop filter that includes a resistor and at least two capacitors. The second charge pump is coupled between the resistor and a capacitor that creates a zero in a transfer function of the loop filter. The frequency synthesizer circuit also includes a voltage controlled oscillator that produces an output frequency based on an output of the loop filter. | 2013-07-25 |
20130187691 | LOOP FILTER FOR CURRENT-CONTROLLED-OSCILLATOR-BASED PHASE LOCKED LOOP - A loop filter of a phase-locked loop (PLL) that uses a current-controlled oscillator (CCO) includes a capacitor, a voltage-to-current (V-to-I) converter, and a charge pump. The input node of the loop filter receives a first current from an external charge pump. The combination of the capacitor and the V-to-I converter generates a first component of the output current of the loop filter based on the first current. The charge pump of the loop filter generates a second component of the output current. The loop filter is implemented without the need for a zero-frequency-determining resistor, the resistor instead being realized by the product of the first current, the second component of the output current and the transconductance of the V-to-I converter. Phase noise reduction in the PLL, as well as implementation of the loop filter with a smaller area, are thus made possible. | 2013-07-25 |
20130187692 | TRANSITION TIME LOCK LOOP WITH REFERENCE ON REQUEST - Output driver feedback circuitry limits output slew rates across a wide range of output loads. A transition time lock loop architecture of the feedback circuitry compares a transition time pulse with a reference pulse to adjusts transition time of an output signal for various process-voltage-temperature (PVT) process corners, output voltage domains and output capacitances. Reference pulse generation circuitry provides a reference pulse in phase with the transition time pulse for each rise and fall of the output signal. | 2013-07-25 |
20130187693 | FULL-DIGITAL CLOCK CORRECTION CIRCUIT AND METHOD THEREOF - The present invention provides a full-digital clock duty cycle correction circuit and a method thereof. The circuit comprises a sampling unit, a duty cycle correcting module, and a phase-lock module. The duty cycle correcting module produces a first clock signal according to an input clock signal. The phase-lock module produces a second clock signal according to the first clock signal and is used for aligning the positive edges of the clock signals. The duty cycle correcting module adjusts the pulse width of the first clock signal according to the clock signals. In addition, after the pulse width is adjusted, the positive edges of the clock signals are re-aligned. When the pulse width is not equal to zero, the pulse width is re-adjusted and the positive edges are re-aligned until the pulse widths of the clock signals are identical. Finally, the second clock signal is outputted and thus producing a clock signal having 50% duty cycle. | 2013-07-25 |
20130187694 | DIGITAL RE-SAMPLING APPARATUS USING FRACTIONAL DELAY GENERATOR - Disclosed herein is a digital re-sampling apparatus. The digital re-sampling apparatus includes a sample buffer, a sample buffer control unit, a filter bank, a first delay bank, a fractional delay constant table, a combiner bank, and a second delay bank. The sample buffer temporarily stores an input sample in synchronization with an input sampling frequency. The sample buffer control unit controls writing and reading operations. The filter bank includes a number of digital filters equal to the number of stages, and filters the input sample. The first delay bank differentially delays a filter output value. The fractional delay constant table stores information about re-sampling time. The combiner bank includes a number of adders and multipliers, performs an operation, and outputs a re-sampled value. The second delay bank causes a delay so that output of each combiner can be synchronized with each output of the fractional delay constant table. | 2013-07-25 |
20130187695 | CIRCUIT CONFIGURATION AND METHOD FOR LIMITING CURRENT INTENSITY AND/OR EDGE SLOPE OF ELECTRICAL SIGNALS - A circuit configuration for the limiting of current intensity and/or the edge slope of electrical signals includes: a voltage source; a switching element connected to the voltage source and equipped for switching the voltage source; and a limiting unit functionally positioned between the switching element and the voltage source, the limiting unit being equipped to limit a current intensity and/or an edge slope of an electrical signal in response to a switching process of the voltage source while using the switching element. | 2013-07-25 |
20130187696 | CIRCUIT FOR GENERATING MULTI-PHASE NON-OVERLAPPING CLOCK SIGNALS - A circuit for generating multi-phase, non-overlapping clock signals includes a shift register that generates first and second clock signals from an input clock signal. First and second circuit modules generate corresponding first and second interim signals using the first and second clock signals and first and second feedback signals, respectively. The first and second interim signals are non-overlapping by at least a predetermined minimum time difference. The first and second interim signals are multiplexed to generate an output signal. The output signal is delayed by a first predetermined time to generate a first delay signal. The first delay signal is delayed by a second predetermined time to generate a second delay signal. The second delay signal is de-multiplexed to generate the first and the second feedback signals, and the first delay signal is de-multiplexed to generate the set of multi-phase, non-overlapping clock signals. | 2013-07-25 |
20130187697 | MULTI-LEVEL HIGH VOLTAGE PULSER INTEGRATED CIRCUIT USING LOW VOLTAGE MOSFETS - A multi-level high-voltage pulse generator integrated circuit has a digital logic-level control interface circuit. A pair of complementary MOSFETs is controlled by the digital control interface circuit. A pair of supply voltage rails is provided, wherein one of the pair of supply voltage rails is connected to each of the pair of complementary MOSFETs. A pair of Zener diodes is provided, wherein one of the pair of Zener diodes is connected to each of the pair of complementary MOSFETs. A pair of resistors is provided, wherein one of the pair of resistors is connected in parallel with each of the pair of Zener diodes. A pair of complementary voltage blocking-MOSFETs having predetermined gate bias voltages is provided, wherein each of the pair complementary voltage blocking-MOSFETs is attached to a corresponding one pair of complementary MOSFETs. | 2013-07-25 |
20130187698 | HIGH FREQUENCY SWITCHING CIRCUIT AND METHOD OF CONTROLLING THE SAME - There is provided a high frequency switching circuit reducing power consumption at the time of signal reception and signal transmission. The high frequency switching circuit includes a pulse generation unit generating a clock selecting pulse signal having a predetermined active period; a clock selection unit selecting a reference clock signal when the clock selecting pulse signal is in an active state and selecting a low-speed clock signal having a frequency lower than that of the reference clock signal when the clock selecting pulse signal is not in an active state; a voltage down unit accumulating negative charges in a capacitor to generate predetermined negative voltage; and a switching unit including at least one switch holding a turned-off state by being applied with the predetermined negative voltage. | 2013-07-25 |
20130187699 | TECHNIQUES FOR SWITCHING BETWEEN AC-COUPLED CONNECTIVITY AND DC-COUPLED CONNECTIVITY - A circuit for switching between an AC-coupled connectivity and DC-coupled connectivity of a multimedia interface. The circuit comprises a current source connected in series to a wire of the multimedia interface and a coupling capacitor; and a termination resistor connected to the current source and to the coupling capacitor, wherein the circuit is connected in series between a source line driver and a sink line receiver of the multimedia interface, wherein the source line driver supports both the AC-coupled connectivity and the DC-coupled connectivity and the sink line receiver supports any one of the AC-coupled connectivity and the DC-coupled connectivity, wherein the current source and the termination resistor allows the setting of voltage levels of signals received at the sink line receiver to voltage levels defined by the multimedia interface thereby to switch to the coupling connectivity type required by the multimedia interface at which the sink line receiver operates. | 2013-07-25 |
20130187700 | ENERGY REUSE CIRCUIT - The present invention provides an energy reuse circuit. The energy reuse circuit is connected among a plurality of converters at a releasing side or an absorbing side, and includes an energy absorbing portion, an energy releasing portion and an energy exchange portion, wherein the energy exchange portion is connected to the energy absorbing portion and the energy releasing portion, so as to make the energy absorbing portion and the energy releasing portion exchange potential energy in sequence and thus complete energy reuse. | 2013-07-25 |
20130187701 | SEMICONDUCTOR DEVICE AND DRIVING METHOD OF THE SAME - In the case of reducing an effect of variations in current characteristics of transistors by inputting a signal current to a transistor in a pixel, a potential of a wiring is detected by using a precharge circuit. In the case where there is a difference between a predetermined potential and the potential of the wiring, a charge is supplied to the wiring to perform a precharge by charging rapidly. When the potential of the wiring reaches the predetermined potential, the supply of charge is stopped and a signal current only is supplied. Thus, a precharge is performed only in a period until the potential of the wiring reaches the predetermined potential, therefore, a precharge can be performed for an optimal period. | 2013-07-25 |
20130187702 | HIGH FREQUENCY SWITCH - There is provided a high frequency switch which is satisfactory in terms of both insertion loss characteristics and harmonic characteristics. The high frequency switch includes: a common port outputting a transmission signal to an antenna; a plurality of transmission ports each having the transmission signal input thereto; and a plurality of switching units each connected between the plurality of transmission ports and the common port to conduct or block the transmission signal from each of the transmission ports to the common port, wherein each of the switching units includes a plurality of series-connected MOSFETs formed on a silicon substrate, the plurality of MOSFETs are any one of body contact-type FETs and floating body-type FETs, and each of the switching units includes both of the body contact-type FETs and the floating body-type FETs. | 2013-07-25 |
20130187703 | SYMMETRICALLY OPERATING SINGLE-ENDED INPUT BUFFER DEVICES AND METHODS - Embodiments are described including those pertaining to an input buffer having first and second complementary input terminals. One example buffer has a symmetrical response to a single input signal applied to the first input terminal by mimicking the transition of a signal applied to the second input terminal in the opposite direction. The buffer includes two amplifier circuits structured to be complementary with respect to each other. Each of the amplifier circuits includes a first transistor having a first input node that receives an input signal transitioning across a range of high and low voltage levels, and a second transistor having a second input node that receives a reference signal. The first input node is coupled to the second transistor through a capacitor to mimic the second input node transitioning in the direction opposite to the transition of the input signal. | 2013-07-25 |
20130187704 | LINEAR CAPACITIVELY COUPLED TOUCH SENSOR AND METHOD - A system includes a capacitively-coupled touch sensor having a conductive first layer and a conductive second layer on a first insulative layer. The width of the second layer varies along an axis of the first layer. A first excitation signal is applied to one of the first and second layers and is capacitively coupled through a touch element to the other layer, producing a first signal that produces a second signal which is digitized. Digitized peak values of the second signal are processed to compute a value for a touch element location. A conductive third layer can be placed on the opposite side of the first layer has width varying oppositely to the second layer. The first excitation signal is applied to the second layer and a non-overlapping second excitation signal is applied to the third layer. The resulting digitized peak values are processed to cancel errors due to variations. | 2013-07-25 |
20130187705 | ELECTRODE DEVICE, CIRCUIT ARRANGEMENT AND METHOD FOR THE APPROACH AND TOUCH DETECTION - An electrode device for a capacitive sensor device and a circuit arrangement for a capacitive sensor device for the operation of an electrode device are provided, wherein the electrode device has a first electrode structure with at least one transmitting electrode and at least one receiving electrode, and a second electrode structure with at least one field sensing electrode, wherein the electrode device or the capacitive sensor device can be operated in a first operation mode and in a second operation mode. In addition a method is provided for approach and/or touch detection with a sensor device. | 2013-07-25 |
20130187706 | TAMPER RESISTANT ELECTRONIC SYSTEM UTILIZING ACCEPTABLE TAMPER THRESHOLD COUNT - A tamper resistant electronic device includes multiple eFuses that are individually blown in each instance the electronic device is tampered with. For example an eFuse is blown when the electronic device is subjected to a temperature that causes solder reflow. Since it is anticipated that the electronic device may be tampered with in an acceptable way and/or an acceptable number of instances, functionality of the electronic device is altered or disabled only after a threshold number of eFuses are blown. In certain implementations, the threshold number is the number of anticipated acceptable tamper events. Upon a tamper event an individual eFuse is blown. If the total number of blown eFuses is less than the threshold, a next eFuse is enabled so that it may be blown upon a next tamper event. | 2013-07-25 |
20130187707 | Charge Pump Systems and Methods - Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry. | 2013-07-25 |
20130187708 | Wide Input Bit-Rate, Power Efficient PWM Decoder - A pulse width modulated (PWM) signal is received and, over a time interval of the PWM signal, a first count is incremented when the PWM signal is at a first level, and a second count is incremented when the PWM signal is at a second level. At the end of time interval the first count is compared to the second count and, based on the comparison, a decoded bit is generated. Optionally, incrementing the first count is by enabling a first oscillator that increments a first counter, and incrementing the second count is by enabling a second oscillator that increments a second counter. | 2013-07-25 |
20130187709 | AMPLIFYING CIRCUITS AND CALIBRATION METHODS THEREFOR - An amplifying circuit is provided and includes a signal processor, an edge detector, and a calibration controller. The signal processor transforms amplitude information of a first and second input signals into time domain to provide first and second output signals respectively. The edge detector detects a polarity of a voltage offset from a timing relationship of the first and second output signals. The calibration controller compensates the voltage offset according to a change of the detected polarity. | 2013-07-25 |
20130187710 | AMPLIFIER CIRCUIT - According to one embodiment, an amplification circuit can be switched between amplifying and calibration modes. During calibration, a preamplifier amplifies a differential input signal and generates a differential output signal. The amplifier circuit includes an input switch unit which sets a differential input signal as the reference voltage signal of the same voltage level at the time of calibration, a PWM conversion unit which carries out Pulse-Width-Modulation of the differential output signal, and generates a differential PWM signal based on the result of comparing the differential output signal with the reference signal, a calibration unit which generates an offset adjustment signal according to the phase difference of differential PWM signals, and an electric amplifier which carries out electric power amplification of the differential PWM signal and generates the differential final output signal. | 2013-07-25 |
20130187711 | METHOD AND APPARATUS FOR RESOURCE BLOCK BASED TRANSMITTER OPTIMIZATION IN WIRELESS COMMUNICATION DEVICES | 2013-07-25 |
20130187712 | IMPEDANCE MATCHING CIRCUIT WITH TUNABLE NOTCH FILTERS FOR POWER AMPLIFIER - An impedance matching circuit with at least one tunable notch filter for a power amplifier is disclosed. The power amplifier amplifies an input radio frequency (RF) signal and provides an amplified RF signal. The impedance matching circuit performs output impedance matching for the power amplifier and includes at least one tunable notch filter. Each tunable notch filter has a notch that can be varied in frequency to provide better attenuation of an undesired signal. The at least one tunable notch filter attenuates at least one undesired signal in the amplified RF signal. The at least one tunable notch filter may include (i) a first tunable notch filter to attenuate a first undesired signal at a second harmonic of the amplified RF signal and/or (ii) a second tunable notch filter to attenuate a second undesired signal at a third harmonic of the amplified RF signal. | 2013-07-25 |
20130187713 | POWER AMPLIFIER CIRCUIT AND CONTROL METHOD - A power amplifier circuit uses an output transistor and a cascode transistor. First and second drive circuits apply gate control signals to the two transistors, which rise and fall in synchronism, and this is such that the voltage drop across the cascode transistor is reduced (compared to a constant gate voltage being applied to the output transistor). | 2013-07-25 |
20130187714 | HIGH CONVERSION GAIN HIGH SUPPRESSION BALANCED CASCODE FREQUENCY QUADRUPLER - A frequency quadrupler comprises a balanced topology which increases broadband odd harmonic suppression. The frequency quadrupler is constructed in a cascode configuration which is a two-stage amplifier composed of a transconductance amplifier followed by a current buffer. The cascode is constructed with common emitter (CE) and common base (CB) stages which further improves the multiplier frequency response. The cascode configuration enables a notch filter to be placed between the common emitter and common base stages to reduce 2 | 2013-07-25 |
20130187715 | AMPLIFIER - An amplifier includes a PWM converter that carries out pulse width modulation on differential input signals to generate differential PWM signals by comparing the differential input signals with sawtooth or triangular reference signal, and a power amplifier that carries out power amplification of the differential PWM signals to generate differential output signals. The power amplifier has a driver that drives a load with differential driving signals, a controller that sets a dead time in the differential driving signals to prevent current flow between power supply and ground terminals of the driver circuit, and a pre-delay compensator that generates the differential driving signals based on the differential PWM signals and sends the differential driving signals to the controller. The differential driving signals generated by the pre-delay compensator includes a pulse width for compensating for the dead time that is to be set in the differential driving signals by the controller. | 2013-07-25 |
20130187716 | PILOT SIGNAL GENERATION CIRCUIT - In various embodiments, a pilot signal generation circuit is provided having an operational amplifier buffer connected via a first resistor to receive a source reference voltage. A differential amplifier is connected at a first input to receive the source reference voltage and at a second input to an output of the operational amplifier buffer. A first shunt transistor is connected to shunt the source reference voltage at the operational amplifier buffer in response to pulse width modulated signal. A second shunt transistor is connected to the differential operational amplifier so as to shunt the source reference voltage in response to an output of the first shunt transistor. The output of the differential amplifier provides a pulse width modulated bipolar signal at precision voltage levels in response to the pulse width modulated signal. | 2013-07-25 |
20130187717 | RECEIVER EQUALIZATION CIRCUIT - A receiver equalization circuit includes a first output transistor having a gate coupled to an input signal. The receiver equalization circuit may also include a second output transistor having a drain coupled to a drain of the first output transistor. The receiver equalization circuit may also include a resistor coupled between a gate and a drain of the second output transistor to provide a direct current (DC) bias to the gate of the second output transistor. The receiver equalization circuit may further include a feed-through capacitor coupled between the gate of the second output transistor and an input signal source. The feed-through capacitor feeds the input signal to the gate of the second output transistor when a frequency of the input signal is above a predetermined threshold. The feed-through capacitor and the resistor define a signal gain amplification point. | 2013-07-25 |
20130187718 | AMPLIFIER CIRCUIT AND METHOD FOR IMPROVING THE DYNAMIC RANGE THEREOF - The invention provides an amplifier circuit. In one embodiment, the amplifier circuit includes a first class-AB amplifier and a second class-AB amplifier. The first class-AB amplifier amplifies an input signal to generate the first output signal. The second class-AB amplifier amplifies the first output signal to generate a final output signal on an output node. When the power of the input signal is greater than a threshold level, the second class-AB amplifier is in a turned-off state during a turned-on duration period of the first class-AB amplifier, and the first class-AB amplifier is in a turned-off state during a turned-on duration period of the second-class AB amplifier. | 2013-07-25 |
20130187719 | PLL SYSTEM AND METHOD FOR CONTROLLING A GAIN OF A VCO CIRCUIT - A phase locked loop system, comprises: a voltage controlled oscillator circuit, comprising a first plurality of switchable varactors for selecting a frequency band of the VCO, that has a gain that changes with frequency band, and a second plurality of switchable varactors for varying the gain in the selected band. The PLL system has a PLL feedback circuit comprising a switching device for switching the feedback circuit to an open loop state wherein a plurality of predefined tuning voltages can be applied to the VCO; a frequency measurement device for measuring the synthesized VCO frequency; and a control unit operable to determine the gain with respect to the synthesized frequency and the tuning voltages. | 2013-07-25 |
20130187720 | TEMPERATURE COMPENSATION TYPE OSCILLATOR - An oscillator includes a first crystal resonator, a second crystal resonator, a first amplifier circuit for oscillation, a second amplifier circuit for oscillation, a mixer circuit, a frequency selection circuit, and a first frequency conversion circuit. Assuming that resonance frequencies of the first and the second crystal resonators at a reference temperature are respectively F | 2013-07-25 |
20130187721 | OSCILLATION ELEMENT, OSCILLATOR, AND IMAGING APPARATUS USING THE SAME - An oscillation element includes an antenna for oscillation configured to oscillate electromagnetic waves, and multiple negative resistance elements electrically connected to the antenna in parallel, and the multiple negative resistance elements are disposed in only a place where the phases of electromagnetic waves oscillated therefrom are the common phase or opposite phase. | 2013-07-25 |
20130187722 | OSCILLATOR AUTO-TRIMMING METHOD AND SEMICONDUCTOR DEVICE USING THE METHOD - An oscillator auto-trimming method is provided. The oscillator auto-trimming method includes receiving, by a subtractor, a first count result and second count result to output a difference between the first count result and the second count result as an offset frequency, receiving, by a divider, the offset frequency to output a divided signal corresponding to a result of dividing the offset frequency by a reference offset frequency output from a micro control unit, and receiving, by the micro control unit, the divided signal and determine whether to change an oscillator frequency. | 2013-07-25 |
20130187723 | PIEZOELECTRIC MODULE - A piezoelectric module includes a piezoelectric package and a circuit component package. The piezoelectric module includes a thermoset resin with solder particles interposed between a whole circumference of the opening end surface of the second depressed portion including the plurality of connecting terminals of the circuit component package and the outer bottom surface of the first depressed portion of the piezoelectric package. The plurality of external terminals of the piezoelectric package and the plurality of connecting terminals of the circuit component package are electrically connected by metal bonding. The whole circumference of the opening end surface of the second depressed portion of the circuit component package and the outer bottom surface of the first depressed portion of the piezoelectric package are bonded by melting and hardening of the thermoset resin that constitutes the thermoset resin with solder particles. | 2013-07-25 |
20130187724 | Micromechanical resonator and method for manufacturing thereof - The invention relates to a temperature compensated micromechanical resonator and method of manufacturing thereof. The resonator comprises a resonator element comprising a semiconductor crystal structure, which is doped so as to reduce its temperature coefficient of frequency, transducer means for exciting to the resonator element a vibrational mode. According to the invention the crystal orientation and shape of the resonator element are chosen to allow for a shear mode having a saddle point to be excited to the resonator element, and said transducer means are adapted to excite said shear mode to the resonator element. Accurate micromechanical resonators with now temperature drift can be achieved by means of the invention. | 2013-07-25 |
20130187725 | ACOUSTIC WAVE DEVICE - An acoustic wave device is provided with a low-frequency side filter having a low-frequency side passband, a high-frequency side filter having a high-frequency side passband, and first and second balanced terminals. The low-frequency side filter is connected to a first unbalanced terminal. The low-frequency side passband is a frequency band from a first minimum frequency to a first maximum frequency. The high-frequency side filter is connected to a second unbalanced terminal. The high-frequency side passband is a frequency band from a second minimum frequency to a second maximum frequency. The low-frequency side filter includes a first longitudinally-coupled acoustic wave resonator and a first one-terminal pair acoustic wave resonator connected in series to the first longitudinally-coupled acoustic wave resonator. An antiresonant frequency of the first one-terminal pair acoustic wave resonator is set to be higher than the first maximum frequency and lower than the second minimum frequency. | 2013-07-25 |
20130187726 | TUNABLE VARIABLE IMPEDANCE TRANSMISSION LINE - A low profile antenna using a cavity-backed central radiating surface surrounded by one or more ground plane surfaces. Passively reconfigurable structure provide frequency dependent coupling between the surfaces. The frequency dependent couplings may be implemented using meander line structures, Variable Impedance Transmission Lines (VITLs), or tunable VITLs that used interspersed electroactive sections. | 2013-07-25 |
20130187727 | METHODS FOR TUNING AN ADAPTIVE IMPEDANCE MATCHING NETWORK WITH A LOOK-UP TABLE - Methods for generating a look-up table relating a plurality of complex reflection coefficients to a plurality of matched states for a tunable matching network. Typical steps include measuring a plurality of complex reflection coefficients resulting from a plurality of impedance loads while the tunable matching network is in a predetermined state, determining a plurality of matched states for the plurality of impedance loads, with a matched state determined for each of the plurality of impedance loads and providing the determined matched states as a look-up table. A further step is interpolating the measured complex reflection coefficients and the determined matching states into a set of complex reflection coefficients with predetermined step sizes. | 2013-07-25 |
20130187728 | HIGH FREQUENCY SWITCH - There is provided a high frequency switch having a reduced circuit scale while maintaining satisfactory harmonic characteristics in a transfer path of a high frequency signal. The high frequency switch includes: at least one transmission port; at least one reception port; a common port; transmission side series switches each including a body contact type FET; transmission side shunt switches each including a body contact type FET; reception side series switches each including a body contact type FET; and reception side shunt switches each including at least one floating body type FET. | 2013-07-25 |
20130187729 | SWITCHABLE FILTERS AND DESIGN STRUCTURES - Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a fixed electrode with a plurality of fingers on the piezoelectric substrate. The method further includes forming a moveable electrode with a plurality of fingers over the piezoelectric substrate. The method further includes forming actuators aligned with one or more of the plurality of fingers of the moveable electrode. | 2013-07-25 |
20130187730 | ACOUSTIC WAVE DEVICE AND FABRICATION METHOD OF THE SAME - An acoustic wave device includes: a substrate; an input terminal that is located on a first surface of the substrate, and to which a high-frequency signal is input; a resonator that is connected to the input terminal, and to which a high-frequency signal input to the input terminal is input; and an insulating layer that is located between the input terminal and the substrate, and has a permittivity smaller than that of the substrate. | 2013-07-25 |
20130187731 | MODULAR INTERFACE SYSTEMS AND METHODS - Interface systems and methods are provided. An interface system can include a first isolator ( | 2013-07-25 |
20130187732 | CIRCUIT BREAKER REMOTE TRIPPING - A circuit breaker module (which may also be termed an interrupter) including circuit breaker contacts which are opened and closed by an electrically-activated magnetic actuator and capable of interrupting fault currents. The magnetic actuator is stable in either a breaker-closed state or a breaker-open state without requiring electrical current flow through the magnetic actuator. An externally-connectable mechanical drive is linked to the magnetic actuator in a manner such that movement of the externally-connectable mechanical drive can destabilize the breaker-closed state to open the circuit breaker contacts. An external actuator activated by an external condition is connected to said externally-connectable mechanical drive so as to cause said circuit breaker contacts to open upon occurrence of the external condition. | 2013-07-25 |
20130187733 | SWITCHGEAR VISIBLE DISCONNECT MECHANICAL INTERLOCK - Electrical switchgear which combines, connected electrically in series, a visible disconnect switch (operated by a main switch actuator) and a circuit breaker module (which may also be termed an interrupter) including circuit breaker contacts which are opened and closed by an electrically-activated magnetic actuator and capable of interrupting fault currents. The magnetic actuator is stable in either a breaker-closed state or a breaker-open state without requiring electrical current flow through the magnetic actuator. An interlock is provided such that, as the main switch actuator begins to move from its switch-closed position to its switch-open position, the breaker-closed state is destabilized to open the circuit breaker contacts. An interlock is also provided such that the circuit breaker contacts cannot close while the visible disconnect switch is open. | 2013-07-25 |
20130187734 | MAGNETIC ACTUATOR FOR A CIRCUIT BREAKER ARRANGEMENT - An exemplary magnetic actuator for a circuit breaker arrangement includes a coil, a core with a groove for accommodating a section of the coil, and a movable plate configured to be attracted by the core. When a magnetic field is generated by the coil, the movable plate actuates the circuit breaker arrangement based on the attraction to the core. The magnetic actuator also includes a position locker for locking the coil in the groove. The position locker having a locking part protruding away from the core and over a section of the coil not accommodated in the groove. | 2013-07-25 |
20130187735 | ELECTRICAL SWITCH - An electrical switch, in particular an electrical circuit breaker, is disclosed including an overcurrent trip device which cuts off the flow of current through the switch in the event of an overcurrent situation. In at least one embodiment, a partial current of the current flowing through the electrical switch flows through a tripping arrangement of the overcurrent trip device and at least one further partial current of the current flowing through the electrical switch is conducted past the tripping arrangement. | 2013-07-25 |
20130187736 | ELECTROMAGNET AND ELECTROMAGNETIC COIL ASSEMBLY - An electromagnet may comprise a pole piece ( | 2013-07-25 |
20130187737 | Method For Making Magnetic Components With M-Phase Coupling, And Related Inductor Structures - An M phase coupled inductor includes a magnetic core including a first end magnetic element, a second end magnetic element, and M legs disposed between and connecting the first and second end magnetic elements. M is an integer greater than one. The coupled inductor further includes M windings, where each winding has a substantially rectangular cross section. Each one of the M windings is at least partially wound about a respective leg. | 2013-07-25 |