29th week of 2011 patent applcation highlights part 40 |
Patent application number | Title | Published |
20110177636 | MANUFACTURING PROCESS FOR SOLID STATE LIGHTING DEVICE ON A CONDUCTIVE SUBSTRATE - A method for fabricating a light emitting device includes forming a trench in a first surface on a first side of a substrate. The trench comprises a first sloped surface not parallel to the first surface, wherein the substrate has a second side opposite to the first side of the substrate. The method also includes forming light emission layers over the first trench surface and the first surface, wherein the light emission layer is configured to emit light and removing at least a portion of the substrate from the second side of the substrate to form a protrusion on the second side of the substrate to allow the light emission layer to emit light out of the protrusion on the second side of the substrate. | 2011-07-21 |
20110177637 | ENCAPSULATED ORGANIC ELECTRONIC DEVICES AND METHOD FOR MAKING SAME - Encapsulated organic electronic devices including organic light emitting diodes are made using an adhesive component as a mask while the device is being constructed. An adhesive-coated liner can be applied to the device substrate and openings created therein by removing portions of the liner and adhesive, or a patterned adhesive layer having openings therein can be formed on the device substrate, followed by deposition of the device layers and application of a sealing layer. | 2011-07-21 |
20110177638 | SEMICONDUCTOR LIGHT EMITTING DEVICE WITH CURVATURE CONTROL LAYER - A semiconductor structure is grown on a top surface of a growth substrate. The semiconductor structure comprises a III-nitride light emitting layer disposed between an n-type region and a p-type region. A curvature control layer is disposed in direct contact with the growth substrate. The growth substrate has a thermal expansion coefficient less than a thermal expansion coefficient of GaN and the curvature control layer has a thermal expansion coefficient greater than the thermal expansion coefficient of GaN. | 2011-07-21 |
20110177639 | METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor display panel includes gate wiring formed on an insulation substrate and including gate lines, and gate electrodes and gate pads connected to the gate lines; a gate insulation layer covering the gate wiring; a semiconductor pattern formed over the gate insulation layer; data wiring formed over the gate insulation layer or the semiconductor pattern and including source electrodes, drain electrodes, and data pads; a protection layer including a Nega-PR type of organic insulating layer formed all over the semiconductor pattern and the data wiring, wherein the thickness of the Nega-PR type of organic insulating layer in both the gate and data pad regions is smaller than in the other regions; and a pixel electrode connected to the drain electrode. When exposing the Nega-PR type of passivation layer in the pad region during a photolithography process, a photomask having a lattice pattern made of a metal such as Cr that has a line width of less than the resolution of a light exposer is used. Thus, the resulting post-etch height of the passivation layer can be selectively controlled so as to provide reduced effective thickness in the pad regions. | 2011-07-21 |
20110177640 | Method for manufacturing an organic light emitting diode display - A method for manufacturing an organic light emitting diode (OLED) display includes forming a first electrode having different thicknesses corresponding to a first pixel, a second pixel, and a third pixel, forming a first emission layer, a second emission layer, and a third emission layer respectively corresponding to the first pixel, the second pixel, and the third pixel, and forming a second electrode on the first emission layer, the second emission layer, and the third emission layer, wherein forming the first electrodes includes forming a first electrode material layer on the substrate, forming a photoresist pattern having different thicknesses corresponding to the first pixel, the second pixel, and the third pixel, respectively, and etching the first electrode material layer along with the photoresist pattern. | 2011-07-21 |
20110177641 | ELECTROLUMINESCENT DEVICES FOR LIGHTING APPLICATIONS - A method of fabricating an organic light emitting device is provided. A first electrode is provided, over which the rest of the device will be fabricated. A first organic layer is deposited over the first electrode via solution processing. The first organic layer includes:
| 2011-07-21 |
20110177642 | METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT-EMITTING ELEMENT - Provided is a method for manufacturing a semiconductor light-emitting element having a narrow wavelength distribution and comprising a substrate and a group III compound semiconductor layer formed thereon, the substrate being made of a material different from the compound semiconductor constituting the semiconductor layer. The method for manufacturing a semiconductor light-emitting element having a group III compound semiconductor layer is characterized by comprising a semiconductor layer-forming step wherein a group III compound semiconductor layer having a total thickness of not less than 8 μm is formed on a substrate ( | 2011-07-21 |
20110177643 | FABRICATION METHOD OF PACKAGE STRUCTURE HAVING MEMS ELEMENT - A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process. | 2011-07-21 |
20110177644 | PLASMA CVD APPARATUS, METHOD FOR MANUFACTURING SEMICONDUCTOR FILM, METHOD FOR MANUFACTURING THIN-FILM SOLAR CELL, AND METHOD FOR CLEANING PLASMA CVD APPARATUS - A plasma CVD apparatus includes: a film forming chamber; a holding member that holds a substrate to be processed that is set in the film forming chamber; a shower head that is set in the film forming chamber to face the holding member, and supplies raw material gas and generates a plasma of the raw material gas; a radical generation chamber that is set at an opposite side of the shower head relative to the holding member and generates radicals of process gas; and an openable and closable shutter that is provided between the shower head and the radical generation chamber. | 2011-07-21 |
20110177645 | ROLL-TO-ROLL EVAPORATION SYSTEM AND METHOD TO MANUFACTURE GROUP IBIIIAVIA PHOTOVOLTAICS - The present inventions provide method and apparatus that employ constituents vaporized from one or more constituent supply source or sources to form one or more films of a precursor layer formed on a surface of a continuous flexible workpiece. Of particular significance is the implementation of vapor deposition systems that operate upon a horizontally disposed portion of a continuous flexible workpiece and a vertically disposed portion of a continuous flexible workpiece, preferably in conjunction with a short free-span zone of the portion of a continuous flexible workpiece. | 2011-07-21 |
20110177646 | IMAGE SENSOR WITH IMPROVED COLOR CROSSTALK - An image sensor comprises a substrate of a first conductivity type. First and second pixels are arrayed over the substrate. A potential barrier is formed in a region of the substrate corresponding to the first pixel but not in a region of the substrate corresponding to the second pixel. The second pixel is responsive to a color having a wavelength longer than the color to which the first pixel is responsive. The potential barrier is doped with dopants by a high energy ion implantation dopants or by an ion implantation or diffusion during epitaxial growth of the P-type epitaxial layer. | 2011-07-21 |
20110177647 | METHOD AND APPARATUS FOR FORMING A PHOTODIODE - A method for forming a photodiode is provided. The method comprises: providing a region of semiconductor material having a first surface and a second surface; coupling a first conductive layer to the first surface of the semiconductor material; and coupling a second conductive surface to the second surface of the semiconductor material to form a photodiode, the second conductive surface comprising a metal surface having a two-dimensional periodic array of openings therethrough, wherein the photodiode is configured to be operated such that light is incident on the second conductive surface. A method for reducing the required thickness of a photodiode is also provided. | 2011-07-21 |
20110177648 | METHOD OF MANUFACTURING THIN FILM SOLAR CELLS HAVING A HIGH CONVERSION EFFICIENCY - A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a antireflection coating layer disposed on a first surface of a substrate, a barrier layer disposed on a second surface of the substrate, a first transparent conductive oxide layer disposed on the barrier layer, a conductive contact layer disposed on the first transparent conductive oxide layer, a first p-i-n junction formed on the conductive contact layer, and a second transparent conductive oxide layer formed on the first p-i-n junction. | 2011-07-21 |
20110177649 | PROCESS FOR THE DEPOSITION OF AN ANTI-REFLECTION FILM ON A SUBSTRATE - A method for the deposition of an anti-reflection film on a substrate is disclosed. A substrate including a plurality of solar cell structures is provided and placed in a vacuum chamber with a target including silicon. A flow of a nitrogen-containing reactive gas into the vacuum chamber is set to a first value while a voltage between the target and ground is switched off and then increased to a second value. A voltage is applied between the target and ground, whereby a film of silicon and nitrogen is deposited on the substrate in a flow of the nitrogen-containing reactive gas which is higher than the first value. | 2011-07-21 |
20110177650 | CMOS IMAGE SENSOR WITH SELF-ALIGNED PHOTODIODE IMPLANTS - An example method of forming a pinned photodiode includes applying a photoresist mask to a semiconductor layer at a location where a transfer gate will subsequently be formed. First dopant ions are then implanted at a first angle to form a first dopant region under an edge of the photoresist mask. Next, a photoresist mask is etched such that a thickness of the photoresist mask is reduced to form a trimmed photoresist mask. Second dopant ions are then implanted at a second angle to form a second dopant region, wherein the second dopant ions are shadowed by the trimmed photoresist mask to exclude the second dopant ions from a region partially above the first dopant region and adjacent to an edge of the trimmed photoresist mask. | 2011-07-21 |
20110177651 | METHOD FOR PRODUCING A METAL STRUCTURE ON A SURFACE OF A SEMICONDUCTOR SUBSTRATE - A method for producing a metal structure on a surface of a semiconductor substrate, including the following steps: A applying a metal layer, B applying a structuring layer and C removing the structuring layer. Either step B is carried out after step A, and step C after step B in a masking method, so that the structuring layer covers the metal layer at least partially and, after step B is carried out, the metal layer is removed from the regions not covered by the structuring layer, before step C is carried out or, in a lift-off method, step A is carried out after step B, and step C after step A, so that the structuring layer is covered essentially by the metal layer and, at least in the regions, in which the metal layer covers the structuring layer, the metal layer is detached when step C is carried out. It is essential that the structuring layer in step B is produced by a hot melt ink. | 2011-07-21 |
20110177652 | BIFACIAL SOLAR CELL USING ION IMPLANTATION - An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency. | 2011-07-21 |
20110177653 | THIAZOLE-BASED SEMICONDUCTOR COMPOUND AND ORGANIC THIN FILM TRANSISTOR USING THE SAME - Provided are an organic semiconductor compound using thiazole, and an organic thin film transistor having an organic semiconductor layer formed of the organic semiconductor compound using thiazole. The novel organic semiconductor compound including thiazole has liquid crystallinity and excellent thermal stability, and thus is provided to form an organic semiconductor layer in the organic thin film transistor. To this end, a silicon oxide layer is formed on a silicon substrate, and an organic semiconductor layer including thiazole is formed on the silicon oxide layer. In addition, source and drain electrodes are formed on both edge portions of the organic semiconductor layer. The organic thin film transistor using the organic semiconductor layer has an improved on/off ratio and excellent thermal stability. Also, a solution process can be applied in its manufacture. | 2011-07-21 |
20110177654 | Wafer-Level Semiconductor Device Packages with Three-Dimensional Fan-Out and Manufacturing Methods Thereof - In one embodiment, a method of forming a semiconductor device package includes: ( | 2011-07-21 |
20110177655 | Formation of Through Via before Contact Processing - The formation of through silicon vias (TSVs) in an integrated circuit (IC) die or wafer is described in which the TSV is formed in the integration process prior to contact or metallization processing. Contacts and bonding pads may then be fabricated after the TSVs are already in place, which allows the TSV to be more dense and allows more freedom in the overall TSV design. By providing a denser connection between TSVs and bonding pads, individual wafers and dies may be bonded directly at the bonding pads. The conductive bonding material, thus, maintains an electrical connection to the TSVs and other IC components through the bonding pads. | 2011-07-21 |
20110177656 | OPTIMIZED LID ATTACH PROCESS FOR THERMAL MANAGEMENT AND MULTI-SURFACE COMPLIANT HEAT REMOVAL - A multi-surface compliant heat removal process includes: identifying one or more components to share a heat rejecting device; applying non-adhesive film to the one or more components; identifying a primary component of the one or more components; and applying phase change material on each of the one or more components other than the primary component. The phase change material is placed on top of the non-adhesive film. The process further includes placing the heat rejecting device on the corresponding one or more components; and removing the heat rejecting device from the corresponding one or more components. The phase change material and the non-adhesive film remain with the heat rejecting device. The process also includes reflowing the phase change material on the heat rejecting device; removing the non-adhesive film from the heat rejecting device; placing a heatsink-attach thermal interface material on the one or more components; and placing the heat rejecting device on the corresponding one or more components. | 2011-07-21 |
20110177657 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor element; a die pad with the semiconductor element mounted thereon; a plurality of electrode terminals each having a connecting portion electrically connected with the semiconductor element; and a sealing resin for sealing the semiconductor element, the die pad and the electrode terminals so that a surface of each electrode terminal on an opposite side from a surface having the connecting portion is exposed as an external terminal surface. A recess having a planar shape of a circle is formed on the surface of each electrode terminal with the connecting portion, and the recess is arranged between an end portion of the electrode terminal exposed from an outer edge side face of the sealing resin and the connecting portion. While a function of the configuration for suppressing the peeling between the electrode terminal and the sealing resin can be maintained by mitigating an external force applied to the electrode terminal, the semiconductor device can be downsized. | 2011-07-21 |
20110177658 | Standard Cell Architecture and Methods with Variable Design Rules - Structures and methods for standard cell layouts having variable rules for spacing of layers to cell boundaries are disclosed. In one embodiment, a first standard cell layout is provided with a conductive layer having at least two portions spaced apart by a minimum spacing distance, the conductive layer having at least one portion spaced from a cell boundary by a first spacing distance of less than half of the minimum spacing distance; a second standard cell disposed adjacent the first standard cell with at least one second portion of the conductive layer in the second cell disposed adjacent the first portion in the first standard cell and spaced apart from a common cell boundary by a second spacing greater than half of the minimum; wherein the sum of the first and second spacings is at least as great as the minimum spacing. A method for forming standard is disclosed. | 2011-07-21 |
20110177659 | SOI BODY CONTACT USING E-DRAM TECHNOLOGY - A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top of the active semiconductor layer, and source and drain regions and a body/channel region disposed within the active semiconductor layer, an insulator layer having a first and second side, the first side being adjacent to the active semiconductor layer, a substrate disposed adjacent to the second side of the insulator layer, a body contact disposed under the body/channel region and in the insulator layer. The body contact electrically connects with and contacts with the body/channel region of the semiconductor device and the substrate, to thereby form an ohmic contact and to eliminate floating body effects. | 2011-07-21 |
20110177660 | DEEP TRENCH CAPACITOR FOR SOI CMOS DEVICES FOR SOFT ERROR IMMUNITY - A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top of the active semiconductor layer, and source and drain regions and a body/channel region disposed within the active semiconductor layer, an insulator layer having a first and second side, the first side being adjacent to the active semiconductor layer, a substrate disposed adjacent to the second side of the insulator layer, a deep trench capacitor disposed under the body/channel region of the semiconductor device. The deep trench capacitor electrically connects with and contacts the body/channel region of the semiconductor device, and is located adjacent to the gate of the semiconductor device. The semiconductor structure increases a critical charge Qcrit, thereby reducing a soft error rate (SER) of the semiconductor device. | 2011-07-21 |
20110177661 | METHODS OF MANUFACTURING NOR-TYPE NONVOLATILE MEMORY DEVICES INCLUDING IMPURITY EXPANSION REGIONS - Methods of manufacturing NOR-type flash memory device include forming a tunnel oxide layer on a substrate, forming a first conductive layer on the tunnel oxide layer, forming first mask patterns parallel to one another on the first conductive layer in a y direction of the substrate, and selectively removing the first conductive layer and the tunnel oxide layer using the first mask patterns as an etch mask. Thus, first conductive patterns and tunnel oxide patterns are formed, and first trenches are formed to expose the surface of the substrate between the first conductive patterns and the tunnel oxide patterns. A photoresist pattern is formed to open at least one of the first trenches, and impurity ions are implanted using the photoresist pattern as a first ion implantation mask to form an impurity region extending in a y direction of the substrate. The photoresist pattern is removed. The substrate is annealed to diffuse the impurity region, thereby forming an impurity expansion region further expanding in an x direction of the substrate. The substrate is selectively removed using the first mask patterns as an etch mask to form second trenches corresponding to the first trenches. Isolation layers are formed to define active regions in the second trenches. | 2011-07-21 |
20110177662 | Method of Forming Trench-Gate Field Effect Transistors - A method of forming a field effect transistor includes: forming a trench in a semiconductor region; forming a shield electrode in the trench; performing an angled sidewall implant of impurities of the first conductivity type to form a channel enhancement region adjacent the trench; forming a body region of a second conductivity type in the semiconductor region; and forming a source region of the first conductivity type in the body region, the source region and an interface between the body region and the semiconductor region defining a channel region therebetween, the channel region extending along the trench sidewall. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region. | 2011-07-21 |
20110177663 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - Generally, a power MOSFET mainly includes an active region occupying most of an internal region (a region where a gate electrode made of polysilicon or the like is integrated), and a surrounding gate contact region (where the gate electrode made of polysilicon or the like is derived outside a source metal covered region to make contact with a gate metal) (see FIG. | 2011-07-21 |
20110177664 | MEHTOD FOR FABRICATING A SONOS MEMORY - A method for fabricating SONOS memory is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a first silicon oxide layer, a silicon nitride layer, and a second silicon oxide layer on the surface of the semiconductor substrate; forming a hard mask on the second silicon oxide layer; patterning the hard mask, the second silicon oxide layer, the silicon nitride layer, and the first silicon oxide layer to form a patterned hard mask and a stacked structure; forming a gate oxide layer on surface of the patterned hard mask; removing the gate oxide layer and the patterned hard mask; forming a patterned polysilicon layer on surface of the stacked structure; and forming a source/drain region in the semiconductor substrate adjacent to two sides of the polysilicon layer. | 2011-07-21 |
20110177665 | THERMAL PROCESS - A thermal process is disclosed. The thermal process preferably includes the steps of: providing a semiconductor substrate ready to be heated; and utilizing at least a first heating beam and a second heating beam with different energy density to heat the semiconductor substrate simultaneously. Accordingly, the present invention no only eliminates the need of switching between two different thermal processing equipments and shortens the overall fabrication cycle time, but also improves the pattern effect caused by the conventional front side heating. | 2011-07-21 |
20110177666 | METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY - The method of manufacturing a semiconductor memory includes a process of forming a projection by performing an insulator forming process on the exposed side surface of a reactive conductive material and a non-reactive conductive material that are stacked above a substrate so as to change a predetermined length of the side surface of the reactive conductive material into an insulator, and thereby causing the side surface of the non-reactive conductive material to project outward from the side surface of the reactive its conductive material. The insulator forming process is an oxidation process or a nitridation process, the reactive conductive material is a material that reacts chemically and changes into the insulator in the oxidation process or nitridation process, and the non-reactive conductive material is a material that does not change into the insulator in the oxidation process or nitridation process. | 2011-07-21 |
20110177667 | PHASE-CHANGE MEMORY AND FABRICATION METHOD THEREOF - A phase-change memory is provided. The phase-change memory comprises a substrate. A first electrode is formed on the substrate. A circular or linear phase-change layer is electrically connected to the first electrode. A second electrode formed on the phase-change layer and electrically connected to the phase-change layer, wherein at least one of the first electrode and the second electrode comprises phase-change material. | 2011-07-21 |
20110177668 | METHOD OF MAKING A THIN FILM RESISTOR - A method of making a thin film resistor includes: forming a doped region in a semiconductor substrate; forming a dielectric layer over the substrate; forming a thin film resistor over the dielectric layer; forming a contact hole in the dielectric layer before annealing the thin film resistor, wherein the contact hole exposes a portion of the doped region; and performing rapid thermal annealing on the thin film resistor after forming the contact hole. | 2011-07-21 |
20110177669 | METHOD OF CONTROLLING TRENCH MICROLOADING USING PLASMA PULSING - Methods and apparatus for controlling microloading, such as within cell microloading between adjacent cells or isolated/dense microloading between areas of isolated or dense features during shallow trench isolation (STI) fabrication processes, or other trench fabrication processes, are provided herein. In some embodiments, a method for fabricating STI structures may include providing a substrate having a patterned mask layer formed thereon corresponding to one or more STI structures to be etched; etching the substrate through the patterned mask layer using a plasma formed from a process gas to form one or more STI structure recesses on the substrate; and pulsing the plasma for at least a portion of etching the substrate to control at least one of a depth or width of the one or more STI structure recesses. | 2011-07-21 |
20110177670 | THROUGH SILICON VIA LITHOGRAPHIC ALIGNMENT AND REGISTRATION - A method of manufacturing an integrated circuit structure forms a first opening in a substrate and lines the first opening with a protective liner. The method deposits a material into the first opening and forms a protective material over the substrate. The protective material includes a process control mark and includes a second opening above, and aligned with, the first opening. The method removes the material from the first opening through the second opening in the protective material. The process control mark comprises a recess within the protective material that extends only partially through the protective material, such that portions of the substrate below the process control mark are not affected by the process of removing the material. | 2011-07-21 |
20110177671 | METHODS OF FORMING A SEMICONDUCTOR CELL ARRAY REGION, METHOD OF FORMING A SEMICONDUCTOR DEVICE INCLUDING THE SEMICONDUCTOR CELL ARRAY REGION, AND METHOD OF FORMING A SEMICONDUCTOR MODULE INCLUDING THE SEMICONDUCTOR DEVICE - Methods of forming a semiconductor cell array region, a method of forming a semiconductor device including the semiconductor cell array region, and a method of forming a semiconductor module including the semiconductor device are provided, the methods of forming the semiconductor cell array region include preparing a semiconductor plate. A semiconductor layer may be formed over the semiconductor plate. The semiconductor layer may be etched to form semiconductor pillars over the semiconductor plate. | 2011-07-21 |
20110177672 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device, including: forming a moisture resistant ring surrounding a multilayer interconnection structure in a layered body formed of stacked layers of a plurality of interlayer insulating films lower in dielectric constant than a SiO | 2011-07-21 |
20110177673 | METHOD FOR PRODUCING A STACK OF SEMI-CONDUCTOR THIN FILMS - A method for producing a stacked structure having an ultra thin buried oxide (UTBOX) layer therein by forming an electrical insulator layer on a donor substrate, introducing elements into the donor substrate through the insulator layer, forming an electrical insulator layer, on a second substrate, and bonding the two substrates together to form the stack, with the two insulator layers limiting the diffusion of water and forming the UTBOX layer between the two substrates at a thickness of less than 50 nm, wherein the donor oxide layer has, during bonding, a thickness at least equal to that of the bonding oxide layer. | 2011-07-21 |
20110177674 | PROCESSING OF MULTILAYER SEMICONDUCTOR WAFERS - A method and apparatus for machining, or forming a feature in, a patterned silicon wafer includes removing portions of surface layers on the wafer using a first pulsed laser ( | 2011-07-21 |
20110177675 | METHOD OF FORMING A SEMICONDUCTOR DIE - In one embodiment, semiconductor die having non-rectangular shapes and die having various different shapes are formed and singulated from a semiconductor wafer. | 2011-07-21 |
20110177676 | METHOD OF TRANSFERRING A LAYER ONTO A LIQUID MATERIAL - A method for transferring a layer onto a support includes transferring the layer, assembled on an initial substrate, onto a liquid layer that has been previously deposited on the support. The layer is subsequently released from the initial substrate by chemical etching, and the liquid layer is evacuated to allow molecular adhesion of the layer to the support. | 2011-07-21 |
20110177677 | METHOD OF THIN FILM EPITAXIAL GROWTH USING ATOMIC LAYER DEPOSITION - A method of thin film epitaxial growth using atomic layer deposition is provided by introducing a first deposition precursor and a second deposition precursor into a chamber after a vent valve connected between the chamber and a vacuum pump is closed. The chamber is maintained in a thermal equilibrium state and a constant pressure as a result of keeping the first deposition precursor and the second deposition precursor inside the chamber thereby reducing deposition precursors consumption and achieving thin film epitaxial growth on the substrate. | 2011-07-21 |
20110177678 | METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE - A method for manufacturing a nitride semiconductor device includes forming an n-type nitride-based semiconductor layer on a substrate; forming an active layer of a nitride-based semiconductors including In on the n-type nitride-based semiconductor layer using ammonia and a hydrazine derivative as group-V element source materials and a carrier gas including hydrogen; and forming a p-type nitride-based semiconductor layer on the active layer using ammonia and a hydrazine derivative as group-V element source materials. | 2011-07-21 |
20110177679 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes preparing a substrate having a low-dislocation region and a high-dislocation region having a higher dislocation density than dislocation density of the low-dislocation region; forming an insulating film on the low-dislocation region surrounding the high-dislocation region but not covering the high-dislocation region; and forming a nitride-based semiconductor layer on the substrate, after forming the insulating film. | 2011-07-21 |
20110177680 | ETCHANT COMPOSITION FOR METAL WIRING AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL USING THE SAME - The present invention relates to an etchant for wet etching a wiring that includes copper, where the etchant includes approximately 5 to approximately 25 wt % of a peroxide, approximately 0.5 to approximately 5 wt % of an oxidant, approximately 0.1 to approximately 1 wt % of a fluoride-based compound and approximately 1 to approximately 10 wt % of a glycol. The etchant can provide an etching rate that is suitable to many processes, and produces an appropriate etching amount as well as an appropriate taper angle. | 2011-07-21 |
20110177681 | Method of Producing High Quality Relaxed Silicon Germanium Layers - A method for minimizing particle generation during deposition of a graded Si | 2011-07-21 |
20110177682 | SUPPRESSION OF OXYGEN PRECIPITATION IN HEAVILY DOPED SINGLE CRYSTAL SILICON SUBSTRATES - This invention generally relates to a process for suppressing oxygen precipitation in epitaxial silicon wafers having a heavily doped silicon substrate and a lightly N-doped silicon epitaxial layer by dissolving existing oxygen clusters and precipitates within the substrate. Furthermore, the formation of oxygen precipitates is prevented upon subsequent oxygen precipitation heat treatment. | 2011-07-21 |
20110177683 | FORMING II-VI CORE-SHELL SEMICONDUCTOR NANOWIRES - A method of making II-VI core-shell semiconductor nanowires includes providing a support; depositing a layer including metal alloy nanoparticles on the support; and heating the support and growing II-VI core semiconductor nanowires where the metal alloy nanoparticles act as catalysts and selectively cause localized growth of the core nanowires. The method further includes modifying the growth conditions and shelling the core nanowires to form II-VI core-shell semiconductor nanowires. | 2011-07-21 |
20110177684 | METHOD OF MANUFACTURING A JUNCTION BARRIER SCHOTTKY DIODE WITH DUAL SILICIDES - An integrated circuit, including a junction barrier Schottky diode, has an N type well, a P-type anode region in the surface of the well, and an N-type Schottky region in the surface of the well and horizontally abutting the anode region. A first silicide layer is on and makes a Schottky contact to the Schottky region and is on an adjoining anode region. A second silicide layer of a different material than the first silicide is on the anode region. An ohmic contact is made to the second silicide on the anode region and to the well. | 2011-07-21 |
20110177685 | Method of Fabricating a Semiconductor Device - The present invention discloses a method of fabricating a semiconductor memory device including forming sequentially a gate insulating layer and a first conductive pattern on a semiconductor substrate; forming a protective layer on surfaces of the first conductive pattern and the gate insulating layer; performing an etching process to form a trench, the etching process being performed such that the protective layer remains on side walls of the first conductive pattern to form a protective pattern; forming an isolation layer in the trench; etching the isolation layer; removing the protective pattern above a surface of the isolation layer; and forming sequentially a dielectric layer and a second conductive layer on surfaces of the isolation layer, the protective pattern and the first conductive pattern. | 2011-07-21 |
20110177686 | Stable Gold Bump Solder Connections - A metallic interconnect structure ( | 2011-07-21 |
20110177687 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of first group wiring layers laminated on a substrate, and each of the first group wiring layers having a wire formed with a first minimum wire width and a main dielectric film portion; and a plurality of second group wiring layers laminated on a top layer of the plurality of first group wiring layers and each of the second group wiring layers having a wire formed with a second minimum wire width greater than the first minimum wire width and a main dielectric film portion, wherein a main dielectric film portion in a bottom layer of the plurality of second group wiring layers has a relative dielectric constant which is substantially identical to a relative dielectric constant of main dielectric film portions of the other second group wiring layers, and Young's modulus of the main dielectric film portion in the bottom layer of the plurality of second group wiring layers is smaller than those of the main dielectric film portions of the other second group wiring layers and larger than those of main dielectric film portions of the first group wiring layers. | 2011-07-21 |
20110177688 | PACKAGING BOARD AND MANUFACTURING METHOD THEREFOR, SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREFOR, AND PORTABLE DEVICE - A method for manufacturing a semiconductor module includes: a first process of forming a conductor on one face of an insulating layer; a second process of exposing the conductor from the other face of the insulating layer; a third process of providing a first wiring layer on an exposed area of the conductor and on the other face of the insulating layer; a fourth process of preparing a substrate on which a circuit element is formed, the second wiring being formed on the substrate; and a fifth process of embedding the conductor in the insulating layer by press-bonding the insulating layer and the substrate in a state where the conductor on which the first wiring layer is provided by the third process is disposed counter to the second wiring layer. Wiring is formed without causing damaging to the circuit element. | 2011-07-21 |
20110177689 | Methods for Forming Wiring and Manufacturing Thin Film Transistor and Droplet Discharging Method - It is required that a line width of a wiring is prevented from being wider to be miniaturized when the wiring or the like is formed by a dropping method typified by an ink-jetting method. The invention provides a method for narrowing (miniaturizing) a line width according to a method different from a conventional method. One feature of the invention is that a plasma treatment is performed before forming a wiring or the like by a dropping method typified by an ink-jetting method. As the result of the plasma treatment, a surface for forming a conductive film is modified to be liquid-repellent. Consequently, a wiring or the like formed by a dropping method can be miniaturized. | 2011-07-21 |
20110177690 | POLISHING SOLUTION FOR CMP, AND METHOD FOR POLISHING SUBSTRATE USING THE POLISHING SOLUTION FOR CMP - The CMP polishing liquid of the present invention contains 1,2,4-triazole, a phosphoric acid, an oxidant, and abrasive particles. The polishing method of the present invention is a substrate polishing method for polishing a substrate with a polishing cloth while supplying a CMP polishing liquid between the substrate and the polishing cloth, in which the substrate is a substrate having a palladium layer, and the CMP polishing liquid is a CMP polishing liquid containing 1,2,4-triazole, a phosphoric acid, an oxidant, and abrasive particles. | 2011-07-21 |
20110177691 | METHOD FOR FORMING HOLE PATTERN - A method for forming a hole pattern includes forming a hard mask layer for a hole pattern over an etch target layer, forming pillar patterns having a gap therebetween over the hard mask layer for a hole pattern, forming spacer patterns on sidewalls of the pillar patterns, removing the pillar patterns between the spacer patterns, and etching the hard mask layer for a hole pattern by using the spacer patterns as etch barriers. | 2011-07-21 |
20110177692 | Barrier Layer Removal Method and Apparatus - This invention relates to a method and apparatus by integrating semiconductor manufacturing processes of stress free electrochemical copper polishing (SFP), removal of the Tantalum oxide or Titanium oxide formed during SFP process and XeF | 2011-07-21 |
20110177693 | Reversible Water-Free Process for the Separation of Acid-Containing Gas Mixtures - Gas mixtures which comprise acids like HF, HCl or HBr and other constituents, especially gas mixtures which comprise or consist of carboxylic acid fluorides, C(O)F | 2011-07-21 |
20110177694 | Switchable Neutral Beam Source - The invention can provide apparatus and methods of processing a substrate in real-time using a switchable quasi-neutral beam system to improve the etch resistance of photoresist layer. In addition, the improved photoresist layer can be used in an etch procedure to more accurately control gate and/or spacer critical dimensions (CDs), to control gate and/or spacer CD uniformity, and to eliminate line edge roughness (LER) and line width roughness (LWR). | 2011-07-21 |
20110177695 | SUBSTRATE PROCESSING METHOD AND STORAGE MEDIUM - A recovery process of a damaged layer and a reducing process of an oxide are performed on a substrate in which the oxide and the damaged layer from which carbon has been eliminated are formed on exposed surfaces of a Cu wiring and a SiCOH film as a low-k film, respectively. In the same processing chamber | 2011-07-21 |
20110177696 | SPUTTERING TARGET, METHOD FOR FORMING AMORPHOUS OXIDE THIN FILM USING THE SAME, AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - Disclosed is a sputtering target having a good appearance, which is free from white spots on the surface. The sputtering target is characterized by being composed of an oxide sintered body containing two or more kinds of homologous crystal structures. | 2011-07-21 |
20110177697 | HARSH ENVIRONMENT ROTARY JOINT ELECTRICAL CONNECTOR - A rotary joint connector has a plug having a plug contact module and a mating receptacle having a receptacle contact module designed for mating engagement with the plug contact module when the connector is fully mated. One of the units has front and rear shells which are rotatably coupled together and contain the contact module which is held in the rear shell so that the rear shell and contact module are free to rotate in the front shell. The mating contact arrangement is such that the plug and receptacle contact modules do not have to be rotationally aligned to maintain electrical contact, so that relative rotation of the electrical contacts of the two contact modules about the mating axis as a result of rotation of the rear shell does not degrade the quality of the connected circuits. | 2011-07-21 |
20110177698 | CARD CONNECTOR ASSEMBLY AND ELECTRONIC APPARATUS - A card connector assembly includes a substrate, a card connector, and a stud member. The card connector is mounted on the substrate, and includes a pin member which has a neck section and an engagement section coupled to the tip side of the neck. The stud member is provided on the substrate, and has an elastic insert section through which the neck section of the pin member is inserted. The neck section of the pin member is configured to have a floating structure with the stud member. | 2011-07-21 |
20110177699 | BACKPLANE CABLE INTERCONNECTION - A backplane cabling interconnect scheme is provided that includes a wafer based cable termination and an organizer shroud. The shroud complements existing backplane connectors and provides positioning and polarization for the cable terminated wafer. The wafer cable ends can be stacked or arranged in various arrays and are held in place with an integral latch. A permanent latch is provided for high vibration environments. | 2011-07-21 |
20110177700 | ELECTRICAL CONNECTOR - An electrical connector is disclosed and includes a body and a cover. The body has a first through hole and an area for conducting and accommodating solder between the first through hole and the edges of the body. The cover is movably disposed on the body. The color of the cover is lighter than that of the body. The cover has a second through hole and an area for accommodating pins between the second through hole and the edges of the cover. The second through hole corresponds to the first through hole. The second through hole has a first rim, a second rim, a third rim, and a fourth rim. The third rim and the fourth rim are parallel to a movement direction of the cover. When the cover is at an open state on the body, the area for accommodating pins and the area for conducting and accommodating solder are disengaged, the projection of the first rim and the second rim of the second through hole vertically on the body does not lie in the first through hole. It solves the problem of making mistakes in inspection. | 2011-07-21 |
20110177701 | ELECTRICAL CONNECTING DEVICE - An electrical connecting device is disclosed and includes a printed circuit board, an electrical connector, and a fixing gum. The electrical connector is used for electrically connecting a chip module onto the printed circuit board and has at least one gum positioning portion formed on at least one sidewall thereof. The gum positioning portion is non-coplanar with respect to the sidewall. The fixing gum adheres between and to the recess and the printed circuit board and is also attached in the recess. Because the gum positioning portion of the electrical connector is non-coplanar with respect to the sidewall, after the fixing gum is sprayed on the gum positioning portion, the electrical connector is reliably mounted on the printed circuit board to be prevented from falling off under an external force during a reflowing or due to shaking. | 2011-07-21 |
20110177702 | ELECTRICAL CONNECTOR WITH REMOVABLE HOUSING - An electrical connector includes an insulative housing and a plurality of contacts received in the housing. Each contact includes a body portion, a spring portion and a soldering tail. The insulative housing includes a smooth top face, a plurality of generally parallel ridges extending from an opposite face to the top face to provide with interposed grooves between every adjacent ridges. The body portions of the contacts are individually engaged in the corresponding grooves and the spring portions extend forwards beyond a front face of the housing. The insulating housing includes a mounting face opposite to the smooth top face for confronting with a printed circuit board and the soldering tails extend downwards beyond the mounting face. | 2011-07-21 |
20110177703 | ROTATABLE AND CONCEALABLE ELECTRICAL POWER RECEPTACLE - Disclosed is a reversible and concealable electrical power receptacle, comprising: a main body, a shaft section, an accommodating section, and an electrical outlet assembly. The electrical outlet assembly is disposed on the main body; the accommodating section is for receiving the main body; the shaft section, comprises a first shaft member and a second shaft member. The second shaft member, being coupled to the main body and is perpendicular to the first shaft member, and the main body is rotatable with respect to the first and the second shaft members transversely respectively. Consequently, the main body is able to rotate transversely and perpendicularly with respect to the accommodating section in accordance with the rotational movements of the first shaft and the second shaft members, for resulting in an exposed state in use or a concealed state when not in use, thereby achieving effective space utilization. | 2011-07-21 |
20110177704 | INDOOR/OUTDOOR CABLE HARNESS SYSTEM - A cable harness system having: a first distal portion having a power socket; a second distal portion having a power plug, the second distal portion being connected to the first distal portion; a power outlet located between the first and second distal portions and interconnected to the power cord. The power outlet having a power socket; an integrated cap having protruding pins which insert into corresponding pin holes of the power socket to prevent water from entering the pin holes of the at least one power socket, the cap releasably covering the power socket by inserting the protruding pins into the power socket when the power socket is not in use, and the cap releasably covering an earth pin hole of the power socket by inserting one protruding pin into an unused pin hole of the power socket when a two pin power plug is inserted into the power socket. | 2011-07-21 |
20110177705 | PLUG-TYPE CONNECTOR - A plug-type connector includes a connector main body having a forward extended front end to provide a plug portion, and being provided on a top surface with an open-topped recess; a push unit including two corresponding sideward-push plates pivotally assembled to the connector main body to locate in the recess; and a pinch unit being assembled to the connector main body to bear against an upper side of the push unit. The plug portion and the pinch unit cooperatively enable the connector main body to firmly connect to a corresponding receptacle, and the sideward-push plates of the push unit can be caused to separately push leftward and rightward to raise the pinch unit and thereby allow disconnection of the connector main body from the receptacle. Therefore, the plug-type connector has simplified structure, and can be firmly connected to a receptacle and easily disconnected therefrom. | 2011-07-21 |
20110177706 | SAFETY CONNECTION ELECTRICAL SYSTEMS AND METHODS - Electrical connection systems and methods are disclosed. An electrical system includes an electrical plug and an electrical receptacle. The electrical plug has at least one prong having at least one opening. The electrical receptacle has at least one socket, an electrical contact positioned within the at least one socket, a light source positioned to transmit light through the at least one socket, and a photodetector positioned to receive the light transmitted by the light source through the at least one socket. The electrical receptacle further has a microprocessor programmed to selectively couple the electrical contact with the power source based on the light received by the photodetector. | 2011-07-21 |
20110177707 | CARD EDGE CONNECTOR WITH IMPROVED RETAINER - A card edge connector includes an elongated housing, a plurality of contacts retained to the housing, and a retainer located at one end of the housing along an elongated direction of the housing. The housing has a pair of side walls and a central slot between the side walls. The retainer has a resilient retention arm and a rigid stop arm diverging from the retention arm along a transverse direction perpendicular to the elongated direction. The retention arm has a locking section extending along the elongated direction to lock a daughter board and an operating section obliquely extending from the locking section along a third direction different from both elongated direction and transverse direction. The stop arm has an abutting section behind the operating section along a fourth direction perpendicular to the operating section to limit a deflection of the operating section. | 2011-07-21 |
20110177708 | QUICK MOUNTING DEVICE WITH MODULES - A quick mounting device for appliances that is quickly and easily engaged and disengaged mechanically without the use of tools and has at least one modular connection. | 2011-07-21 |
20110177709 | SOCKET CONNECTOR CAPABLE OF PREVENTING MISMATCH OF PICK-UP CAP THEREOF - A socket connector includes a socket body, a plurality of contacts received in the socket body; and a pick-up cap mounted upon the socket body. The socket body includes a base and a first sidewall and a second sidewall respectively located by opposite sides of the base. The first sidewall and the second sidewall are respectively formed with a first protrusion and a second protrusion. The pick-up cap includes a cover section and a first flange and a second flange which respectively extend downwardly from opposite sides of the cover section and which are respectively engaged with the first sidewall and the second sidewall of the socket body. The first flange and the second flange are respectively formed with a first notch and a second notch arranged in asymmetrical manner and engaged with the first protrusion and the second protrusion, respectively. | 2011-07-21 |
20110177710 | LATCH ASSEMBLY FOR A CONNECTOR ASSEMBLY - A connector assembly for mating with a multi-port electrical connector includes a shielded housing having a plurality of discrete shielded plug chambers and a plurality of plugs received in corresponding plug chambers. Each of the plugs are shielded from one another by the shielded housing, and the plugs are configured for simultaneous mating with the multi-port electrical connector, wherein each plug is received in a different port of the electrical connector. The connector assembly also includes a latch assembly coupled to the shielded housing. The latch assembly engages the shielded housing and is configured to engage the multi-port electrical connector to electrically common the shielded housing and the multi-port electrical connector. | 2011-07-21 |
20110177711 | ARC-PREVENTING APPARATUS FOR SEPARATE CORD-TYPE HAIR DRYER - The present invention provides an arc-preventing apparatus for separate cord-type hair dryer to prevent from being damaged by an arc which is occurred when a male connector formed at one end of a separate-type power source cord is disconnected to a female connector installed in a main body of the hair dryer under a load condition. The arc-preventing apparatus is installed in a power contact unit of the hair dryer, and the male and the female connector are fixed or released by an on/off switch of the hair dryer. The arc-preventing apparatus comprises a stopper formed in one side of the female connector which is installed in the power contact unit of the main body, and protruded or retracted by a first elastic body; a rod inserted into a rotation shaft formed in the side opposite to the stopper, and rotates by a predetermined angles along a second elastic body and a guide groove, as the on/off switch is moved down; and a male connector having a first and a second stopping groove which are coupled to a stopping protrusion formed in one end of the rod and the stopper, respectively. | 2011-07-21 |
20110177712 | CAMERA APPARATUS, PORTABLE ELECTRONIC DEVICE USING THE CAMERA APPARATUS AND METHOD OF ASSEMBLING THE PORTABLE ELECTRONIC DEVICE - A camera apparatus attached to a portable electronic device includes a camera module, a holder, and a PCB. The holder includes a socket and a resisting member secured in the socket. The PCB includes a contact portion. The contact portion and the camera module are received in the socket. The resisting member pushes the contact portion toward the camera module. | 2011-07-21 |
20110177713 | Continuous Flexible Bus - A continuous flexible bus comprises, for example, a plurality of metal clad flexible conductors. A device, such as a switch for example, is connected to the continuous flexible bus. In order to connect the device to the continuous flexible bus, at least one piercing connector is used, for example. The at least one piercing connector is configured, for example, to pierce one of the plurality of flexible metal clad conductors. Once the one of the plurality of flexible metal clad conductors is pierced, the at least one piercing connector causes, for example, an electrical connection between an electrical conductor in the pierced one of the plurality of flexible metal clad conductors and the switch. | 2011-07-21 |
20110177714 | ONE TOUCH PIVOTING EXPANDABLE POWER AND DATA CENTER - An expandable power and data center ( | 2011-07-21 |
20110177715 | ELECTRICAL PLUG CONNECTOR - The invention relates to an electrical plug connector, in particular to an electrical pin or socket connector, for a data transmission interface in the automotive field, having: a plug connector member ( | 2011-07-21 |
20110177716 | PLUG ASSEMBLY - A plug assembly includes a shielded housing having an upper shell, a lower shell and a center plate held between the upper and lower shells. The upper shell has at least one upper plug chamber, and the lower shell has at least one lower plug chamber. The center plate is positioned between, and provides shielding between, the upper and lower plug chambers. A plurality of plugs are received in corresponding plug chambers. Each of the plurality of plugs have a plug insert with shield members defining plug quadrants, and each of the plurality of plugs have a plurality of terminals held by the plug insert. The plurality of terminals are arranged in pairs in each of the plug quadrants. | 2011-07-21 |
20110177717 | ELECTRICAL CONNECTOR AND ASSEMBLING METHOD THEREOF - An electrical connector includes a dielectric housing, a plurality of conductive terminals, a fixing strip, a plurality of wires, and an upper shell, the dielectric housing having an upper face and a lower face opposite to the upper face, the upper face being provided with a plurality of terminal slots and recesses, the conductive terminals having a contact portion, a base portion, an engaged portion and received in the corresponding terminal slots, the engaged portion being engaged against the corresponding recesses, the fixing strip being transversally disposed on the upper face of the dielectric housing and across the conductive terminals and the terminal slots for securing the conductive terminals in the terminal slots, the wires respectively connecting with the base portions of the conductive terminals, and an upper shell is assembled on the dielectric housing above the fixing strip. | 2011-07-21 |
20110177718 | Contact and electrical connector having such contact - The present invention relates to a contact and an electrical connector having such contacts. The contact is formed as a single piece of elastic metal sheet and includes a base frame and a spring arm restrained by the base frame in a preload state. The base frame includes two side walls each having a stopper projection formed in a plane within which a corresponding side wall is disposed. The spring arm is formed with opposite projections which are pressed down and constrained in position by the stopper projections respectively. The contact can be manufactured in a simple way and presents a high reliability. | 2011-07-21 |
20110177719 | Electrical connector module assembly - An electrical connector module assembly is disclosed having a connector header usable with multiple module bodies. At least one module body has integral alignment members for aligning printed circuit contact portions with the module body and with a connected substrate. | 2011-07-21 |
20110177720 | System and Method for Polyurethane Bonding During and After Overmolding - An electrical apparatus according to the present disclosure comprises a molded device having a molded portion and being formed via an overmolding process. The electrical apparatus includes a wire set at least partially overmolded within the device, the wire set having an outer sheath surrounding a plurality of wires. The molded portion surrounds a portion of the wire set. The electrical apparatus further includes polyurethane bonding material occurring between the outer sheath and the molded portion. The polyurethane bonding material bonds at least a portion of the wire set to the molded portion during the overmolding process. | 2011-07-21 |
20110177721 | CABLE CONNECTING APPARATUS - A cable connecting apparatus comprises a plug type connector having a connectively engaging portion provided with a plurality of plug contacts which are arranged on each of first and second opposite surfaces of the connectively engaging portion to be connected with cables and a receptacle type connector having a housing on which an opening through which the connectively engaging portion of the plug type connector is inserted is formed at an end portion of the housing and a plurality of receptacle contacts arranged in the housing, wherein each of the receptacle contacts is provided with a pair of contacting points for coming into press-contact with the plug contact respectively on both sides of the first and second surfaces of the connectively engaging portion of the plug type connector and a distance from the end portion of the housing to one of the contacting points is different from a distance from the end portion of the housing to the other of the contacting points. | 2011-07-21 |
20110177722 | ELECTRICAL CONTACT, SET OF ELECTRICAL CONTACT, PRODUCT AND ASSEMBLY COMPRISING SUCH AN ELECTRICAL CONTACT, ITS METHOD OF MANUFACTURE AND METHOD OF ELECTRICAL CONNECTION - The electrical contact includes a wire crimping portion receiving an electrical wire, a circumferential power contact portion for connection with a complementary contact. The power contact portion includes a body mechanically retained on the wire crimping portion and spring legs extending from the body and to be contacted with the complementary contact. The electrical contact further includes an electrically insulating cover covering said spring legs. | 2011-07-21 |
20110177723 | TERMINAL BLOCK - A terminal block, configured to be connected to a plurality of first card edge terminals arranged at a peripheral edge part of a first main surface of a substrate and a plurality of second card edge terminals arranged at a peripheral edge of one of a second main surface of the substrate and the first main surface of the substrate, has a base formed with an insertion port to which the peripheral edge of the substrate is inserted, and a plurality of first and second terminals arranged on the base. Each of the plurality of first terminals has a first supporting portion arranged on the first main surface side of the substrate and extended in a normal direction of the first and second main surfaces of the substrate inserted to the insertion port, and a first contacting portion formed from the first supporting portion to contact the first card edge terminals. | 2011-07-21 |
20110177724 | Conducting Part - An electrical conducting part including a body including a cross-section substantially in the form of an overturned “U” having a longitudinal base, wherein at least one end of the body includes a longitudinal extension with an upwards fold, and a vertical flank, wherein the body defines at least one first opening elongated in the transverse direction and at least first elastic lugs extending in the vertical direction and integral with the flanks of the “U” and arranged in the longitudinal direction opposite each opening in the base. | 2011-07-21 |
20110177725 | ELECTRIC CONNECTOR, ELECTRONIC DEVICE, AND ELECTRICALLY-CONDUCTIVE TOUCH METHOD - An electric connector has a contact spring. The contact spring includes a fixed portion that is retained by a housing, an involute portion that is extended from the fixed portion into an inward spiral pattern, a revolute portion that is inverted from the involute portion and extended into an outward spiral pattern along the involute portion, an arm portion that is connected to a tail end portion of the revolute portion, a tangential direction of a portion connected to the revolute portion in the arm portion being aligned with a tangential direction of the tail end portion of the revolute portion, and a contact portion that is provided at a leading end of the arm portion to be projected to an outside of the housing, the contact portion abutting on the-other-end electrode to receive a pressing force in a direction in which the arm portion is substantially extended. | 2011-07-21 |
20110177726 | ELECTRIC CONNECTOR, ELECTRONIC DEVICE, AND ELECTRICALLY-CONDUCTIVE TOUCH METHOD - A compact electric connector in which a contact has a high contact pressure and a large displacement amount is provided. An electric connector includes a contact spring and an auxiliary spring. The contact spring includes a support portion that is supported by a housing, a contact portion that is projected from the housing to abut on the-other-end contact, and a plurality of flexing portions that are bent so as to be deformed between the support portion and the contact portion when the contact portion is pushed into the housing. The auxiliary spring includes a flexing auxiliary portion that abuts on the contact spring to exert an elastic force in a direction in which deformation of the flexing portion closest to the support portion is obstructed when the contact portion of the contact spring is pushed into the housing. | 2011-07-21 |
20110177727 | ALUMINUM CONDUCTOR AND CONDUCTIVE TERMINAL CONNECTION - A conductive terminal is a feasible of making a reliable and cost effective electrical connection between the aluminum conductor and any metal conductor. The terminal includes a blank, a three dimensional structure formed from the blank, and multiple seams and a slit being sealed by a metal filler. It has a transition opening to allow melted metal to flow in and make a metallic bond between terminal and the aluminum conductor. The folded two arms with the metallic seals provide sealing surface for adhesive shrinkable tube. An assembly of terminal and the aluminum conductor includes a compressed the aluminum conductor within a terminal hollow tube, a metallic bond and coating, an metallic seals at a slit and multiple seams. The shrinkable adhesive tube seals the connection of the aluminum conductor and conductive terminal from environmental fluids at multiple locations. These locations start from the two arms with metallic seals, the transition opening, non-deformed hollow tube of the terminal, and the insulation of the aluminum conductor. The metallic bond and coating also isolate the aluminum conductor from air. | 2011-07-21 |
20110177728 | TERMINAL FITTING AND METHOD OF PRODUCING TERMINAL FITTING - A terminal fitting ( | 2011-07-21 |
20110177729 | SPIRAL CONTACT AND PROCESS FOR PRODUCING THE SAME - To provide a producing method of a spiral contact that exhibits, even in a hot environment, low permanent set in fatigue, excellent spring characteristic and excellent electrical conductivity. In the producing method in which atoms of a dissimilar metal are diffused and infiltrated into a surface layer of the spiral contact ( | 2011-07-21 |
20110177730 | PROPELLER DRIVE ARRANGEMENT FOR CONTROLLING AND DRIVING A SHIP - A propeller drive assembly, for steering and driving a ship ( | 2011-07-21 |
20110177731 | DEVICE FOR DETECTING THE ANGULAR POSITION OF A STEERING SHAFT - A device for detecting an angular position of a steering shaft ( | 2011-07-21 |
20110177732 | COLD WATER SURVIVAL APPARATUS - Apparatus for helping a person survive on a cold body of water includes a suit capable of covering at least a substantial portion of the user's body while allowing the user to move and work out of water. An inflatable raft is provided to hold and support the person on water when the raft has been inflated. The raft in a deflated state is foldable into a compact configuration and is sufficiently light in weight to be carried on a back of the person out of water. There is a raft holder adapted to hold the raft in its compact state and adapted for carrying on the suit. The raft can be tethered to the suit or the raft holder. | 2011-07-21 |
20110177733 | FIRE/WATER RESCUE SLED FOR HANDICAPPED AND ELDERLY - A rescue appliance for evacuating physically-compromised persons is disclosed. A rescue appliance includes a platform configured to support a prone evacuee, a set of wheels coupled with the platform to support the platform relative to a floor surface, and a protection assembly coupled with the platform. The protection assembly is configurable to surround the prone evacuee to protect the evacuee from a fire. The protection assembly can be configured to encase the prone evacuee. The rescue appliance can be configured to be sufficiently buoyant to support an evacuee on water to allow evacuation in a flooding emergency. Two or more rescue appliances can be coupled together to form a train so that multiple persons can be evacuated simultaneously. | 2011-07-21 |
20110177734 | STRETCHABLE SCRIM WRAPPING MATERIAL - An industrial packaging material comprises a woven scrim of stretchable thermoplastic tapes bonded to a stretchable non-woven water-impermeable layer. The scrim and the non-woven layer are made from a blend comprising a polyolefin and an elastomer. The thermoplastic tapes of the scrim have a degree of elongation before breaking in the range of 20% to 500%. | 2011-07-21 |
20110177735 | ELASTOMERIC LAMINATE AND ELASTOMERIC FILM - An elastomeric laminate and an elastomeric film are provided. The elastomeric film can be a monolayer elastomeric film or a multilayer elastomeric film, wherein the monolayer elastomeric film includes an olefin-based elastomeric polymer and an effective polymer, and the multilayer elastomeric film when used as an alternative includes a first elastomeric member layer, and a second elastomeric member layer. The first elastomeric member layer includes at least one olefin-based elastomeric polymer, and at least one first draw down polymer. The second elastomeric member layer includes at least one elastomeric polymer and at least one second draw down polymer. The monolayer elastomeric film or the multilayer elastomeric film, and the elastic carrier are laminated together to form the elastomeric laminate. | 2011-07-21 |