25th week of 2010 patent applcation highlights part 24 |
Patent application number | Title | Published |
20100156394 | MAGNETIC FIELD CURRENT SENSORS - Embodiments related to magnetic current sensors, systems and methods. In an embodiment, a magnetic current sensor integrated in an integrated circuit (IC) and housed in an IC package comprises an IC die formed to present at least three magnetic sense elements on a first surface, a conductor, and at least one slot formed in the conductor, wherein a first end of the at least one slot and at least one of the magnetic sense elements are relatively positioned such that the at least one of the magnetic sense elements is configured to sense an increased magnetic field induced in the conductor proximate the first end of the at least one slot. | 2010-06-24 |
20100156395 | METHOD AND APPARATUS FOR AMPLIFIED VARIABLE RELUCTANCE SPEED SENSOR - A method and system for measuring a characteristic of a machine is provided. The system includes a speed sensor including a housing, a variable reluctance sensor (VRS) mounted at least partially within the housing, and a digitization circuit electrically coupled to an output of the VRS. The digitization circuit is also mounted within the housing and is configured to convert a substantially sinusoidal output of the VRS into a digital output signal. | 2010-06-24 |
20100156396 | DEVICE FOR CALIBRATION OF A FIELD TRANSMITTER - Device for calibration of a field transmitter comprising a shaped body on which there are disposed first means for sensing magnetic fields the activation of which allows calibration of a first measurement parameter of the transmitter, second means for sensing magnetic fields the activation of which allows calibration of a second measurement parameter of the transmitter, magnetic actuation means suitable to activate said first and second means for sensing magnetic fields. Said shaped body is configured so that it can be removably connected to the transmitter on the external surface of the enclosure thereof. | 2010-06-24 |
20100156397 | METHODS AND APPARATUS FOR AN ANGLE SENSOR FOR A THROUGH SHAFT - A sensor minimizes effects of sensor element misalignment with respect to a magnet. In one embodiment, a sensor comprises a magnet, first, second, and third sensor elements positioned in relation to the magnet, and a signal processing module to process output signals from the first, second, and third sensor elements and generate first and second signals for minimizing effects of positional misalignment of the first, second, and third sensor elements with respect to the magnet by maximizing a quadrature relationship of the first and second signals. | 2010-06-24 |
20100156398 | Scanning unit - A magneto-strictive scanning unit is formed through an actuation pushrod disposed and guided on an outside of a tight housing of a position sensor, in which the delicate sensor is tightly encapsulated, and components of an actuation unit can be disassembled and repaired without opening the sensor housing. | 2010-06-24 |
20100156399 | POSITION DETECTING DEVICE, MEDICAL DEVICE GUIDANCE SYSTEM, POSITION DETECTING METHOD, AND MEDICAL DEVICE GUIDING METHOD - A position detecting device includes a detected object that includes a circuit with an internal coil; a magnetic-field generator that includes a magnetic-field generating coil for generating a magnetic field with respect to a detection space of the detected object; detection coils that detect an induced magnetic field generated from the internal coil caused by the magnetic field; a magnetic-field-generating-coil switching unit that selects a magnetic-field generating coil from the magnetic-field generating coils in the magnetic-field generator; a storage unit that stores predetermined information for selecting a magnetic-field generating coil from the magnetic-field generating coils in the magnetic-field generator; and a control unit that controls the magnetic-field-generating-coil switching unit to select the magnetic-field generating coil to be operated among the magnetic-field generating coils in the first magnetic-field generator, based on at least one of a position and a direction of the detected object and based on the predetermined information. | 2010-06-24 |
20100156400 | MAGNETIC SENSOR DEVICE, MAGNETIC ENCODER DEVICE AND MAGNETIC SCALE MANUFACTURING METHOD - A magnetic sensor device may include “A”-phase magnetic resistance pattern and “B”-phase magnetic resistance pattern which are provided with a phase difference of 90° from each other; wherein the “A” pattern is provided with “+a” phase magnetic resistance pattern and “−a” phase magnetic resistance pattern with a phase difference of 180° from each other for detecting movement of a magnetic scale, and the “B” pattern is provided with “+b” phase magnetic resistance pattern and “−b” phase magnetic resistance pattern with a phase difference of 180° from each other for detecting movement of the magnetic scale, and the “+a” pattern, the “−a” pattern, the “+b” pattern and the “−b” pattern are formed on a same face of one piece of board so that the “+a” pattern and the “−a” pattern are diagonally located and the “+b” pattern and the “−b” pattern are diagonally located. | 2010-06-24 |
20100156401 | MAGNETIC RESOLVER AND METHOD OF MANUFACTURING THE SAME - A magnetic resolver that includes: an annular stator portion having a protruding core; an annular coil substrate on which a coil portion, which is disposed around the protruding core, is formed as a patterned thin-film coil; and a rotor portion disposed to face the stator portion from above, with the coil substrate interposed therebetween, wherein the amount of overlap between a top face of the protruding core and the rotor portion, when viewed from above, varies as a rotation angle of the rotor portion relative to the stator portion varies. The annular coil substrate may be constituted of substrate pieces that have shapes obtained by dividing the annular shape, which facilitates increasing the yield rate in the number of substrate pieces that can be produced from a substrate material. | 2010-06-24 |
20100156402 | POSITION ENCODER AND A METHOD FOR DETECTING THE POSITION OF A MOVABLE PART OF A MACHINE - A rotation angle detection sensor system for a rotational body is provided, which has a reduced sensitivity against an interfering magnetic field and an interfering electric field. The rotation angle detection sensor system comprises an encoder structure that is attached to the rotational body of a machine and is movable along with this rotational body. A stationary sensor assembly is positioned opposite to this encoder structure and supplies at least one sensor signal for determining the angle position. The sensor assembly includes a first inductive element, the inductance of which is dependent on the angle position of the encoder structure. | 2010-06-24 |
20100156403 | METHOD AND DEVICE FOR DETERMINING THE LOCATION OF THE STICKING POINT OF A ROD MADE OF MAGNETORESTRICTIVE MATERIAL LOCATED IN A WELL - The present invention relates to methods for determining the location of the sticking point Pc of a hollow rod or pipe | 2010-06-24 |
20100156404 | ULTRASONIC PROBE FOR PRODUCING FOUR DIMENSIONAL IMAGE - The present invention relates to an ultrasonic probe for producing a real-time three dimensional live action image (a four dimensional image), which has a long lifetime, and an improved image quality, can prevent malfunction. The ultrasonic probe for producing a four dimensional image includes power transmission means for transmission of power from an upright motor to a module ( | 2010-06-24 |
20100156405 | MAGNETIC FIELD DETECTION DEVICE - A magnetic field detection device including a magnetic body (magnetic flux guide) provided for adjusting a magnetic field to be applied to a magneto-resistance element. A shape of an on-substrate magnetic body in plan view is a tapered shape on one end portion side and a substantially funnel shape on another end portion side opposite the one end portion, the another end portion being larger in width than the one end portion, and a magneto-resistance element is disposed in front of an output-side end portion. In the on-substrate magnetic body, a contour of a tapered portion is not linear like a funnel, but has a curved shape in which a first curved portion protruding outward with a gentle curvature and a second curved portion protruding inward with a curvature similar to that of the first curved portion are continuously formed. | 2010-06-24 |
20100156406 | MAGNETIC DETECTION ELEMENT AND DETECTING METHOD - A magnetic detection element with increased detection intensity of a magnetic field by a inspection target substance is provided. A magnetic substance to which an alternating magnetic field is applied, and a detecting coil for detecting a magnetic field received by the magnetic substance are included. A surface of the magnetic substance in the detecting coil is divided into two that are a first region and a second region in a longitudinal direction of the detecting coil, and an affinity with the detection object substance in at least a part of the first region differs from that of the second region. | 2010-06-24 |
20100156407 | Arragement and method for recognising and classifying preferably hidden objects in object and/or human traffic - An arrangement and method recognizes and classifies preferably hidden objects in object and/or human traffic. Objects relevant to security are recognized, located and tracked through the surroundings thereof in moving object and human traffic isolated in real time. Use is made of a combination of a field generator, the field of which is modified by at least one corresponding object within the scanned space, first sensors which repeatedly record the changes in the field and provide corresponding signals, second sensors which record defined surroundings of the object in real-time with relation to the first sensors and provide corresponding signals and analytical means which correlate and collate the signals from the sensors with each other and which give from the same the shape, spatial position and/or spatial orientation of the object. | 2010-06-24 |
20100156408 | DC magnetic field interceptor apparatus and method - A hand held apparatus and method for detecting paper currency, within a package, where the paper currency has a ferromagnetic component. The apparatus includes a DC magnetic field source for inducing a DC de-magnetization field in any ferromagnetic paper currency that may be present within a package, and DC magnetic sensors for detecting certain characteristic patterns in the DC “de-mag” field induced by the DC magnetic field source. These certain characteristic field patterns are indicative of paper currency arranged in commonly found arrangements. | 2010-06-24 |
20100156409 | METHOD FOR DETERMINING THE CONTENT OF LIQUID AND SOLID PHASE COMPONENTS IN HYDROCARBON MIXTURE - The method for a hydrocarbon mixture composition determination includes the collection of at least one sample of the hydrocarbon mixture. For this sample, a nuclear magnetic resonance method is used for measuring series of hydrocarbon mixture's free inductance decrement curves within a temperature range of −150° C. to +150°. Each free inductance decrement curve is then used to determine the solid component fraction P | 2010-06-24 |
20100156410 | GAS NUCLEAR MAGNETIC RESONANCE APPARATUS - An NMR apparatus is provided, which is capable of being used for mass spectrometry and structure determination of a gas sample. The NMR apparatus includes: a sample vaporization unit | 2010-06-24 |
20100156411 | METHOD FOR PRODUCING SPECTRAL-SPATIAL PARALLEL RF EXCITATION PULSES FOR MAGNETIC RESONANCE IMAGING - A method for producing a spatially and spectrally selective radiofrequency (“RF”) excitation pulse includes establishing a desired spatial RF excitation pattern and establishing a desired spectral RF excitation pattern. The method also includes estimating an RF transmission profile map indicative of the transmission characteristics of an RF coil and determining, from the desired spatial and spectral excitation patterns and the estimated RF transmission profile map, at least one magnetic field gradient waveform indicative of locations in k-space to which RF energy is to be deposited. The method further includes determining, from the established spatial and spectral excitation patterns, the estimated RF transmission profile map, and the determined at least one gradient waveform, at least one RF excitation pulse waveform that will produce the desired spatial and spectral excitation patterns. | 2010-06-24 |
20100156412 | LOCAL COIL ARRANGEMENT FOR MAGNETIC RESONANCE APPLICATIONS WITH ACTIVATABLE MARKER - A local coil arrangement for magnetic resonance applications has a base body in which at least one local coil is arranged. An excitation signal to excite an examination subject to emit a magnetic resonance signal can be emitted by the local coil and/or a magnetic resonance signal emitted by the examination subject can be received by means of said local coil. At least one volume region is present in the base body, in which an amount of a substance is located that can be excited by means of the coil or another coil so as to emit a magnetic resonance signal. A shielding is arranged in the base body. The shielding can be controlled so as to either shield or not shield the volume region depending on the control state, so that the volume region is occluded or visible with regard to magnetic resonance applications. | 2010-06-24 |
20100156413 | CORRECTED NUCLEAR MAGNETIC RESONANCE IMAGING USING MAGNETIZATION TRANSFER - Techniques for corrected nuclear magnetic resonance (NMR) data include applying a presaturation radio frequency (RF) magnetic field different from a fat molecule resonance for a particular time to a target tissue; and applying a first measurement RF magnetic field within a first time after the particular time. Correction nuclear magnetic resonance (NMR) data from the target tissue is determined based on first NMR data received in response to applying the first measurement RF magnetic field. In some embodiments, a second measurement RF magnetic field is also applied in a second time different from both the particular time and the first time. Corrected NMR data is determined by subtracting the correction NMR data from second NMR data received in response to applying the second measurement RF magnetic field. Among other applications, these techniques allow distinguishing either fat or proteins in edemas, or both, from proteins in other tissues. | 2010-06-24 |
20100156414 | APPARATUS FOR HIGH-RESOLUTION NMR SPECTROSCOPY AND/OR IMAGING WITH AN IMPROVED FILLING FACTOR AND RF FIELD AMPLITUDE - The present invention concerns an apparatus ( | 2010-06-24 |
20100156415 | MAGNETIC RESONANCE DEVICE AND METHOD - MRI device arranged to a) generate a series of MR echo signals from a nuclear spin series having two or more spectral lines by subjecting at least part of a body ( | 2010-06-24 |
20100156416 | Method and apparatus for processing combined MR/emission tomography recordings - A method and an apparatus are disclosed for determining the effective count rate of photons in a combined MR/emission tomography recording. In at least one embodiment, the method includes capturing MR signals with an MR apparatus in an MR/emission tomography device for producing an MR recording of an examination object with a number of tissue types, each having a specific MR parameter; associating a number of emission tomography attenuation coefficients with the number of tissue types as a function of the MR parameter by way of an association unit, so that one emission tomography attenuation coefficient corresponds in each instance to at least one of the tissue types in the examination object; capturing photons in the examination object with an emission tomography apparatus in the MR/emission tomography device for producing an emission tomography recording; and weighting the emission tomography recording with the emission tomography attenuation coefficients by way of a correction apparatus for determining the effective count rate in the number of tissue types and for producing a corrected emission tomography recording. | 2010-06-24 |
20100156417 | SYSTEM AND METHOD FOR FAST MR IMAGING OF METABOLITES AT SELECTIVE EXCITATION FREQUENCIES - A system and method are provided for imaging multiple substances, such as contrast agents and metabolites in vivo, with selective excitation frequencies. A first substance is excited with a frequency selective pulse, then a second substance is excited with another frequency selective pulse. The signals resulting from these pulses are acquired in an order reversed from the order in which the pulses were applied. In some embodiments, more than two substances may be imaged. The system and method thus provide for quick and efficient utilization of the magnetization of multiple substances for spectral-spatial imaging. | 2010-06-24 |
20100156418 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - In order to stably obtain an even fat-suppressed image without reduction of an imaging efficiency and without being affected by unevenness of irradiation magnetic field of an RF pulse, when an imaging sequence having a first sequence part for suppressing a signal from a desired component of an examinee by applying a CHESS pulse and a second sequence part for measuring an echo signal from the examinee is repeated, the flip angle of the CHESS pulse is changed at plural times. In the case of multi-slice imaging, the flip angle of the CHESS pulse is changed in at lest two slice imaging. | 2010-06-24 |
20100156419 | MAGNETIC SENSING METHOD, ATOMIC MAGNETOMETER AND MAGNETIC RESONANCE IMAGING APPARATUS - A magnetic sensing method comprises irradiating a pump light having a circularly polarized component and a probe light having a linearly polarized component onto a group of atoms contained in a cell so as to make the lights produce an intersection region and detecting a change of rotation angle of a plane of polarization of the probe light before and after passing the cell. The pump light and the probe light are irradiated in a state where a magnetic field of the direction in which the pump light strikes the intersection region is provided with a gradient. | 2010-06-24 |
20100156420 | LOCAL COIL ARRANGEMENT FOR MAGNETIC RESONANCE APPLICATIONS AND PATIENT BED FOR A MAGNETIC RESONANCE SYSTEM, WITH INTEGRATED ELECTRICAL INTERFACES - A local coil arrangement for magnetic resonance applications has a mechanically dimensionally stable bearing element. A patient bed for a magnetic resonance system has a support surface to support a patient. In operation, the supporting element rests on the patient bed. In this state, it transfers the weight of the local coil arrangement to the patient bed. The local coil arrangement has at least one local coil to excite and/or to receive magnetic resonance signals. Furthermore, it has a multipole, prefabricated electrical interface via which the local coil can be electrically contacted. The electrical interface is arranged so as to be dimensionally stable at the bearing element. Positioning aids for the positioning of the local coil arrangement are arranged on the support surface. In the region of the positioning aids, a multipole, prefabricated electrical counter-interface is arranged so as to be mechanically dimensionally stable. By a corresponding positioning of the supporting element on the support surface of the patient bed, the weight of the local coil arrangement is transferred to the patient bed and the electrical interface is mechanically and electrically plugged into the electrical counter-interface. | 2010-06-24 |
20100156421 | METHOD AND DEVICE FOR DETERMINING A POSITION OF A LOCAL COIL IN A MAGNETIC RESONANCE APPARATUS - A device for determining the position of at least one local coil arranged or to be arranged on a patient bed of a magnetic resonance device has at least one optical coil marker arranged on the local coil, at least one optical sensor device to detect the coil marker, the field of view of the sensor device at least partially covering the patient bed in at least a recumbent position, and a computer that determines the coil position and/or coil orientation on the patient bed from measurement data of the sensor device. The computer can form a part of a control unit of the magnetic resonance device. | 2010-06-24 |
20100156422 | Automated transport device for NMR measuring samples, cryo-magnetic system with automated transport device, transport container for an automated transport device and method for conveying an NMR measuring sample - A transport device for conveying an object to be transported ( | 2010-06-24 |
20100156423 | Signal Transmitting and Receiving Circuit, a NMR Probe, and a Nuclear Magnetic Resonance Equipment - An object of the invention is to change over accurately the switch part between use condition and nonuse condition. A signal transmitting and receiving circuit | 2010-06-24 |
20100156424 | Robust Inversion Systems and Methods for Azimuthally Sensitive Resistivity Logging Tools - Methods and systems for determining the horizontal resistivity, vertical resistivity, and relative dip angle of anisotropic earth formations. Some of the disclosed methods and systems measure sinusoidal variation of azimuthally sensitive resistivity logging tool measurements, determine parameters representative of the sinusoidal variation, and perform inversion based on the sinusoidal parameters. When cast in this manner, the inversion process may yield more accurate and consistent resistivity and dip angle estimates. The sinusoidal parameters preferably take the form of average and peak-to-peak measurements, but may also take other forms. Moreover, use of such sinusoidal parameters enables a condensed representation of the resistivity logging tool measurements, enabling significantly more efficient communication and storage of these measurements. The condensed representations continue to enable directional boundary detection and geosteering. | 2010-06-24 |
20100156425 | METHOD FOR DETERMINING BATTERY INTERNAL RESISTANCE - A method of determining an internal resistance of a energy source that can be modeled as a voltage generator with a series resistance, such as but not limited to a battery or ultracapacitor. The internal resistance may be determined by averaging one or more weighting internal resistance values calculated from a number of sampled current and/or voltage measurement taken from the energy source. | 2010-06-24 |
20100156426 | APPARATUS AND METHOD FOR SENSING LEAKAGE CURRENT OF BATTERY, AND BATTERY-DRIVEN APPARATUS AND BATTERY PACK COMPRISING THE APPARATUS - An apparatus for sensing a leakage current of a battery comprises a floating capacitor charged with a voltage detected from a cathode or anode terminal of a battery; a terminal selection switching unit for selecting a voltage detection path for the cathode or anode terminal; a charge switching unit for charging the floating capacitor with a detection voltage of the cathode or anode terminal, detected through the selected voltage detection path; a polarity reverse switching unit for reversing a polarity of the detection voltage of the anode terminal charged to the floating capacitor; and a leakage current determining unit for sensing the detection voltage of the cathode terminal charged to the floating capacitor and the polarity-reversed detection voltage of the anode terminal charged to the floating capacitor to calculate a leakage resistance, and comparing the calculated leakage resistance with a criterion insulation resistance to determine whether a leakage current occurs. | 2010-06-24 |
20100156427 | Non-Metallic Flow-Through Electrodeless Conductivity Sensor and Leak Detector - A non metallic flow through electrodeless conductivity sensor is provided with a conduit having primary and secondary process fluid flowpaths to form a fluid loop. At least one drive and one sense toroid surround the conduit on the fluid loop. Voltage supplied to the drive toroid induces a current in the sense toroid via the fluid loop to eliminate any need for metallic electrodes in contact with the process fluid. At least one additional drive and/or sense toroid is disposed on the fluid loop to enhance induction. Optionally one or more sense coils are disposed about the conduit outside of the fluid loop to cancel out stray electrical noise. An optional conductor disposed along the conduit detects any fluid leakage through changes in resistance thereof. | 2010-06-24 |
20100156428 | FOIL-LEAF ELECTROMETER FOR STATIC FIELD DETECTION WITH PERMANENTLY SEPARATING LEAVES - An apparatus for detecting a static field includes two surfaces of conductive material that are (i) electrically coupled to each other, and adjacent to each other. The two surfaces repel each other in the presence of a static field. The conductive material has a deformation property such that stress caused by repulsion of the two surfaces from each other by at least a predetermined distance causes at least one of the surfaces to permanently deform. | 2010-06-24 |
20100156429 | MEMS ELECTROMETER THAT MEASURES AMOUNT OF REPULSION OF ADJACENT BEAMS FROM EACH OTHER FOR STATIC FIELD DETECTION - An apparatus for detecting a static field includes a microelectromechanical systems (MEMS) device having two cantilevered beams of conductive material that are adjacent and substantially parallel to each other. The two beams repel each other in the presence of a static field. At least one sensor detects a respective amount of displacement of the two cantilevered beams from a rest position and determines an amount of repulsion of the two cantilevered beams from each other. | 2010-06-24 |
20100156430 | Measuring instrument for photovoltaic systems - The present invention relates to a measuring instrument for a photovoltaic system; the system is of the type comprising at least one photovoltaic module (FM | 2010-06-24 |
20100156431 | TWISTED-PAIR ELECTRICAL CABLE TESTING - Methods and systems for cable inspection operate by generating a relative motion between an electrical cable including multiple wires and a magnetic field. An electrical signal induced in the wires is measured responsively to the magnetic field. A variation in the electrical signal is sensed due to the relative motion. In response to the variation, a defect is detected in the electrical cable. | 2010-06-24 |
20100156432 | Method for Checking an Inductive Load - A full-bridge circuit comprises a first, second, third and fourth switch element (T | 2010-06-24 |
20100156433 | ELECTRONIC DEVICE AND METHOD FOR WIRE CHECK - An electronic device is provided, which includes a current supplying stage which is adapted to supply a first compensation current and a second compensation current to a first wire or a second wire, wherein the first compensation current is determined during a first clock period, when the first wire and the second wire are connected. The second compensation current is determined during a second clock period while the first wire and the second wire are not connected and the magnitude of the second current represents a ratio of a resistance value of the first wire and a resistance value of the second wire. | 2010-06-24 |
20100156434 | Testing Apparatus - There is provided a testing apparatus including a plurality of test units, a storage that is shared by the plurality of test units, where the storage stores therein wafers under test to be tested by the plurality of test units, a transport mechanism that transports the wafers under test between the storage and each of the plurality of test units, a mainframe that specifies a test procedure for each of the plurality of test units, a power source that is shared by the plurality of test units, where the power source supplies power to each of the plurality of test units, and a pressure source that is shared by the plurality of test units, where the pressure source supplies a pressure to each of the plurality of test units. Here, each of the plurality of test units includes a test module that transmits and receives a test signal to/from a plurality of circuits formed on a wafer under test, a connector that connects together transmission paths of the test signal between the test module and the wafer under test, a holding member that brings the wafer under test into contact with the connector when supplied with the pressure, and a housing that houses therein the holding member and the connector, where the wafer under test is to be tested within the housing. | 2010-06-24 |
20100156435 | METHOD AND ARRANGEMENT FOR MONITORING CONNECTIONS OF SWITCH INTENDED FOR ACTIVATING SAFETY FUNCTION - A method and an arrangement are disclosed for monitoring connections of a switch intended for activating a safety function, the switch having at least two poles. The arrangement can supply voltages to first sides of two poles of the switch through first connections, and monitor the voltages supplied through the switch and further from second sides of the two poles of the switch to a device through second connections. The arrangement can form a voltage difference between the voltages to be supplied to the first sides of the two poles of the switch, and detect a connection failure when the difference between the voltages supplied to the device does not correspond with the formed voltage difference or when the difference between the voltages supplied to the device is substantially zero. | 2010-06-24 |
20100156436 | INTEGRATED CIRCUIT AND NOISE MEASURING METHOD - An internal circuit generates a digital signal according to an electric signal received from outside, and outputs the digital signal to an output signal line. An output circuit sets a voltage value of the digital signal to a prescribed value. A drive signal input circuit inputs a drive signal received from outside through a drive signal input terminal to the output circuit, and drives the output circuit independent of the digital signal according to the drive signal. | 2010-06-24 |
20100156437 | Apparatus and Methods of Demonstrating Cabling Performance in Real Time - Provided are apparatus and methods for demonstrating cable performance in real time. An apparatus may include a cable bundle of multiple disturber cables and a test cable arranged proximate one another, each coupled between a pair of data transceivers. A data loading device is configured to generate data for transmission across at least one of the disturber cables and the test cable, and a transmission data analyzer is configured to analyze data transmission performance of the test cable. | 2010-06-24 |
20100156438 | SPECTRUM ANALYZERS WITH DYNAMIC RANGE INDICATOR AND METHODS OF USE - An apparatus for measuring spectral components of a signal is described. The apparatus comprises a measurement acquisition unit configured to receive an input signal and to provide a measurement trace. The apparatus also comprises a model module configured to model one or more of a phase noise from the apparatus, a broadband noise from the apparatus, and a third order intermodulation (TOI) product from the apparatus. The apparatus also comprises a display configured to show one or more of the phase noise from the apparatus, the broadband noise from the apparatus, and the TOI product from the apparatus. | 2010-06-24 |
20100156439 | DIELECTRICITY MEASUREMENT DEVICE - A dielectricity measurement device and method for determining dielectric properties of portioned material of a capsule end package with the aid of an electrical field is described, where the device receives an electrically conductive package wall of the capsule end package as a component of the measurement arrangement and where the device maybe arranged into a series measurement device having several such dielectricity measurement devices. | 2010-06-24 |
20100156440 | Anti-Pinch Sensor - The invention relates to an anti-pinch sensor ( | 2010-06-24 |
20100156441 | Capacitive divider device, voltage sensor, trip device module and electrical protection apparatus provided with such a device - A multilayer capacitive divider comprising a first and second main electrode formed on the same level to apply an input voltage, and a common electrode formed on another level to supply an attenuated voltage, said device comprising at least a first auxiliary electrode formed on yet another level, said electrodes being arranged so as to form capacitive units, said auxiliary electrode extending towards a side of said device towards which the second main electrode is arranged so as to connect said auxiliary electrode to the second main electrode by means of a linear conductor. | 2010-06-24 |
20100156442 | PARAMETER EXTRACTION USING RADIO FREQUENCY SIGNALS - A set of parameters of an evaluation structure are extracted by applying a radio frequency (RF) signal through a first capacitive contact and a second capacitive contact to the evaluation structure. Measurement data corresponding to an impedance of the evaluation structure is acquired while the RF signal is applied, and the set of parameters are extracted from the measurement data. In an embodiment, multiple pairs of capacitive contacts can be utilized to acquire measurement data. Each pair of capacitive contacts can be separated by a channel having a unique spacing. | 2010-06-24 |
20100156443 | FUEL-ASPECT SENSOR - An object of the invention is to provide a fuel-aspect sensor having higher detection accuracy. A first electrode is inserted into a hole formed in a first housing member. A cylindrical second electrode is inserted into and firmly fixed to the first electrode by a cylindrical insulating member. A first elastic member, for example, made of rubber, is arranged between the first electrode and a second housing member. The first electrode has a large-diameter portion, which is biased by the first elastic member toward a sealing surface formed on an inner wall of the hole, so as to fluid-tightly seal a space between the first electrode and the second housing member. | 2010-06-24 |
20100156444 | MICROELECTRONIC DEVICE WITH HEATING ELECTRODES - The invention relates to different designs of a microelectronic device comprising heating electrodes (HE) and field electrodes (FE) that have effect in the same sub-region of a sample chamber. By applying appropriate voltages to the field electrodes (FE), an electrical field (E) can be generated in the sample chamber. By applying appropriate currents to the heating electrodes (HE), the sample chamber can be heated according to a desired temperature profile. The heating electrodes (HE) may optionally be operated as field electrodes such that they generate an electrical field in the sample chamber, too. | 2010-06-24 |
20100156445 | Apparatus and Method for Electrical Characterization by Selecting and Adjusting the Light for a Target Depth of a Semiconductor - The present disclosure provides methods and apparatus that enable characterization of an electrical property of a semiconductor specimen, e.g., dopant concentration of a near-surface region of the specimen. In exemplary method, a target depth for measurement is selected. This thickness may, for example, correspond to a nominal production thickness of a thin active device region of the specimen. A light is adjusted to an intensity selected to characterize a target region of the specimen having a thickness no greater than the target depth and a surface of the specimen is illuminated with the light. An AC voltage signal induced in the specimen by the light is measured and this AC voltage may be used to quantify an aspect of the electrical property, e.g., to determine dopant concentration, of the target region. | 2010-06-24 |
20100156446 | METHOD OF INSPECTING A SUBSTRATE - A method of inspecting a substrate includes measuring a first current flowing between a first region and a second region of the substrate using a first probe. A second current flowing between the first region and the second region of the substrate may be measured using a second probe including a material different from that of the first probe. By comparing the first and second currents, it can be determined whether there is a change in a physical composition of the substrate and a change in a physical configuration of the substrate between the first region and the second region. Thus, when the current change is induced by the change in a physical configuration of the substrate, a determination error that the contaminants on the semiconductor substrate may exist based on the current change may be prevented. | 2010-06-24 |
20100156447 | Method for Calibrating a Transmission Line Pulse Test System - Calibration method for calibrating transient behaviour of a TLP test system. The system comprises a TLP generator, probe needles, nominally impedance matched transmission lines and measurement equipment, connected between the transmission lines and the TLP generator, for detecting transient behaviour of a device under test by simultaneously capturing voltage and current waveforms as a result of generated pulses. The calibration method comprises (a) applying the TLP test system on an open and capturing first voltage and current waveforms; (b) applying the TLP test system on a calibration element having a known finite impedance and a known transient response and capturing second voltage and current waveforms; (c) transforming the captured first and second current and voltage waveforms to the frequency domain, and (d) determining calibration data for the transient behaviour of the TLP test system on the basis of the transformed first and second voltage and current waveforms. | 2010-06-24 |
20100156448 | FLASH STORAGE DEVICE AND METHOD AND SYSTEM FOR TESTING THE SAME - A flash storage device and a testing method and a testing system for the flash storage device are provided. The testing system includes a testing apparatus and the flash storage device. The flash storage device includes a controller, a flash memory module, a plurality of peripheral pins and at least one test pin. The flash storage device receives an enable signal transmitted from the testing apparatus through the test pin. Subsequently, the controller outputs a signal to the testing apparatus through each peripheral pin based to the enable signal. Finally, the testing apparatus verifies the signal outputted by each peripheral pin. | 2010-06-24 |
20100156449 | PROBE CARD - An embodiment of a probe card comprising: a probe base plate including a ceramic base plate and a plurality of conductive paths; and a plurality of contacts disposed on one face of the probe base plate and electrically connected to the conductive paths. The ceramic base plate may be provided with: a plurality of first layers having a heating element which generates heat by electric power and disposed at intervals in the thickness direction of the ceramic base plate; second layers each interposed between adjoining first layers; and a power supply path for supplying electric power for heating to the heating element. | 2010-06-24 |
20100156450 | Enabling higher operation speed and/or lower power consumption in a semiconductor integrated circuit device - A semiconductor integrated circuit device | 2010-06-24 |
20100156451 | METHOD AND SYSTEM FOR MEASURING LASER INDUCED PHENOMENA CHANGES IN A SEMICONDUCTOR DEVICE - A method and system for measuring laser induced phenomena changes of at least one of a resistance, a capacitance and an inductance in a semiconductor device. The method comprises applying a biasing voltage from an emitter-follower circuit to a device under test (DUT); inducing said changes in the DUT; and measuring a voltage change in a collector portion of the emitter-follower circuit as a measure for said changes. | 2010-06-24 |
20100156452 | TESTING APPARATUS AND METHOD FOR TESTING A SEMICONDUCTOR DEVICES ARRAY - A testing apparatus and a method for testing a semiconductor devices array, which includes a plurality of rows and a plurality of columns, are provided. The testing apparatus includes a first testing circuit and a second testing circuit. The first testing circuit connects and transmits a clock signal, an input command signal and a data signal to at least one of the rows of the semiconductor devices array. The second testing circuit connects and transmits a selecting signal to at least one of the columns of the semiconductor devices array. Between two devices in a row, a difference in arrival times of the clock signal, a difference in arrival times of the input command signal, and a difference in arrival times of the data signal are equal. | 2010-06-24 |
20100156453 | Accurate Capacitance Measurement for Ultra Large Scale Integrated Circuits - Test structures and methods for measuring contact and via parasitic capacitance in an integrated circuit are provided. The accuracy of contact and via capacitance measurements are improved by eliminating not-to-be-measured capacitance from the measurement results. The capacitance is measured on a target test structure that has to-be-measured contact or via capacitance. Measurements are then repeated on a substantially similar reference test structure that is free of to-be-measured contact or via capacitances. By using the capacitance measurements of the two test structures, the to-be-measured contact and via capacitance can be calculated. | 2010-06-24 |
20100156454 | Hot-Electron Injection Testing of Transistors on a Wafer - A hot-carrier injection (HCI) test that permits rapid screening of integrated circuit wafers susceptible to possible HCI-induced failures is disclosed. A method is described that determines transistor stress voltages that results in a transistor HCI-induced post-stress drain current differing from a pre-stress drain current within a desired range. These stress voltages are determined using a wafer with acceptable HCI susceptibility. Additional wafers to be tested are first tested using a described method that uses the determined transistor stress voltages to quickly screen the wafers for HCI susceptibility and, if HCI susceptibility is found, then additional conventional HCI testing may be applied to the susceptible wafers. | 2010-06-24 |
20100156455 | IMPEDANCE CALIBRATION PERIOD SETTING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - An impedance calibration period setting circuit includes a command decoder and an impedance calibration activation signal generator. The command decoder combines external signals to generate a refresh signal. The impedance calibration activation signal generator is configured to generate an impedance calibration activation signal in response to the refresh signal and an address signal. The impedance calibration period setting circuit prevents abnormal changes in an impedance calibration code and reduces current consumption. | 2010-06-24 |
20100156456 | Integrated Circuit with Delay Selecting Input Selection Circuitry - Some embodiments provide an integrated circuit (IC) with a delay select input selection circuit. The delay select input selection circuit comprises a first input selection circuit, a first storage element, a second storage element, and a first input line branching into multiple input lines. The multiple input lines include at least a second, third, and fourth input line. The second input line is communicably connected to a first input of the first input selection circuit. The third input line enters the first storage element. The fourth input line enters the second storage element. An output from the first storage element is communicably connected to a second input of the first input selection circuit. An output from the second storage element is communicably connected to a third input of the first input selection circuit. | 2010-06-24 |
20100156457 | PLD PROVIDING SOFT WAKEUP LOGIC - A programmable logic device (PLD) with a plurality of programmable regions is disclosed. Some of the programmable regions have switch power or ground supplies to allow them to be put into a low-power state in one or more low-power modes. At least one of the programmable regions always remains on during the low-power modes to enable the user to design custom PLD power management logic that may be placed in the always-on programmable region. | 2010-06-24 |
20100156458 | PROGRAMMABLE LOGIC DEVICE WITH PROGRAMMABLE WAKEUP PINS - A programmable logic device (PLD) adapted to enter a low-power or sleep mode with programmable wakeup pins in a wakeup group of pins is disclosed. Wake on a single pin change, wake on vector, and wake on a single pin transition are supported. The approach is to select the actively participating pins, enable the desired operation, define the wakeup condition, enter sleep mode, monitor the external signals coupled to the active pins, and exit sleep mode when the wakeup condition is detected. | 2010-06-24 |
20100156459 | PROGRAMMABLE DELAY LINE COMPENSATED FOR PROCESS, VOLTAGE, AND TEMPERATURE - A delay line compensated for process, voltage, and temperature variations, includes a delay locked loop (DLL) configured to delay a digital signal by the clock period of the digital signal, the DLL including a DLL delay line arranged as a plurality of cascaded sub-delay lines each sub-delay line providing one of a plurality of delay quanta in response to a digital control signal. A fractionating circuit is configured to generate a digital delay line control signal that is a fraction of the digital control signal. A digital delay line is arranged as a plurality of cascaded sub-delay lines each sub-delay line providing one of a plurality of delay quanta in response to the digital delay line control signal. | 2010-06-24 |
20100156460 | (N+1) INPUT FLIP-FLOP PACKING WITH LOGIC IN FPGA ARCHITECTURES - A logic module and flip-flop includes input multiplexers having data inputs coupled to routing resources. A clock multiplexer has inputs coupled to clock resources, and an output. An input-select multiplexer has a first input coupled to the output of an input multiplexer. A flip-flop has a clock input coupled to the output of the clock multiplexer, and a data output coupled to an input of the input-select multiplexer. A logic module has data inputs coupled to the output of the input select multiplexers. A flip-flop multiplexer is coupled to the data input of the flip-flop, and has inputs input coupled to the output of the first input multiplexer, the data output of the logic module, and a third input coupled to routing resources. | 2010-06-24 |
20100156461 | PERMUTABLE SWITCHING NETWORK WITH ENHANCED INTERCONNECTIVITY FOR MULTICASTING SIGNALS - In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc. | 2010-06-24 |
20100156462 | PROGRAMMABLE LOGIC ARRAY AND PROGRAMMABLE LOGIC ARRAY MODULE GENERATOR - A PLA contains an input plane ( | 2010-06-24 |
20100156463 | PRE-DRIVER LOGIC - At least one of the disclosed systems includes driver logic that is capable of driving a device and pre-driver logic coupled to the driver logic and that drives the driver logic. If the pre-driver logic receives an input signal of a first type, the pre-driver logic activates a first transistor such that the pre-driver logic provides an output signal. If the pre-driver logic receives an input signal of a second type, the pre-driver logic activates a second transistor and a third transistor that together cause the pre-driver logic to provide a different output signal. If the third transistor is not activated, the pre-driver logic provides the output signal. | 2010-06-24 |
20100156464 | REDUCED CURRENT INPUT BUFFER CIRCUIT - There is provided a reduced current input buffer circuit. More specifically, in one embodiment, there is provided an input buffer circuit comprising an input buffer that is adapted to draw an operating current, means for providing a first portion of the operating current to the input buffer, and means for providing a second portion of the operating current to the input buffer if the input buffer is expecting data. | 2010-06-24 |
20100156465 | APPARATUS AND METHOD FOR USE WITH QUADRATURE SIGNALS - Embodiments of the present invention provide a current mode logic circuit, comprising first and second differential switching stages, each stage arranged being arranged to receive a plurality of clock signals, such that the first and second differential switching stages respond to a combination of the plurality of clock signals. | 2010-06-24 |
20100156466 | Implementing Power Savings in HSS Clock-Gating Circuit - A power saving clock-gating method and a power saving clock-gating circuit for implementing power savings in High Speed Serializer-deserializer (HSS) cores, and a design structure on which the subject circuit resides are provided. The power saving clock-gating circuit includes a clock gate signal used to initiate the starting and stopping of the C2 clocks. The clock gate signal is applied to a first latch of plurality of current-mode logic latches in a clock gate aligner block, which provides clock gate aligned signal to synchronously start a C2 clock generator. A power savings logic circuit generates a power down signal to turn off the plurality of current-mode latches and predefined clock buffers after the C2 clocks have been started, and then responsive to a changed state of the clock gate signal to turn on the predefined clock buffers and the plurality of current-mode logic latches to begin another synchronous start operation. | 2010-06-24 |
20100156467 | CONTROL SYSTEM FOR DIFFERENT COLORS OF LIGHT EMITTING DIODES - A control system includes a clock unit for providing a first clock signal, and a second clock signal having a frequency lower than that of the first clock signal. Three control units are coupled respectively to three light emitting diodes (LED) emitting respectively three different colors. Each control unit is operable based on the clock signals and a corresponding set of first and second reference values to output a driving pulse signal to a corresponding LED such that the corresponding LED is driven by the driving pulse signal to emit light during a corresponding one of first, second and third time periods of a control cycle of the control system. | 2010-06-24 |
20100156468 | Even-number-stage pulse delay device - The even-number-stage pulse delay includes a ring delay line constituted of an even number of inverter circuits connected in a ring around which main edge and a reset edge circulate together. The even-number-stage pulse delay is provided with an operation monitoring section configured to detect whether or not the main and reset edges are circulating around the ring delay line. | 2010-06-24 |
20100156469 | HIGH-SPEED MULTI-STAGE VOLTAGE COMPARATOR - A high-speed multi-stage voltage comparator is provided. The multi-stage voltage comparator is configured to eliminate offset from outputs of preamplifiers through respective offset-cancellation switches, and to reset the outputs of the preamplifiers through respective reset switches to reduce an output recovery time. Thus, the multi-stage voltage comparator operates with high accuracy and at a high speed, so that it can be usefully applied to an analog-to-digital converter (ADC), and particularly, a high-speed successive approximation register ADC (SAR ADC). | 2010-06-24 |
20100156470 | VOLTAGE DETECTOR DEVICE AND METHODS THEREOF - A voltage detector device is disclosed that includes a coarse-range voltage detector and a fine-range voltage detector. The fine-range voltage detector is configured to remain inactive, so that it consumes a relatively small amount of power, while a monitored voltage is outside a first specified range. In response to determining that the monitored voltage is within the first specified range, the coarse-range voltage detector activates the fine-range voltage detector so that it can monitor the voltage. In response to the fine-voltage monitor determining the voltage falls within a second specified range, the fine-range voltage detector provides a signal to a functional module of an electronic device so that the functional module can provide a defined response, such as executing an interrupt routine. | 2010-06-24 |
20100156471 | SCALABLE COST FUNCTION GENERATOR AND METHOD THEREOF - A cost function generator circuit includes memory terms each receiving one or more input signals, and each providing inphase and quadrature output current signals. The inphase and quadrature output currents of the memory terms are summed to provide combined inphase and quadrature output currents, respectively. Transimpedance amplifiers are provided to transform the combined inphase and quadrature output currents into an inphase output voltage and a quadrature output voltage. | 2010-06-24 |
20100156472 | Transversal Agile Local Oscillator Synthesizer - A representative integrated circuit comprises a clock signal generator that generates a clock signal, a code pattern generator that generates digital pattern data based on the clock signal, and a transversal digital-to-analog conversion (T-DAC) unit that includes a plurality of registers and a unary modulator (Umod) array. The T-DAC unit provides frequency selection ranges covering wide operational bands based on the digital pattern data and the clock signal. | 2010-06-24 |
20100156473 | CLCOK DRIVER CIRCUIT - Clock driver circuit having upper and lower transistors | 2010-06-24 |
20100156474 | GATE DRIVE CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME - A gate drive circuit includes m stages cascade connected to one another, each stage respectively outputting one of a plurality of gate signals. An m-th stage includes a pull-up part, a pull-down part, a boost-up part, a first maintenance part and a second maintenance part. The pull-up part outputs a high voltage of a first clock signal at the high voltage of an m-th gate signal. The pull-down part applies a low voltage to an output node of the pull-up part. The boost-up part boosts a voltage charged by an offset second clock signal. The first maintenance part maintains the first node at a low voltage in response to the boosted voltage of the second node. In addition, the second maintenance part maintains the m-th gate signal at the low voltage in response to the high voltage of the first clock signal. | 2010-06-24 |
20100156475 | FIELD EFFECT TRANSISTOR WITH ELECTRIC FIELD AND SPACE-CHARGE CONTROL CONTACT - A group III nitride-based transistor capable of achieving terahertz-range cutoff and maximum frequencies of operation at relatively high drain voltages is provided. In an embodiment, two additional independently biased electrodes are used to control the electric field and space-charge close to the gate edges. | 2010-06-24 |
20100156476 | SYSTEMS AND METHODS FOR PROVIDING A CLOCK SIGNAL - Systems and methods for providing a clock signal are provided. A frequency multiplier circuit is provided that can include a plurality of serially connected delay elements that are configured to generate a plurality of delay tap signals from an input signal. The frequency multiplier circuit can also include a phase detector configured to receive a first selected delay tap signal and the input signal. The phase detector can detect a phase shift between the first selected delay tap signal and the input signal, and can generate a phase detection signal indicative of a value of the phase shift. The frequency multiplier circuit can also include a digital logic gate configured to receive the input signal and a second selected delay tap signal. The digital logic gate can be further configured to generate an output signal responsive to the second selected delay tap signal and the input signal. The frequency multiplier circuit can also include a controller coupled to the phase detector and coupled to an output gate. The controller can be configured to receive the phase detection signal and to enable the output gate when the value of the phase shift corresponds to a predetermined value. The output gate can provide the output signal when enabled. | 2010-06-24 |
20100156477 | BANDGAP REFERENCED POWER ON RESET (POR) CIRCUIT WITH IMPROVED AREA AND POWER PERFORMANCE - In an apparatus for monitoring a supply voltage, a current mirror coupled to the supply voltage provides a pair of matching currents. A resistor divider that includes a first resistor coupled in series with a second resistor to from a first node is disposed between the supply voltage and a voltage reference. A pair of transistors that have their bases coupled to the first node are coupled to receive a corresponding one of the pair of matching currents. A collector of a first transistor of the pair of transistors provides an output voltage in response to the supply voltage. A third resistor is disposed between an emitter of a second transistor of the pair of transistors and the voltage reference. A base and a collector of a third transistor are coupled to the first node and an emitter is coupled to the voltage reference. | 2010-06-24 |
20100156478 | ELECTRONIC DEVICE AND SIGNAL GENERATOR THEREOF - An electronic device includes a signal generator and a processing module. The signal generator generates reset signals to reset the processing module. The signal generator includes a first capacitor, a second capacitor, and a switching unit. The first capacitor receives an input voltage and charges accordingly when the electronic device is powered on. The second capacitor generates the reset signals based on the input voltage. The switching unit transmits the input voltage to the second capacitor to charge the second capacitor when the electronic device is powered on, and grounds the second capacitor after the electronic device is powered off. The reset signals are generated during the charging and discharging process of the second capacitor. | 2010-06-24 |
20100156479 | POWER-ON RESET CIRCUIT AND ADJUSTING METHOD THEREFOR - A power-on reset circuit includes a detection-voltage producing circuit that produces a detection voltage proportional to a power-supply voltage, and a power-on determining circuit that activates a power-on reset signal when a detection voltage is less than the power-on determining voltage and inactivates the power-on reset signal when the detection voltage is equal to or greater than the power-on determining voltage. In the detection-voltage producing circuit, a fuse element used for adjusting a proportional constant between a power-supply voltage and the detection voltage is arranged. Thereby, the power-on determining voltage becomes adjustable. Accordingly, the power-on determining voltage can be made closer to a design value when there is a deviation from the design value in the power-on determining voltage after the semiconductor device is manufactured. | 2010-06-24 |
20100156480 | Control signal generation circuit - A control signal generation circuit includes a pulse signal generator configured to delay a column control signal by delay times different from each other and to generate first and second pulse signals, a reset signal generator configured to transfer alternatively the first and second pulse signals as a reset signal in response to a write/read flag signal, and a write-enable signal generator configured to generate a write-enable signal from the first pulse signal in response to the write/read flag signal. | 2010-06-24 |
20100156481 | SYNCHRONIZATION SCHEME WITH ADAPTIVE REFERENCE FREQUENCY CORRECTION - The present invention relates to an apparatus and method for providing synchronization of an output signal to a synchronization information. The synchronization is accomplished by providing coupling of a correction control information that controls a signal generating means, e.g. a phase locked loop arrangement ( | 2010-06-24 |
20100156482 | MEANS TO DETECT A MISSING PULSE AND REDUCE THE ASSOCIATED PLL PHASE BUMP - A phase/frequency locked loop (PLL) includes circuitry adapted to detect missing pulses of a reference clock and to control the phase bump of the PLL. The circuitry includes, in part, first and second flip-flops, as well as a one-shot block. The first flip-flop has a data input terminal responsive to a voltage supply, and a clock terminal responsive to an inverse of feedback clock. The second flip-flop has a data input terminal responsive to an output of the first flip-flop, and a clock terminal responsive to the inverse of the feedback clock. The one-shot block generates a pulse in response to a rising edge of the reference clock that is used to generate the feedback clock. The one-shot block generates an output signal applied to a reset terminal of the first flip-flop. | 2010-06-24 |
20100156483 | DELAY LOCKED LOOP CIRCUIT - The disclosure relates to phase detectors. Charge up and charge down signals that are generated by a phase detector cause i) following detection of a first edge of a reference clock signal, switching on of a switching transistor of sink current; ii) following detection of an edge of a feedback clock signal falling within less than 180 degrees from the first edge, switching on of a switching transistor of source current and switching off of the switching transistor of sink current; and iii) following detection of an edge of another reference signal at a point in time about midway between the first edge and a next similar edge of the reference clock signal has past, switching off of the switching transistor of source current while maintaining the switching transistor of sink current switched off. | 2010-06-24 |
20100156484 | FAST-RESPONSE PHASE-LOCKED LOOP CHARGE-PUMP DRIVEN BY LOW VOLTAGE INPUT - Phase-locked loop charge pump driven by low voltage input. In one aspect, a phase-locked loop circuit includes a phase frequency detector operating at a low voltage and providing low-voltage sourcing control signals and low-voltage sinking control signals at the low voltage. A charge pump operates at a high voltage and includes a sourcing control circuit coupled to the low-voltage sourcing control signals and selectively causing the charge pump to source the sourcing current to an output of the charge pump based on the low-voltage sourcing control signals. The charge pump also includes a sinking control circuit that receives the low-voltage sinking control signals and selectively causes the charge pump to sink the sinking current from the output of the charge pump based on the low-voltage sinking control signals. | 2010-06-24 |
20100156485 | DELAY ELEMENT ARRAY FOR TIME-TO-DIGITAL CONVERTERS - Embodiments of the present disclosure provide methods, systems, and apparatuses related to a delay element array for time-to-digital converters. Some embodiments include a voltage controlled oscillator; a time-to-digital converter including a delay element array to output delayed versions of a signal and logic to generate a digital word that represents phase information of the signal based at least in part on the delayed versions; and a phase detector to generate a digital phase error based at least in part on the digital word. Other embodiments may be described and claimed. | 2010-06-24 |
20100156486 | DLL CIRCUIT HAVING ACTIVATION POINTS - A delay locked loop (DLL) circuit includes a delay line configured to generate a delay clock signal by delaying a reference clock signal in response to a delay control signal, the delay line having two or more initial activation points, wherein the initial activation points are selected according to an initial value of the delay control signal; a delay compensating unit configured to generate a feedback clock signal by delaying the delay clock signal for a predetermined time; a phase detecting unit configured to generate a phase detection signal by comparing a phase of the reference clock signal to a phase of the feedback clock signal; and a delay control unit configured to generate the delay control signal in response to the phase detection signal. | 2010-06-24 |
20100156487 | DLL CIRCUIT - A delay locked loop (DLL) circuit includes a clock input buffer that generates a reference clock signal by buffering an external clock signal and outputs the reference clock signal by correcting a duty cycle of the reference clock signal in response to a duty cycle control signal. The DLL circuit also includes a timing compensation unit configured that generates a compensation reference clock signal by compensating for a toggle timing of the reference clock signal that is changed during the duty cycle correction operation in response to a timing control signal. The DLL circuit further includes and a duty cycle control unit that generates the duty cycle control signal and the timing control signal by detecting the duty cycle of the reference clock signal. | 2010-06-24 |
20100156488 | DELAY-LOCKED LOOP CIRCUIT CONTROLLED BY COLUMN STROBE WRITE LATENCY - The DLL circuit includes a control circuit which controls bias currents of the unit delay circuits according to an externally input column address strobe writing latency (CWL) signal, and/or a DCC control circuit which adjusts steps of a DCC current of the DCC according to the externally input column address strobe writing latency (CWL) signal. The CWL signal may be input by a semiconductor memory device and may be indicative of a column address strobe writing latency of the semiconductor memory device. The semiconductor memory device may be a double data rate (DDR) synchronous DRAM (SDRAM) device. | 2010-06-24 |
20100156489 | DLL CIRCUIT, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND DATA PROCESSING SYSTEM - To provide a DLL circuit including: a first phase determination circuit that compares phases of rising edges of an external clock and a first internal clock; a second phase determination circuit that compares phases of falling edges of the external clock and the first internal clock; an adjusting unit that adjusts positions of active edges of internal clocks based on determination results; and a control circuit that sets one of adjustment amounts of the second and third internal clocks to a larger value than the other, in response to a fact that adjustment directions of the active edges of the second and third internal clocks are mutually the same. With this arrangement, a duty can be set nearer to 50% while performing phase adjustment. Accordingly, the time required to lock the DLL circuit can be shortened. | 2010-06-24 |
20100156490 | DELAY CIRCUIT - Disclosed is a delay circuit. The delay circuit includes a pulse generating unit, a timing adjusting unit, and a pulse width adjusting unit. The pulse generating unit is configured to generate a pulse signal having a preset width in response to a rising edge of an input signal. The timing adjusting unit is configured to activate an output signal in response to the pulse signal after a predetermined time has lapsed. The pulse width adjusting unit is configured to adjust a pulse width of the output signal in response to the activation of the output signal. | 2010-06-24 |
20100156491 | VOLTAGE CONVERTERS AND VOLTAGE GENERATING METHODS - A voltage converter is provided. The voltage converter generates an output voltage signal and comprises a controller, a wave generator, a comparator, and a voltage converting unit. The controller generates a control voltage signal according to the output voltage signal and a first reference voltage. The wave generator generates a saw-wave signal and modifies at least one of an upper limit and a lower limit of a waveform of the saw-wave signal according to the output voltage signal. The comparator generates a pulse width modulation (PWM) signal according to the control voltage signal and the saw-wave signal. The voltage converting unit generates the output voltage signal according to the PWM signal. | 2010-06-24 |
20100156492 | SYSTEM AND METHOD FOR THERMAL LIMIT CONTROL - This disclosure relates to a system and method for pulse generation. A system in accordance with the present disclosure may include a power dissipating element configured to receive power from a power source. At least one of the power source and the power dissipating element may be configured to generate a first signal. The system may further include a measuring instrument in communication with the power source. The measuring instrument may be configured to measure the first signal and to provide an input corresponding to a measured signal to a duty cycle limiter. The system may also include a pulse controller operatively connected to the power source. The pulse controller may be configured to control a duty cycle of the first signal and to receive a second signal from the duty cycle limiter. The pulse controller may be configured to disable at least one of the power source and the power dissipating element if the duty cycle limiter has determined that a maximum condition has been exceeded. Other embodiments are also within the scope of the present disclosure. | 2010-06-24 |
20100156493 | Circuit device to produce an output signal including dither - In a particular embodiment, a circuit device includes a count zero circuit having a first counter to receive a clock signal and to produce a count zero signal based on the clock signal and having a second counter to generate a reset control signal to control a reset of the count zero circuit. The circuit device further includes a turnoff circuit to receive the clock signal and to produce a turn off signal based on the clock signal. Further, the circuit device includes a pulse width modulated (PWM) latch circuit adapted to produce a gate drive signal based on the count zero signal and the turn off signal, where timing of an edge of the gate drive signal varies based on the reset control signal. | 2010-06-24 |