25th week of 2012 patent applcation highlights part 76 |
Patent application number | Title | Published |
20120159161 | AUTHENTICATION APPARATUS AND METHOD FOR NON-REAL-TIME IPTV SYSTEM - An authentication apparatus for a non-real-time IPTV system decrypts a first encrypted value included in a contents request message received from a device using a preset session key, and then verifies the validity of the contents request message. If the verification results of the contents request message are valid, the authentication apparatus encrypts a variation between timestamps of the authentication apparatus and the device using the session key, and then generates a second encrypted value. After verification information by which the device is capable of verifying the authentication apparatus has been generated using the second encrypted value, the authentication apparatus sends verification information, together with contents corresponding to the contents request message, to the device. | 2012-06-21 |
20120159162 | PREVENTING RACE CONDITIONS IN SECURE TOKEN EXCHANGE - The present invention relates to methods and systems for preventing race conditions in secure token conversations. The method includes generating a message from a client application to a server application, determining that a first secure conversation token (SCT) exists, and using the first SCT to encrypt the message. The method further includes sending the encrypted message to the server, receiving an indication that the first SCT has expired, and initiating an SCT renew request. The method includes storing the first SCT, receiving a second SCT in response to the SCT renew request, and storing the second SCT in addition to the first SCT. The method further includes retrieving an encrypted message, determining that the encrypted message has been encrypted using the first SCT, in response to the determination, using the first SCT to decrypt the message, and generating a response from the server to the client. | 2012-06-21 |
20120159163 | LOCAL TRUSTED SERVICES MANAGER FOR A CONTACTLESS SMART CARD - Systems, methods, computer programs, and devices are disclosed herein for deploying a local trusted service manager within a secure element of a contactless smart card device. The secure element is a component of a contactless smart card incorporated into a contactless smart card device. An asymmetric cryptography algorithm is used to generate public-private key pairs. The private keys are stored in the secure element and are accessible by a trusted service manager (TSM) software application or a control software application in the secure element. A non-TSM computer with access to the public key encrypts and then transmits encrypted application data or software applications to the secure element, where the TSM software application decrypts and installs the software application to the secure element for transaction purposes. | 2012-06-21 |
20120159164 | MESSAGE-HANDLING SERVER AND METHOD FOR HANDLING SECURE MESSAGE ATTACHMENTS FOR A MOBILE DEVICE - A secure message that includes an attachment is received at a server. The secure message may have a secure layer that indicates that the secure message is at least digitally signed. The secure message may be provided without the attachment to the mobile device over a wireless network. A request may be received from the mobile device to access the attachment. The request may include an attachment identifier (ID) that identifies the attachment in accordance with a message-attachment indexing system. In response to the request to access the attachment, the server may perform an index lookup to find the attachment based upon the attachment ID, may look through the secure layer of the secure message in order to locate the attachment within the secure message, and may render at least an initial portion of the attachment by the server in a format for viewing by the mobile device. | 2012-06-21 |
20120159165 | Protecting Computers Using an Identity-Based Router - A router is placed between a protected computer and devices with which the computer communicates, including peripherals and other computers. The router includes a list of authorized devices that are permitted to send data to the protected computer, against which requests to send data are checked. The router also communicates with a remote authentication service to authenticate devices requesting such permission. The authentication service may be a cloud-based identity service. | 2012-06-21 |
20120159166 | METHOD OF VERIFYING KEY VALIDITY AND SERVER FOR PERFORMING THE SAME - Disclosed herein is a method of verifying key validity and a server for performing the method. The method is configured such that a service provision server verifies key validity in an anonymous service for providing local linkability. The service provision server receives a revocation list. A local revocation list is generated using the received revocation list and a secret key. A virtual index of a service user required to verify key validity is calculated. Whether a key of the service user is valid is verified, based on whether the virtual index is included in the local revocation list. | 2012-06-21 |
20120159167 | METHOD AND APPARATUS FOR AUTHENTICATING PER M2M DEVICE BETWEEN SERVICE PROVIDER AND MOBILE NETWORK OPERATOR - A system is capable of authenticating a service per Machine to Machine (M2M) device between an M2M service provider and a mobile communication operator. The system includes an authentication server for generating an M2M device IDentifier (ID), a first authentication key, and an M2M service provider ID per M2M device, The authentication server also generates a second authentication key, a first hash function value, and a first random variable based on the M2M device ID, the first authentication key, and the M2M service provider ID. and transmitting the second authentication key, the first hash function, and the first random variable to an M2M agent to an M2M agent. | 2012-06-21 |
20120159168 | AUTHENTICATED COMMUNICATION ASSOCIATION - A computer based system enables secure communication between children. A first child requests to form a buddy association with another child using a computer connected to a server using a network. The server provides the first child with a passcode, which the first child gives a second child, in person. The second child then completes the request on a computer connected to the server, and provides the passcode to form the association. Parents or guardians are notified that the children have formed an association, and may thereafter supervise the association. | 2012-06-21 |
20120159169 | BIDIRECTIONAL ENTITY AUTHENTICATION METHOD WITH INTRODUCTION OF ONLINE THIRD PARTY - An entity bidirectional authentication method by introducing an online third party includes the following steps: 1) an entity B sends a message | 2012-06-21 |
20120159170 | METHOD OF AUTHENTICATING VEHICLE COMMUNICATION - A vehicle communication authentication system performs mutual authentication with an authentication subject by performing a user subscriber identify module (USIM)-based authentication protocol in a wireless network, mounts a USIM card in which mutual authentication is succeeded in a vehicle terminal, and performs authentication of vehicle communication with a server that provides a vehicle service. | 2012-06-21 |
20120159171 | METHOD AND SYSTEM FOR ACTIVATING A PORTABLE DATA CARRIER - The invention relates to a method for activating a portable data carrier ( | 2012-06-21 |
20120159172 | SECURE AND PRIVATE LOCATION - Systems and methods of restricting access to mobile platform location information may involve receiving, via a link, location information for a mobile platform at a processor of the mobile platform, and preventing unauthorized access to the location information by an operating system associated with the mobile platform. | 2012-06-21 |
20120159173 | SERVICE KEY DELIVERY SYSTEM - A Service Key Delivery (SKD) system for delivering a service keys to client devices in a communications network. The delivered service keys are operable to be used to decrypt an encrypted key operable to be used to decrypt an encrypted digital content. The SKD system includes a data input interface for receiving a distribution time frame for the keys and a listing of client device identifications. The SKD system also includes a scheduling module to partition at least part of the distribution time frame into a number of time slots in which the number may be based on a variety of factors. The scheduling module assigns the time slots in the partitioned part of the distribution time frame to the client devices based on the identifications in the listing. The SKD system also includes a message generator configured to send key delivery messages to the client devices. | 2012-06-21 |
20120159174 | System and Method for Conveying Session Information for Use in Forensic Watermarking - Methods for providing content session information using a content manager, streaming server, and one or more watermarking devices are disclosed. A content asset is also disclosed. The content asset may include content. In addition, the content asset may include a content data field having forensic watermark information, e.g. session or identifying information. In one aspect, the content asset is compressed and the compressed content asset has one or more pre-processed candidate watermark locations. In this aspect, the forensic watermark information may be extracted, e.g. by a watermarking device, from the content data field and included in the one or more pre-processed candidate watermark locations. | 2012-06-21 |
20120159175 | Deduplicated and Encrypted Backups - A system and method for efficiently creating deduplicated and encrypted data across a plurality of computers allows local encryption and remote storage of deduplicated segments. Large data blocks may be divided into segments of data, and encrypted using a two-step process. A standard hash of the encrypted segment is used as an index into a remote deduplicated database so that only unique data segments are stored, and are stored only in encrypted form. When retrieving data, a data owner uses the stored digest to retrieve the data from the deduplicated database and the stored IV and second key to decrypt the data. Only the data owner has the second key and IV, so the encrypted data segment stored data in the deduplicated database is highly secure from information bleed during the storage process. | 2012-06-21 |
20120159176 | Method and Apparatus to Create and Manage Virtual Private Groups in a Content Oriented Network - A content router for managing content for virtual private groups in a content oriented network, the content router comprising storage configured to cache a content from a customer in a content oriented network (CON), and a transmitter coupled to the storage and configured to forward the content upon request, wherein the content is signed by the user, wherein the CON provides different security levels for different users in a plurality of users, and wherein the plurality of users correspond to a plurality of user classes. | 2012-06-21 |
20120159177 | System and Method for Website Authentication Using a Shared Secret - A web site can be authenticated by a third party authentication service. A user designates an authentication device that is a shared secret between the user and the authentication service. A web site page includes a URL that points to the authentication service. The URL includes a digital signature by the web site. When the user receives the page, the user's browser issues a request to the authentication service, which attempts to authenticate the digital signature. If the authentication is successful, it sends the authentication device to the user computer. | 2012-06-21 |
20120159178 | PROVIDING SECURITY SERVICES ON THE CLOUD - Embodiments are directed to the providing a cloud keying and signing service and to securing software package distribution on the cloud. In an embodiment, a computer system instantiates a signing service configured to sign software packages. The computer system receives a signing request from a computer user requesting that a selected software package be signed. The signing request includes a computed hash of the selected software package. The computer system generates a private and public key pair on behalf of the computer user and stores the private key of the generated key pair in a secure data store. | 2012-06-21 |
20120159179 | DIGITAL SIGNATURES WITH ERROR POLYNOMIALS - Representations of polynomials a, s, t, e | 2012-06-21 |
20120159180 | Server-side Encrypted Pattern Matching - Server-side encrypted pattern matching may minimize the risk of data theft due to server breach and/or unauthorized data access. In various implementations, a server for performing the server-side encrypted pattern matching may include an interface component to receive an encrypted query token. The server may further include a query component to find a match for the encrypted query token in the encrypted data string. The query component may find such a match without decrypting the encrypted data string and the encrypted query token by using an encrypted dictionary that includes information on the edges of the encrypted suffix tree. | 2012-06-21 |
20120159181 | Virus Localization Using Cryptographic Hashing - Methods for using integrity checking techniques to identify and locate computer viruses are provided. A method for virus localization for each of three types of virus infections is provided, including the steps of computing a sequence of file blocks, calculating hashes for the sequences of file blocks from a host file and calculating hashes for the same or related sequences of file blocks from an infected file, and comparing the hashes from host file to the hashes from the infected file from the same or related sequences of file blocks such that when some of said first hashes and said second hashes do not match, a location of a virus is output. Methods for computing the sequence of file blocks depending on the type of virus infection, and for calculating the hashes using a collision resistant hash function, a digital signature scheme, a message authentication code, or a pseudo-random function. | 2012-06-21 |
20120159182 | DRM PLUGINS - Presented is a system and methods for receiving metadata, a decryption module and encrypted content from a cable headend, decrypting the encrypted content with the decryption module and presenting the decrypted content to a user. The client device can receive, load and execute any decryption module compatible with the system framework allowing flexibility in the choice or changing of client device manufacturer and/or Digital Rights Management system vendor. | 2012-06-21 |
20120159183 | METHOD AND APPARATUS FOR SECURING A COMPUTING DEVICE - A method and apparatus for securing a computing device are provided. A state of the computing device is determined, the state associated with a protection state. The computing device is automatically switching between a plurality of security levels at based on the state. | 2012-06-21 |
20120159184 | Technique for Supporting Multiple Secure Enclaves - A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed. | 2012-06-21 |
20120159185 | Secure Digital Download Storage Device - A secure USB flash drive employing digital rights management to implement secure digital media storage such as that provided by encrypted storage utilizing content protection for recordable media (CPRM) or the like. Unlike a secure digital card which provides such protection, it does not need an SD card port which is CPRM enabled, or alternatively a reader adapted for use therewith. The form factor can be that of a standard USB flash drive and a standard USB connector is employed making the device and its use familiar and comfortable to the average consumer. | 2012-06-21 |
20120159186 | SECURING THE IMPLEMENTATION OF A CRYPTOGRAPHIC PROCESS USING KEY EXPANSION - In the field of computer enabled cryptography, such as a keyed block cipher having a plurality of rounds, the cipher is hardened against an attack by protecting the cipher key by means of a key expansion process which obscures the cipher and/or the round keys by increasing their lengths to provide an expanded version of the keys for carrying out encryption or decryption using the cipher. This is especially advantageous in a “White Box” environment where an attacker has full access to the cipher algorithm, including the algorithm's internal state during its execution. This method and the associated computing apparatus are useful where the key is derived through a process and so is unknown when the software code embodying the cipher is compiled. This is typically the case where there are many users of the cipher and each has his own key, or where each user session has its own key. | 2012-06-21 |
20120159187 | ELECTRONIC DEVICE AND METHOD FOR PROTECTING AGAINST DIFFERENTIAL POWER ANALYSIS ATTACK - An electronic device and a method for protecting against a differential power analysis attack are disclosed herein. The electronic device includes an encryption/decryption unit, a random number generator and a countermeasure circuit. The encryption/decryption unit can provide an enable signal when encrypting or decrypting more bits of data. The random number generator can generate random data. When receiving the enable signal, the countermeasure circuit can operate according to the bits of data and the random data. | 2012-06-21 |
20120159188 | Systems and Methods for Identity-Based Encryption and Related Cryptographic Techniques - A method and system for encrypting a first piece of information M to be sent by a sender [100] to a receiver [110] allows both sender and receiver to compute a secret message key using identity-based information and a bilinear map. The sender uses a bilinear map to encrypt a message M, producing ciphertext V to be sent from the sender [100] to the receiver [110]. The receiver [110] uses the bilinear map to decrypt V and recover the original message M. According to one embodiment, the bilinear map is based on a Weil pairing or a Tate pairing defined on a subgroup of an elliptic curve. Also described are several applications of the techniques, including key revocation, credential management, and return receipt notification. | 2012-06-21 |
20120159189 | MODULAR EXPONENTIATION RESISTANT AGAINST SKIPPING ATTACKS - An exponentiation method resistant against skipping attacks. A main idea of the present invention is to evaluate, in parallel with the exponentiation such as y=g | 2012-06-21 |
20120159190 | ENCRYPTION DEVICE, DECRYPTION DEVICE, ENCRYPTING METHOD, AND DECRYPTING METHOD - An identification information setting unit of an encryption device on document data determines whether or not an encrypted area has been divided by an editing operation of document data, and sets identification information indicating any position of four corners of an undivided encrypted area at a corresponding position of each divided encrypted area when the encrypted area has been divided. | 2012-06-21 |
20120159191 | METHOD AND APPARATUS FOR TRANSITIONING BETWEEN STATES OF SECURITY POLICIES USED TO SECURE ELECTRONIC DOCUMENTS - Techniques for dynamically altering security criteria used in a file security system are disclosed. The security criteria pertains to keys (or ciphers) used by the file security system to encrypt electronic files to be secured or to decrypt electronic files already secured. The security criteria can, among other things, include keys that are required to gain access to electronic files. Here, the keys can be changed automatically as electronic files transition between different states of a process-driven security policy. The dynamic alteration of security criteria enhances the flexibility and robustness of the security system. In other words, access restrictions on electronic files can be dependent on the state of the process-driven security policy and enforced in conjunction with one or more cryptographic methods. | 2012-06-21 |
20120159192 | Optimizing Use of Hardware Security Modules - Use of cryptographic key-store hardware security modules is optimized in a system having a first scarce high-security key storage device and a second more plentiful low-security key storage device comprising securing a cryptographic key to the higher security level by initially storing the key in the first storage device, then responsive to an event, evaluating the stored key against one or more rules, and subsequent to the evaluation, reclassifying the stored key for relocation, encrypting the reclassified key using a key-encryption key; relocating the reclassified key into the second, lower-security storage device, and storing the key-encryption key in the first storage device. | 2012-06-21 |
20120159193 | SECURITY THROUGH OPCODE RANDOMIZATION - An opcode obfuscation system is described herein that varies the values of opcodes used by operating system or application code while the application is stored in memory. The system puts application code through a translation process as the application code is loaded, so that the code sits in memory with an altered instruction set. If new and potentially malicious code is injected into the process, its instruction set will not match that of the translated application code. As time to execute the application code approaches, the system puts the application code through a reverse translation process that converts the application code back to the original opcodes. Any malicious code injected into the process will also undergo the reverse translation, which will have the effect of making the malicious code detectable as invalid or erroneous. | 2012-06-21 |
20120159194 | RELATING TO CRYPTOGRAPHY - A method and apparatus | 2012-06-21 |
20120159195 | WRITING APPLICATION DATA TO A SECURE ELEMENT - Systems, methods, computer programs, and devices are disclosed herein for partitioning the namespace of a secure element in contactless smart card devices and for writing application data in the secure element using requests from a software application outside the secure element. The secure element is a component of a contactless smart card incorporated into a contactless smart card device. A control software application resident in the same or a different secure element provides access types and access bits, for each access memory block of the secure element namespace, thereby portioning the namespace into different access types. Further, a software application outside the secure element manages the control software application by passing commands using a secure channel to the secure element, thereby enabling an end-user of the contactless smart card device or a remote computer to control the partitioning and use of software applications within the secure element. | 2012-06-21 |
20120159196 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM - A content providing system includes: a server which provides to a host apparatus a first encrypted content including an encrypted area having applied thereto a replacement key; a host apparatus which receives the first encrypted content and replacement key application area information indicating the encrypted area having applied thereto the replacement key from the server; and a data storage device which receives the replacement key from the server and an individual key set in terms of content distribution processing from the server and performs key replacement processing for changing the replacement key application area of the first encrypted content to an encrypted area by the individual key to store a second encrypted content after the key replacement processing in a data recording area. | 2012-06-21 |
20120159197 | SECURE DATA PARSER METHOD AND SYSTEM - A secure data parser is provided that may be integrated into any suitable system for securely storing and communicating data. The secure data parser parses data and then splits the data into multiple portions that are stored or communicated distinctly. Encryption of the original data, the portions of data, or both may be employed for additional security. The secure data parser may be used to protect data in motion by splitting original data into portions of data, that may be communicated using multiple communications paths. | 2012-06-21 |
20120159198 | PROCESSOR POWER LIMIT MANAGEMENT - A processor power limiter and method is provided. The processor includes a first programmable location configured to store a processor power target. A power monitor is configured to estimate a measured power dissipation within the processor. A power controller is configured to adjust a processor power parameter based on the power target and the measured power dissipation. The processor may include an interface for an operating system. A second programmable location may be configured to store a software processor power target accessible by the operating system. The processor may also include a sideband interface for an external agent. A third programmable location may be configured to store an agent processor power target accessible by the external agent. The power controller may be configured to adjust a processor core voltage and/or frequency such that the measured dissipation stays below the processor power target, software processor power target and the agent processor power target. | 2012-06-21 |
20120159199 | POWER DELIVERY NOISE REDUCTION ON A MEMORY CHANNEL - A device, computer system, and method are disclosed. In one embodiment, the device includes a memory buffer driver circuit that can drive signals on a memory channel at a given voltage level. The voltage at the voltage level is supplied to the memory buffer driver circuit from a rail of a power delivery network. The voltage level exhibits a repeatable fluctuation cycle at a resonant frequency of the power delivery network. The device also includes an on-die termination logic circuit that asserts a first termination resistance on the memory channel after the memory channel enters an idle state but before the voltage level reaches a peak of the repeatable fluctuation cycle. The on-die termination logic circuit then deasserts the first termination resistance on the memory channel at a later point in time. | 2012-06-21 |
20120159200 | METHOD AND APPARATUS FOR SELECTIVE HEATING FOR ELECTRONIC COMPONENTS OF A HANDHELD DEVICE - A method and apparatus for thermal management of components and functional subsystems of a handheld device, including for a peripheral device electrically coupled to thereto. A power source provides power to a plurality of functional subsystems of the handheld device and optionally the peripheral device. The components and functional subsystems comprise predetermined thermal signatures. | 2012-06-21 |
20120159201 | METHOD AND APPARATUS TO CONFIGURE THERMAL DESIGN POWER IN A MICROPROCESSOR - A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency. | 2012-06-21 |
20120159202 | POWER SUPPLY APPARATUS SUITABLE FOR COMPUTER - A power supply apparatus suitable for a computer is provided. The provided power supply apparatus includes an isolated DC-DC converter, an auxiliary power conversion circuit and a switching circuit. The isolated DC-DC converter receives and converts an input voltage, so as to generate a first main power. The auxiliary power conversion circuit receives and converts the input voltage, so as to generate an auxiliary power. The switching circuit receives the first main power and the auxiliary power, wherein the switching circuit outputs the received auxiliary power to be served as a standby power of the power supply apparatus when the power supply apparatus is in a standby state; moreover, the switching circuit outputs the received first main power to be served as the standby power of the power supply apparatus when the power supply apparatus is in an operation state. | 2012-06-21 |
20120159203 | UTILIZING NETWORKED 3D VOLTAGE REGULATION MODULES (VRM) TO OPTIMIZE POWER AND PERFORMANCE OF A DEVICE - A method, system, and computer program for using an array of networked 3D voltage regulation modules (VRMs) to optimize power usage by components on a voltage island in real time is presented. The networked VRM devices work in parallel to supply adequate power to connected voltage islands, and to supplement other VRMs in the system that may require additional power in the case of a critical event. | 2012-06-21 |
20120159204 | SYSTEM AND METHOD FOR POWER MANAGEMENT - A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power. | 2012-06-21 |
20120159205 | START-UP CONTROL APPARATUS AND METHOD - A start-up control apparatus includes a power supply, a control chip, and a sensing module. The control chip includes a switching on module and a control module. The sensing module senses a current of the power supply and send a safe message to the control module after determining the current of the power supply is less than a reference current. The control module receives the safe message and control the switching on module to switch on the power supply to power on a computer system after the switching on module receives a start-up trigger signal. | 2012-06-21 |
20120159206 | INFORMATION PROCESSOR - Disclosed herein is an information processor, including: a detecting portion detecting connection between a battery pack and an information processor main body, and outputting connection information to the battery pack; a power source circuit to which an electric power is supplied from the battery pack acquiring the connection information; a manipulation portion adapted to be manipulated by a user; and a stopping portion outputting un-connection information to the battery pack when the manipulation portion is manipulated, and stopping output of the connection information even when the connection is detected by the detecting portion. | 2012-06-21 |
20120159207 | POWER MANAGEMENT DEVICE AND METHOD THEREOF - A power management device of an SD memory card reader includes a power supply regulator and a controller. The controller controls the power supply regulator to provide a memory card voltage according to an external control signal transmitted from a single control pin. Wherein when the external control signal denotes an enable state, the power supply regulator provides the memory card voltage; when the external control signal denotes a disable state, the power supply regulator stops providing the memory card voltage and discharges the load capacitor; and when the external control signal returns to the enable state from the disable state in a predetermined duration, the power supply regulator changes the memory card voltage. | 2012-06-21 |
20120159208 | SOFTWARE CONTROLLED POWER LIMITING IN USB TO SATA BRIDGE - A Universal Serial Bus (USB) to Serial ATA (SATA) bridge device and method for operating same in a USB connected mass storage subsystem supports software management of power consumption. The USB to SATA bridge estimates power consumption based on known power consumption characteristics of SATA disk drives when performing commands involved in accessing SATA drive, or takes measurements of power consumption during execution of commands to determine when responses to a USB host device are to be delayed. By selectively delaying responses to the USB host device issuing the commands, the USB to SATA bridge manages the rate at which the host issues commands to the USB mass storage subsystem and is thereby able to automatically limit power consumption of the USB mass storage subsystem to that that available over the USB link. | 2012-06-21 |
20120159209 | Idle Time Service - In embodiments of an idle time service, it can be determined that processing on a device is in an idle state. An execution duration of applications that are scheduled to be executed by a processor of the device can then be extended to reduce power consumption by the device. In other embodiments, it can be determined that an application configured to execute on a device is a background application. The execution duration of the background application can then be extended to reduce power consumption by the device. | 2012-06-21 |
20120159210 | STORAGE APPARATUS AND ITS CONTROL METHOD - The charge capacity of a battery for supplying electric power to a volatile memory and a non-volatile memory is increased without increasing the power source capacity. | 2012-06-21 |
20120159211 | APPARATUS AND METHOD FOR MANAGING POWER EQUIPMENT IN ADVANCED METERING INFRASTRUCTURE NETWORK - Provided is an apparatus and method for managing a power equipment in an advanced metering infrastructure (AMI) network included in a smart grid network. According to an aspect of the present invention, an apparatus and method for managing a power equipment in an AMI network may provide a load control environment enabling a power equipment to declare an opt-out when another power equipment declares an opt-out by providing a list of power equipments included in a load control group in response to a power equipment declaring an opt-out of the load control group so as to process an opt-out of a power equipment selected from the list. | 2012-06-21 |
20120159212 | INFORMATION PROCESSING APPARATUS CAPABLE OF APPROPRIATELY EXECUTING SHUTDOWN PROCESSING, METHOD OF CONTROLLING THE INFORMATION PROCESSING APPARATUS, AND STORAGE MEDIUM - An information processing apparatus capable of recovering the apparatus from a state in which software operation is abnormal to a state in which the same is normal. The information processing apparatus is provided with a CPU for receiving an instruction for turning off power of the information processing apparatus. Upon receipt of the instruction, the CPU determines whether or not it is necessary to turn off the power of the information processing apparatus. When it is necessary to turn off the power of the information processing apparatus, the CPU controls the information processing apparatus such that the power thereof is turned off, whereas when it is unnecessary to turn off the power of the information processing apparatus, the CPU controls the information processing apparatus such that the power thereof is not turned off. | 2012-06-21 |
20120159213 | Node Management of an Electronic Circuit Component - A component of an electronic circuit, the component comprising: a node (REG_ENB; DO) selectively configurable as an output node for providing an output signal to an external component or as an input node for providing an input signal to an internal component; a capacitor (C) selectively coupled to the node (REG_ENB; DO) to influence the time for the node (REG_ENB; DO) to transition between a low state and a high state; and a timer for measuring the time for the node to transition between a low state and a high state to provide a first information input signal, the state of the first information signal depending on the time for the node to transition between the low state and the high state and being indicative of a first information. A method of node management is also described. | 2012-06-21 |
20120159214 | POWER CONTROLLER FOR SUPPLYING POWER VOLTAGE TO FUNCTIONAL BLOCK - A power controller, includes a digital control circuit that outputs a result of comparing a first voltage being input and a voltage reference, and a processor control circuit that stops an operation of the processor based on the result of comparing. | 2012-06-21 |
20120159215 | NETWORK POWER MANAGEMENT APPARATUS AND METHOD - A network power management apparatus and method. The network power management apparatus includes a protocol management unit configured to be connected to a local communication apparatus and establish and manage a path between the local communication apparatus and neighboring communication apparatuses in the same network. The protocol management unit includes a delivery unit to deliver link information and power information of the local communication apparatus to the neighboring communication apparatuses, a first database to store the link information and the power information of the local communication apparatus and link information and power information of each of the neighboring communication apparatuses, a path management unit to calculate and establish a path using the information stored in the first database, and a packet generating unit to generate a power message using the power information of the local communication apparatus and deliver the generated power message to the neighboring communication apparatuses. | 2012-06-21 |
20120159216 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING ENHANCED TEMPERATURE BASED VOLTAGE CONTROL - Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enhanced temperature based voltage control are described. In one embodiment, an apparatus includes a processor and a controller coupled with the processor. In one embodiment, the controller receives a temperature measurement corresponding to a current temperature of the processor. In one embodiment, the controller further determines an adjustment to a voltage being applied to the processor based at least in part on the temperature measurement and a plurality of internal limits of the processor, wherein the determined adjustment to the voltage is based on an inverse temperature dependence relationship between at least one of an operating frequency and a voltage of the processor, and temperature. In one embodiment, the controller provides the determined adjustment to the voltage to a voltage regulator interface. | 2012-06-21 |
20120159217 | METHOD AND APPARATUS FOR PROVIDING EARLY BYPASS DETECTION TO REDUCE POWER CONSUMPTION WHILE READING REGISTER FILES OF A PROCESSOR - A method and apparatus are described for reducing power consumption in a processor. A micro-operation is selected for execution, and a destination physical register tag of the selected micro-operation is compared to a plurality of source physical register tags of micro-operations dependent upon the selected micro-operation. If there is a match between the destination physical register tag and one of the source physical register tags, a corresponding physical register file (PRF) read operation is disabled. The comparison may be performed by a wakeup content-addressable memory (CAM) of a scheduler. The wakeup CAM may send a read control signal to the PRF to disable the read operation. Disabling the corresponding PRF read operation may include shutting off power in the PRF and related logic. | 2012-06-21 |
20120159218 | EFFICIENT POWER MANAGEMENT AND OPTIMIZED EVENT NOTIFICATION IN MULTI-PROCESSOR COMPUTING DEVICES - Methods and devices for reducing power consumption in a multi-processor computing device include filtering indications from the second processor intended for the first processor while the first processor is in a low power state, so that only selected, such as significant, indications are transmitted. The second processor may be informed when the first processor is in a low power state. Indications generated by the second processor may be compared to indication filtering criteria to determine whether each should be transmitted to the first processor. Those indications satisfying the indication filtering criteria may be sent to the first processor, causing it to return to a normal power state. In mobile computing device the first processor may be an applications processor and the second processor may be a modem. Filtering of indications may be accomplished in the second processor or in a power controller in some implementations. | 2012-06-21 |
20120159219 | VR POWER MODE INTERFACE - In some embodiments, a control interface and associated control entity are provided to synchronize CPU activities to CPU power delivery network such as VR mode of operation, based on CPU power demands or the prediction of actual CPU current consumption. In some embodiments, the synchronization is controlled in such timely fashion so that the power states or power-related events are entered by a CPU (or core) based on characteristics of a VR supplying power to the CPU (or core). | 2012-06-21 |
20120159220 | Portable Electronic Device and Method for Recovering Power to a Rechargeable Battery Used Therein - A portable electronic device employs a method for recovering power to a rechargeable battery used therein when the battery is in a low state of charge. The portable electronic device includes at least a power management subsystem (PMS), a main processor subsystem, and the battery. When the battery is incapable of supplying boot-up power to the processor subsystem, power is provided from a battery charger to the PMS to power-up the PMS. The PMS then determines the battery's type and a state-of-charge (SOC) parameter for the battery, and compares the SOC parameter to a threshold, which is based on at least the battery type. If the SOC parameter is less than the threshold, power is provided from the battery charger to the battery for use in recharging the battery. Otherwise, power is supplied from the battery to the processor subsystem to facilitate general operation of the portable electronic device. | 2012-06-21 |
20120159221 | APPARATUS, METHOD, AND SYSTEM FOR EARLY DEEP SLEEP STATE EXIT OF A PROCESSING ELEMENT - An apparatus and method is described herein for providing an early wake scheme before spawning a new thread. An early wake indication is provided an amount of time, which may include an amount of time to perform a demotion from a current power state to a lower power state that is closer to an active power state, before a new thread is to be spawned and executed on a processing element (core or thread). Upon encountering the spawn of the new thread, such as a helper thread, the processing element is further transition from the lower power state to an active power state. And the new thread is executed on the processing element without incurring the latency associated with execution of the new thread waiting for the demotion from the current power state to an active power state after the spawn of the new thread. | 2012-06-21 |
20120159222 | METHOD AND SYSTEM FOR RAPID ENTRY INTO AND FOR RAPID EXITING FROM SLEEP STATES FOR PROCESSORS OF A PORTABLE COMPUTING DEVICE - A method and system for managing sleep states of a portable computing device are described. They include maintaining a sleep set of resource states and an active set of resource states in memory. A request may be issued for a processor to enter into a sleep state. This causes a controller to review a trigger set to determine if a shut down condition for the processor matches one or more conditions listed in the trigger set. Each trigger set may comprise a “trigger event” that may allow a controller to select a specific resource set which is desired by a particular processor based on a trigger event detected by a system power manager. If a trigger set matches a shut down condition, then switching states of one or more resources in accordance with the sleep set may be made by the controller without using a software handshake. | 2012-06-21 |
20120159223 | IMAGE FORMING APPARATUS AND PRINT SYSTEM - An image forming apparatus monitors sleep-cancelling events, and when a sleep-cancelling event occurs, stores an identifier and a sleep-cancellation time of the event. If a start time of a sleep mode is reached when (i) the apparatus is in a standby mode and (ii) one or more sleep-cancelling events specifying sleep-cancellation times later than the start time have been stored, the apparatus calculates power consumption required to maintain the standby mode for a period from the start time to the earliest sleep-cancellation time, as a power-saving amount savable during the period. Also, a recovery power amount required for recovery from the sleep mode to the standby mode is calculated on the assumption that the sleep mode is started at the start time and is cancelled at the earliest sleep-cancellation time. Switching to the sleep mode is performed only when the power-saving amount is greater than the recovery power amount. | 2012-06-21 |
20120159224 | HARDWARE ASSISTED PERFORMANCE STATE MANAGEMENT BASED ON PROCESSOR STATE CHANGES - A processor is configured to support a plurality of performance states and idle states. The processor includes a first programmable location associated with a first idle state and configured to store first entry performance state (P-State) information. The first entry P-State information identifies a first entry P-State. The processor is configured to receive a request to enter the first idle state, retrieve the first entry P-State information and enter the first entry P-State. The processor may include a second programmable location associated with the first idle state and configured to store first exit P-State information. The first exit P-State information identifies a first exit P-State. The processor may be configured to receive a request to exit the first idle state, retrieve the first exit P-State information and enter the first exit P-State. | 2012-06-21 |
20120159225 | PROCESSOR WITH POWER CONTROL VIA INSTRUCTION ISSUANCE - Methods and apparatuses are provided for controlling power consumption in a processor (or computational unit thereof). The method comprises monitoring power consumption in a processor (or computational unit) and determining that the power consumption of the processor (or computational unit) exceeds a threshold. Thereafter, instruction issuance if modified (such as by slowing or ceasing instruction issuance) within the processor (or computational unit) until the power consumption is below the threshold. The apparatus comprises a power consumption monitor for determining when power consumption within the processor exceeds a threshold. Upon that determination, a scheduler begins modify instruction issuance to one or more execution units until the power consumption is below the threshold. The modification of instruction issuance can be to slow instruction issuance or cease instruction issuance for a time period or until the power consumption is below the threshold. | 2012-06-21 |
20120159226 | APPARATUS, METHOD, AND SYSTEM FOR PREDICTIVE POWER DELIVERY NOISE REDUCTION - An apparatus and method is described herein for reducing noise in a power distribution network for an interface. The power distribution network is characterized. And based on that characterization, worst case patterns for the interface are predicted and avoided. As one example, characterization includes providing a stimulus, such as a step function stimulus, and determining a mathematical function response, such as a step function response. Then, based on the step function response, a resonant frequency for the power distribution network is determined; from which patterns that cause the resonant frequency are identified/predicted. And when identified patterns are detected, they are scrambled or manipulated to avoid causing a worst-case noise scenario in an interface's power distribution network. | 2012-06-21 |
20120159227 | POWER DETECTION DEVICE FOR MOTHERBOARD - A motherboard detection device for a motherboard having a plurality of power input terminals. The power detection device includes a current sampling module, a voltage sampling module, a processor, and a display unit. The current sampling module is connected to the power input terminals for obtaining the current of each power input terminal. The voltage sampling module is connected to the power input terminals for obtaining the voltage of each power input terminal. The processor is connected to the current sampling module and the voltage sampling module for acquiring the current and the voltage of each power input terminal and calculating the input power of each power input terminal based on the current and the voltage of each power input terminal to obtain input power data. The display unit is connected to the processor for receiving the input power data from the processor and displaying the input power data. | 2012-06-21 |
20120159228 | IMAGE FORMING APPARATUS - An image forming apparatus is provided, which includes a control unit, one or more motors, and a plurality of power supply management devices each of which includes one or more driving circuits for driving the motors, one or more power supply circuits for supplying electricity to the control unit and an external device, a signal output unit issuing a halting signal to the other power supply management devices in response to detection of an abnormality in the power supply management device, a halting unit halting an operation of the power supply management device in response to receipt of a halting signal from one of the other power supply management devices and detection of the abnormality in the power supply management device, and a restoring unit restoring the halted operation of the power supply management device in response to a predetermined restoring condition being satisfied. | 2012-06-21 |
20120159229 | METHOD FOR GENERATING A CLOCK SIGNAL - An apparatus for generating a delayed clock signal. The apparatus is a computer system with a processor to which a memory device is coupled. The memory device has a delay clock generator that has a synchronizing circuit for generating an output clock signal from an input clock signal and further includes a delay circuit having an input coupled to the output of the synchronizing circuit. The delay circuit provides an output clock signal having a delay with respect to the clock signal from the synchronizing circuit according to one of a plurality of programmable time delays selected in accordance with a selection signal. The method of generating a clock signal includes synchronizing an internal clock signal to an external clock signal, and delaying the internal clock signal different amounts based on a selection value indicative of external clock frequency to provide the clock signal. | 2012-06-21 |
20120159230 | Mechanism for Updating Memory Controller Timing Parameters During a Frequency Change - A mechanism for updating memory controller timing parameters during a frequency change includes a memory controller that controls memory transactions to a memory unit. The integrated circuit may also include a power manager unit that is coupled to the memory controller and may be configured to provide an indication that a memory clock frequency is changing to a new frequency. The integrated circuit also includes a storage that includes a number of entries. Each entry may store a predetermined set of timing values that corresponds to a respective memory clock frequency. In response to receiving the indication, the memory controller may access a given entry of the storage that corresponds to the new frequency, and may generate new timing values that correspond to the new frequency based upon the predetermined set of timing values stored within the given entry. | 2012-06-21 |
20120159231 | DATA PROCESSING APPARATUS, DATA PROCESSING METHOD AND RECORDING MEDIUM - A data processing apparatus comprising: a gate unit connected to an input or an output of a processing unit and configured to cut off the data input and output; a control unit configured to control a supply of clock to the processing unit; and an instruction unit configured to give an instruction for the clock control to the control unit, wherein the control unit controls the gate unit and controls the clock supplied to the processing unit based on an instruction from the instruction unit, whereby securing a higher power saving effect. | 2012-06-21 |
20120159232 | FAILURE RECOVERY METHOD FOR INFORMATION PROCESSING SERVICE AND VIRTUAL MACHINE IMAGE GENERATION APPARATUS - An information processing service is allowed to be immediately recovered from failure without clustering information apparatuses that provide an information processing service. A failure recovery method for an information processing service provided by an information apparatus, the method includes: preparing a virtual machine image generation apparatus which generates a virtual machine image, and a virtual machine execution apparatus which runs a virtual machine based on the virtual machine image; generating and storing, by the virtual machine image generation apparatus, the virtual machine image based on system data and hardware configuration information which enable implementation of the information processing service at a time of normal operation of the information processing service; and running, by the virtual machine execution apparatus, a virtual machine which provides a function of the information processing service based on the virtual machine image when a failure occurs in the information processing service. | 2012-06-21 |
20120159233 | METHOD OF GENERATING ROUND ROBIN SERVICE ORDER LISTS FOR IMPROVING SERVICE PERFORMANCE DURING SERVER FAILURES - A method controls the routing of service requests to a plurality of servers using a first routing distribution algorithm. The method includes waiting a first period of time for a designated server to respond to a service request, transmitting the service request to the designated server a second time, and waiting a second period to time for the designated server to respond to the service request assigned to the designated server, the second period of time being longer than the first period of time. The method also includes determining that the designated server has failed, rerouting the service request to a different server, and routing the service requests to the plurality of servers using a second routing distribution algorithm. | 2012-06-21 |
20120159234 | PROVIDING RESILIENT SERVICES - Described are embodiments directed at providing resilient services using architectures that have a number of failover features including the ability to handle failover of an entire data center. Embodiments include a first server pool at a first data center that provides client communication services. The first server pool is backed up by a second server pool that is located in a different data center. Additionally, the first server pool serves as a backup for the second server pool. The two server pools thus engage in replication of user information that allows each of them to serve as a backup for the other. In the event that one of the data centers fails, requests are rerouted to the backup server pool. | 2012-06-21 |
20120159235 | Systems and Methods for Implementing Connection Mirroring in a Multi-Core System - The present application is directed to systems and methods for providing failover connection mirroring between two or more multi-core devices intermediary between a client and a server. A first multi-core device may receive a hash key of a second multi-core device for mapping packets to cores of the second multi-core device. The first device may identify a core of the second device using (i) the hash key of the second device and (ii) tuple information corresponding to a connection between the client and the server via the first device. The first device may determine that the identified core is not a desired core for providing a failover connection. The first device may modify the tuple information so as to identify the desired core when used with the hash key of the second device. The first device may use the modified tuple information to establish the failover connection. | 2012-06-21 |
20120159236 | HOLISTIC TASK SCHEDULING FOR DISTRIBUTED COMPUTING - Embodiments of the invention include a method for fault tolerance management of workers nodes during map/reduce computing in a computing cluster. The method includes subdividing a computational problem into a set of sub-problems, mapping a selection of the sub-problems in the set to respective nodes in the cluster, directing processing of the sub-problems in the respective nodes, and collecting results from completion of processing of the sub-problems. During a first early temporal portion of processing the computational problem, failed nodes are detected and the sub-problems currently being processed by the failed nodes are re-processed. Conversely, during a second later temporal portion of processing the computational problem, sub-problems in nodes not yet completely processed are replicated into other nodes, processing of the replicated sub-problems directed, and the results from completion of processing of sub-problems collected. Finally, duplicate results are removed and remaining results reduced into a result set for the problem. | 2012-06-21 |
20120159237 | System and Method of Emergency Operation of an Alarm System - An ambient condition monitoring system includes a common control unit, at least one primary communications bus and at least one supplemental communications bus. The control unit communicates with a plurality of supplemental units, which could include ambient condition detectors, using the primary communications bus in a normal operating environment. In the event of a sensed failure of the primary bus, or one of the supplemental units, communications can be automatically implemented using the supplemental communications bus. | 2012-06-21 |
20120159238 | System and Method for Recovering from a Configuration Error - A system and method for recovering from a configuration error are disclosed. A Basic Input Output System (BIOS) configures a memory associated with a node of an information handling system and enables a progress monitoring process during configuration of the memory. The memory is disabled if the BIOS determines that a configuration error occurred and a memory reference code associated with the memory is modified in order to prevent a reset of the information handling system. | 2012-06-21 |
20120159239 | DATA MANIPULATION OF POWER FAIL - Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked. | 2012-06-21 |
20120159240 | RECOVERY OF A COMPUTER THAT INCLUDES VIRTUAL DISKS - Described is the backup and/or restore of virtual disks In general, metadata is backed up for restoring a virtual disk. To restore the disk, a physical disk is created, with the virtual disk the created on a partition of the physical disk. Backup and restore is described for nested virtual disks, including for block level restore. Further described is backing up of critical virtual disks and their containers, and virtual disk backup with respect to basic disks and dynamic volumes. | 2012-06-21 |
20120159241 | INFORMATION PROCESSING SYSTEM - An information processing system may not degrade a processor, if the system is designed so as to satisfy connection restrictions between processors and chipsets. In the system a route switching function is provided to control the connection between a CPU and a BIOS ROM among a plurality of CPUs and the BIOS ROM. When a fault occurs in a particular CPU, a route connecting the BIOS ROM and another CPU in which a fault does not occur is determined, and then the route switching is performed on the basis of the determined route information. | 2012-06-21 |
20120159242 | Method and System For Spinlock Fault Recovery - A method including requesting access to a resource governed by a spinlock; determining an allocation of the resource to a further requester; determining an expiration of a time limit for the spinlock, if the resource is allocated to the further requester; and initiating a fault recovery, if the time limit is expired. | 2012-06-21 |
20120159243 | Proactive Error Scan And Isolated Error Correction - Processing for file system volume error detection and processing for resultant error correction are separated to support system availability and user satisfaction. File system volumes for storing data structures are proactively scanned while the volumes remain online to search for errors or corruptions thereon. Found errors are scheduled to be corrected, i.e., spot corrected, dependent on the severity of the identified errors, error correction scheduling and/or at the determination of a file system administrator and/or user, to assist in maintaining minimal user and file system impact. When spot correction is initialized, one file system volume at a time is taken offline for correction. Spot correction verifies prior logged corruptions for the offline volume, and if independently verified, attempts to correct the prior noted corruptions. Volumes are retained offline only for the time necessary to verify and attempt to correct prior noted volume corruptions. | 2012-06-21 |
20120159244 | MEMORY SYSTEM - According to one embodiment, a memory system includes a data manager and a data restorer. The data manager multiplexes difference logs by a parallel writing operation and stores them in a second storage area, the difference logs being difference logs indicating difference information before and after update of a management table; and thereafter multiplexes predetermined data as finalizing logs and stores them in the second storage area. The data restorer determines a system status at startup of the memory system, by judging whether irregular power-off occurs or data destruction occurs in the second storage area, based on a data storage state of the difference logs and the finalizing logs stored in the second storage area. | 2012-06-21 |
20120159245 | ENHANCED ERROR HANDLING FOR SELF-VIRTUALIZING INPUT/OUTPUT DEVICE IN LOGICALLY-PARTITIONED DATA PROCESSING SYSTEM - Error handling is simplified for a self-virtualizing IO resource that utilizes a physical function adjunct partition for a physical function in the self-virtualizing IO resource to coordinate error recovery for the self-virtualizing IO resource, by restarting each virtual function adjunct partition associated with that physical function to avoid the need to coordinate error recovery within the logical partitions to which such virtual function adjunct partitions are assigned. | 2012-06-21 |
20120159246 | SCALING OUT A MESSAGING SYSTEM - A messaging system may operate on multiple processor partitions in several configurations to provide queuing and topic subscription services on a large scale. A queue service may receive messages from a multiple transmitting services and distribute the messages to a single service. A topic subscription service may receive messages from multiple transmitting services, but distribute the messages to multiple recipients, often with a filter applied to each recipient where the filter defines which messages may be transmitted by the recipient. Large queues or topic subscriptions may be divided across multiple processor partitions with separate sets of recipients for each partition in some cases, or with duplicate sets of recipients in other cases. | 2012-06-21 |
20120159247 | AUTOMATICALLY CHANGING PARTS IN RESPONSE TO TESTS - In an embodiment, in response to an error encountered by a test of a program, a rule is found that specifies the error and an action. A part in the program is selected in response to the action, the part is modified, and the test is re-executed. In various embodiments, the part is modified by changing the code in the part or by replacing the part with a previous version of the part. | 2012-06-21 |
20120159248 | DIAGNOSTIC FRAMEWORK FOR USE WITH APPLICATION SERVERS AND VIRTUAL MACHINES - Described herein are systems and methods for providing diagnostic information between an application server (e.g., a WebLogic server), and a virtual machine (VM) (e.g., a JRockit VM). In accordance with an embodiment, the system includes a diagnostic monitoring component adapted to obtain diagnostic data indicative of all available data on an application server, including diagnostic information from one or more application server components running on the application server, obtain diagnostic data from the virtual machine, and persists the diagnostic data obtained from the application server and the virtual machine into a diagnostic data image file. The system further includes a console that provides access to the diagnostic data persisted into the diagnostic image file. | 2012-06-21 |
20120159249 | FAILURE DIAGNOSIS METHOD AND APPARATUS USING RESOURCE RELATIONSHIP MAP - A failure diagnosis method includes: generating a resource relationship map of resources to be managed on a network; and when a failure occurs in a certain service object within the network, extracting a topology relationship map from the resource relationship map by using the failed service object as a root node. The failure diagnosis method further includes searching a resource object caused the failure while checking related objects, starting from the root node in the topology relationship map. | 2012-06-21 |
20120159250 | COMPATIBILITY TESTING USING TRACES, LINEAR TEMPORAL RULES, AND BEHAVIORAL MODELS - A “Compatibility Tester” extracts observable behaviors from different system implementations (e.g., software, operating systems, device drivers, hardware interfaces, etc.), then performs compatibility testing via comparisons of the extracted behaviors. Traces (e.g., bus level signals between controllers and hardware devices or commands between software components) representing observable behaviors of different implementations of a system are captured. Temporal and structural rules are then mined from these traces. The mined rules (or a model constructed from those rules) are used by a “Rule Checking” process that determines whether reference rules (mined from a known compatible system) are compatible with rules mined from test traces of a second system. Invalid rules are flagged as behavioral compatibility bugs. Alternately, the mined rules are used by a “Rule Diffing” process that performs set differencing of the behavioral and structural rules mined from the different system implementations, with differences between the systems flagged as behavioral compatibility bugs. | 2012-06-21 |
20120159251 | Test Device and Method for the SoC Test Architecture - A test device for an SoC test architecture has a test input port, a test output port, a plurality of cores, a register, and a plurality of user defined logics. The register has a plurality of bits corresponding to the cores. Each of the user defined logics is connected to a corresponding bit of the register and a corresponding one of the cores. Each of the user defined logic receives a plurality of test control signals, and receives the corresponding bit of the register to change values of the test control signals. Outputs of each of the user defined logics are connected to the corresponding core to determine whether a test instruction of the corresponding core is or is not needed to be updated. | 2012-06-21 |
20120159252 | SYSTEM AND METHOD FOR CONSTRUCTION, FAULT ISOLATION, AND RECOVERY OF CABLING TOPOLOGY IN A STORAGE AREA NETWORK - System and method for construction, fault isolation, and recovery of cabling topology in a storage area network (SAN) is disclosed. In one embodiment, in a method for construction, fault isolation, and recovery of cabling topology in a SAN, subsystem information associated with each subsystem in the SAN is obtained. Then, an IP port and zoning information associated with connections of each subsystem is obtained. Component information associated with each component is also obtained. Any other relevant information associated with each subsystem and each component is obtained from users. The obtained subsystem information, IP port and zoning information, component information, and any other relevant information are compiled. Test packets are then sent from end-to-end in SAN using compiled information. The sent test packets are tracked via each component in each subsystem in the SAN. The cabling topology of the SAN is then outputted based on the outcome of the tracking. | 2012-06-21 |
20120159253 | Hardware security module and processing method in such a module - The present invention relates to the field of processing within hardware security modules, such as for example debugging of compiled programs. A debugging module includes a microprocessor and a compiled program to be executed by the microprocessor in order to carry out an operation, and is configured to exchange with an external entity, in a master/slave mode, messages relating to the operation. The compiled program includes at least one debugging instruction which whether or not it is executed does not modify the execution of the operation. The hardware security module is moreover configured to transmit, during the execution of the compiled program, data generated, for example by the debugging instruction, over a communication channel initiated by the hardware security module, to an entity external to the hardware security module. | 2012-06-21 |
20120159254 | Debugging Apparatus for Computer System and Method Thereof - The present invention relates to a debugging apparatus for a computer system and a method thereof. A detecting unit detects if a debugging unit connects to the computer system. When a debugging unit connects to the computer system, the detecting unit produces a detecting signal, which contains information of a bus in the computer system electrically connected with the debugging unit. Then a selection unit selects the bus electrically connected with the debugging unit according to the detecting signal. Besides, a testing unit tests the computer system and produces a power-on self-test (POST) code, so that the selected bus can be used for outputting the POST code to the debugging unit. Thereby, the present invention can choose to use the bus reserved in the computer system for outputting the POST code to the debugging unit, and hence facilitating inspection personnel to debug the computer system. | 2012-06-21 |
20120159255 | Online Fault Verification In A File System - Data structure errors, or corruptions, identified during, e.g., normal computing device system processing, file system processing or user access processing, are verified prior to the file system identifying the error for offline correction or notifying the user or system administrator a data structure error exists. Identified data structure corruptions are verified while the file system volumes are maintained online and otherwise accessible to other processing tasks and user access. Verified data structure corruptions are logged for further corrective processing. Data structure corruptions that cannot be verified, i.e., false positives, are not further processed and are not identified to file system administrators or users as corruptions, freeing the file system to concentrate on normal processing and true, verifiable errors. | 2012-06-21 |
20120159256 | File System Resiliency Management - Perceived corruptions encountered on file system volumes, and which cannot be initially remedied online, are processed to verify whether they are true, existing volume data structure corruptions or, alternatively, false positives. Upon the verification of one or more of a volume's corruptions, error scanning is performed to check for, and attempt to remedy online, all the existing corruptions on the volume. Subsequent to error scanning processing, if one or more verified corruptions continue to exist on a file system volume, at file system boot up time spot corruption correction is performed to attempt to remedy the existing, verified corruptions on the volume. Spot corruption correction is performed to attempt to correct verified data structure corruptions on a volume of the file system while the volume is maintained offline for the time necessary to attempt to correct its prior identified corruptions. | 2012-06-21 |
20120159257 | CONTROL COMPUTER AND REPORT MANAGEMENT METHOD USING THE SAME - A method for managing test reports of a system under test (SUT) using a control computer obtains an initial test report of the SUT, adds error logs of the initial test report in a defect library of a storage device of the control computer, and adds error causes and solutions corresponding to the error logs in a root cause library and a solution library of the storage device respectively. The method further adds the error causes and the solutions corresponding to the error logs in the initial test report, to generate an optimized report of the SUT. | 2012-06-21 |
20120159258 | DEBUGGING IN DATA PARALLEL COMPUTATIONS - The debugging of a program in a data parallel environment. A connection is established between a debugging module and a process of the data parallel environment. The connection causes the data parallel environment to notify the debugging module of certain events as they occur in the execution of the process. Upon notification of such an event, the process execution is paused, and the debugging module may query the data parallel environment for information regarding the process at the device independent virtual machine layer. Upon completion of this querying, the process may then resume execution. This may occur repeatedly if multiple events are encountered. | 2012-06-21 |
20120159259 | Optimizing Performance Of An Application - An indication of a start of an execution of a process can be received, and a time counter associated with measuring a time elapsed can be initiated by the execution of the process. The time elapsed by the execution of the process can be compared with a predetermined threshold timeout value, and a report indicating the time elapsed by the execution of the process and whether the elapsed time exceeded the predetermined threshold timeout value can be automatically generated. | 2012-06-21 |
20120159260 | RESOURCE INDEX IDENTIFYING MULTIPLE RESOURCE INSTANCES - A resource index on a computing device identifies multiple resource instances (e.g., multiple user interface (UI) resource instances) of multiple resource items (e.g., of multiple UI resource items), each resource instance having one or more resource instance conditions. In response to a request for a resource item received from an application, a determination is made based on the resource index of one of the multiple resource instances that satisfy conditions associated with the request, and the one of the multiple resource instances is returned to the application. Additionally, the resource index can be used to identify potential errors in running an application in various potential contexts. | 2012-06-21 |