22nd week of 2013 patent applcation highlights part 59 |
Patent application number | Title | Published |
20130138930 | COMPUTER SYSTEMS AND METHODS FOR REGISTER-BASED MESSAGE PASSING - Systems and methods are disclosed that include a plurality of processing units having a plurality of register file entries. Control logic identifies a first register entry as including a message address in response to receiving a first instruction. The control logic further identifies a second register entry to receive messages in response to receiving a second instruction. | 2013-05-30 |
20130138931 | MAINTAINING THE INTEGRITY OF AN EXECUTION RETURN ADDRESS STACK - A processor and method for maintaining the integrity of an execution return address stack (RAS). The execution RAS is maintained in an accurate state by storing information regarding branch instructions in a branch information table. The first time a branch instruction is executed, an entry is allocated and populated in the table. If the branch instruction is re-executed, a pointer address is retrieved from the corresponding table entry and the execution RAS pointer is repositioned to the retrieved pointer address. The execution RAS can also be used to restore a speculative RAS due to a mis-speculation. | 2013-05-30 |
20130138932 | MULTIPLE FRAMEWORK LEVEL MODES - Mechanisms are provided to allow devices to support multiple modes, such as work, personal, and family modes. Conventional mobile solutions provide only for mode distinctions at the application level, e.g. one work application may prevent access to certain data, but a different application may want to allow access to that same data. Existing computer system solutions rely on multiple operating system instances or multiple virtual machines. Framework level modes are provided that do not require different, mutually exclusive, or possibly conflicting applications or platforms. A device and associated applications may have access to different data and capabilities based on a current mode. | 2013-05-30 |
20130138933 | COMPUTER SYSTEM - A computer system including a central processing unit (CPU), a chipset connected to the CPU, a baseboard management controller (BMC) connected to the chipset, and a basic input/output system (BIOS) unit connected to the BMC is provided. The BMC switches a connection mode which the BMC connecting to the BIOS unit between a local mode and a bypass mode. The BIOS unit communicates with the chipset directly when the connection mode is switched to the bypass mode. When reading a BIOS information of the BIOS unit is needed, the BMC switches the connection mode to the local mode, communicates with the BIOS unit directly and read the BIOS information directly. | 2013-05-30 |
20130138934 | LOADING CONFIGURATION INFORMATION - Embodiments of the present invention relate to a method and apparatus for loading configuration information. The method for loading configuration information according to one embodiment of the present invention comprises: obtaining a first digest from a baseboard management controller BMC, wherein the first digest is generated according to first configuration information stored in BMC; comparing the first digest with a second digest locally stored in a host system, wherein the second digest is generated according to second configuration information locally stored in the host system, and the second configuration information is configuration information loaded in the last boot of the host system; and in response to determining that the first digest differs from the second digest, obtaining the first configuration information from BMC for overwriting the second configuration information, so as to load the first configuration information in the course of booting the host system. | 2013-05-30 |
20130138935 | AUTOMATICALLY STARTING SERVERS AT LOW TEMPERATURES - This document describes various techniques for automatically starting servers at low temperatures. A server may be powered on into a heating mode responsive to determining that a temperature of the server is below an operational temperature range. The server may then be restarted when the temperature of the server has increased to a temperature that is within the operational temperature range. | 2013-05-30 |
20130138936 | MODULAR INTEGRATED CIRCUIT WITH UNIFORM ADDRESS MAPPING - A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. A memory module stores hub software and hub data and configuration data. The hub software operates in accordance with a memory map that includes a plurality of first reserved blocks corresponding to memory reserved for the plurality of spoke modules, and at least one second reserved block corresponding to memory reserved for at least one optional spoke module. The plurality of first reserved blocks are activated based on the configuration data and the at least one second reserved block is deactivated based on the configuration data. | 2013-05-30 |
20130138937 | Method And System For Managing Plant Operation - Disclosed herein are methods and systems for advising and operating a power plant and related devices. In an embodiment, a power plant operator via a client | 2013-05-30 |
20130138938 | METHOD, RECORDING MEDIUM, AND ELECTRONIC DEVICE FOR REDUCING BOOT TIME - The present invention relates to a method of reducing the boot time of an electronic device (i.e., improving the boot speed of the electronic device), such as a computer, an electronic device to which the method is applied, and a recording medium on which the method is recorded. There is provided a method of booting an electronic device includes hiding at least one first device of devices, included in the electronic device, through an initial start-up program, loading drivers corresponding to remaining devices other than the at least one first device, from among the included devices, by driving an Operating System (OS) of the electronic device, and unhiding the hidden at least one first device through the initial start-up program according to a predetermined event. | 2013-05-30 |
20130138939 | METHOD FOR PROCESSING BOOTING ERRORS - A method for processing booting errors for a computer having multiple voltage regulator downs (VRDs) includes reading a boot sequence including multiple power-on stages, and each power-on stage corresponds to a boot voltage and one of the VRDs; performing the power-on stages according to the boot sequence, and determining whether an output voltage of the VRD corresponding to each power-on stage is equal to the corresponding boot voltage; and when the output voltage of any one of the VRDs is not equal to the corresponding boot voltage, performing a debugging procedure. | 2013-05-30 |
20130138940 | COMPUTER SYSTEM AND METHOD FOR UPDATING BASIC INPUT/OUTPUT SYSTEM THEREOF - A computer system including a central processing unit (CPU), a chipset connected to the CPU, a baseboard management controller (BMC) connected to the chipset, and a basic input/output system (BIOS) unit connected to the BMC is provided. The BMC switches a connection mode which the BMC connecting to the BIOS unit between a local mode and a bypass mode. The BIOS unit communicates with the chipset directly, when the connection mode is switched to the bypass mode. The BMC switches the connection mode from the bypass mode to the local mode, when the BIOS unit should be updated. Then, the BMC communicates with the BIOS unit directly, and the BIOS updating file is written into the BIOS unit. | 2013-05-30 |
20130138941 | METHOD AND APPARATUS TO CONTROL BOOTING OF COMPUTER SYSTEM - A method of controlling booting of a computer system includes determining whether a booting mode of a basic input/output system (BIOS) set in the computer system is a first mode in which supportability of an extensible firmware interface (EFI) is automatically determined, if the booting mode of the BIOS is determined as the first mode, determining whether an operating system (OS) that is stored in a first storing unit and performs booting of the computer system supports the EFI, setting the booting mode of the BIOS as one of a mode in which the EFI is supported and a mode in which the EFI is not supported, based on the determination result regarding whether the OS supports the EFI and controlling booting of the computer system in the set booting mode. | 2013-05-30 |
20130138942 | Method for Preconfiguring an Appliance, and Method for Starting Up the Appliance - A method for preconfiguring an appliance having a configuration memory configured to have information written to it when the appliance is in a deactivated state, wherein the appliance is configured to make contact with at least one further appliance during operation, includes capturing a data record from the appliance, wherein the data record contains at least identification data from the appliance. The method further includes determining a piece of configuration information from the appliance by using the data record and at least one data record from the at least one further appliance, and writing the configuration information to the configuration memory of the appliance in order to preconfigure the appliance. | 2013-05-30 |
20130138943 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ELECTRONIC SYSTEM MOUNTED THE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - An electronic system has a plurality of semiconductor integrated circuit deices which are connected in series via a single signal line. One semiconductor integrated circuit device of the plurality of semiconductor integrated circuit devices sequentially reads the setting data of each of the plurality of the semiconductor integrated circuit devices from a storage unit, sets the setting data of the one semiconductor integrated circuit device to a functional circuit of the one semiconductor integrated circuit device, and transfers second setting data of another semiconductor integrated circuit device to the another semiconductor integrated circuit device via the single signal line. | 2013-05-30 |
20130138944 | METHODS AND SYSTEMS FOR MODIFYING DISK IMAGES TO PROVIDE NETWORK INTERFACE CARD TEAMING CAPABILITIES - A system for modifying a virtual disk to provide network interface card (NIC) teaming capabilities to a virtual disk. The system can include a virtual disk that has access to one or more NICs. In some instances, the NICs are included in a NIC team that is also available to the virtual disk. A teaming module executing on a computer can identify the NIC team and responsively obtain a media access control (MAC) address of the NIC team. In response to obtaining the NIC team MAC address, the teaming module can obtain a network boot MAC address that was used to PXE boot the virtual disk. The teaming module can then replace the NIC team MAC address of each NIC in the NIC team with the obtained network boot MAC address. The system then boots from the virtual disk that has the modified NIC team configuration. | 2013-05-30 |
20130138945 | SYSTEMS, METHODS, AND MEDIA FOR DISABLING GRAPHIC PROCESSING UNITS - An information handling system (IHS) provides a method for managing power consumption. The method includes detecting a power-on in the IHS, wherein the IHS comprises a first graphics processing unit (GPU) and at least one additional GPU. The method also includes determining if a normal boot is implemented in the IHS and determining if an instant-on boot occurred if the normal boot is implemented. The at least one additional GPU is disabled if an instant-on boot occurred. | 2013-05-30 |
20130138946 | SECURE TELEMESSAGING - Systems and methods are described that provide for targeted distribution of messages through communication networks, such as the Internet, in private and confidential environments. Messages, such as advertisements, can be stored in a message database. In a secure environment, consumer profiles, such as medical records, can be mined to identify target consumers for a given message. Messages can be retrieved from the message database, encrypted, and conveyed to the identified target consumers without inappropriately revealing or disclosing private or confidential consumer data. | 2013-05-30 |
20130138947 | USER-DRIVEN MENU GENERATION SYSTEM WITH DYNAMIC GENERATION OF TARGET FILES WITH PLACEHOLDERS FOR PERSISTENT CHANGE OR TEMPORARY SECURITY CHANGE OVER CLOUD COMPUTING VIRTUAL STORAGE FROM TEMPLATE FILES - Dynamic generation of target files is described. A user can select a template file. The template file includes: at least first and second changeable fields configured to be changed persistently, and a third changeable field. The second changeable field is configured to receive a security-related value. A third changeable field includes a first value configured to be changed temporarily to receive an encrypted version of the first value. The template file is parsed to generate a user interface, including: a first prompting label, corresponding to the first changeable field, requesting the user to enter the user content value, a second prompting label, corresponding to the second changeable field, requesting that the user enter audit data and/or access control data. An encrypted version of the first value corresponding to the third changeable field is generated. The first value is temporarily replaced with the encrypted value. The target file is then generated. | 2013-05-30 |
20130138948 | SYSTEM AND METHOD FOR RETAINING USERS' ANONYMITY - A method and a system are provided for generating information that relates to services being utilized by a user, by which: at a user device, retrieving usage information that relates to services consumed by the user of the user device; forwarding by the user device the retrieved usage information towards a central processing unit; at the central processing unit, determining based on the received usage information and based on at least one pre-determined criterion associated with the services being consumed by the user, whether a message should be sent to that user; and if in the affirmative, sending a message to the user that relates to the received usage information, without logging any information that relates to the message being sent to the user, at the central processing unit. | 2013-05-30 |
20130138949 | KEY SETTING METHOD, NODE, AND NETWORK SYSTEM - A key setting method executed by a node transmitting and receiving a packet through multi-hop communication in an ad-hoc network among ad-hoc networks, includes receiving a packet encrypted using a key specific to a gateway and simultaneously reported from the gateway in the ad-hoc network; detecting a connection with a mobile terminal capable of communicating with a server retaining a key specific to a gateway in each ad-hoc network among the ad-hoc networks; transmitting to the server, via the mobile terminal and when a connection with the mobile terminal is detected, the encrypted packet received; receiving from the server and via the mobile terminal, a key specific to a gateway in the ad-hoc network and for decrypting the encrypted packet transmitted; and setting the received key specific to the gateway in the ad-hoc network as the key for encrypting the packet. | 2013-05-30 |
20130138950 | KEY SETTING METHOD, NODE, AND NETWORK SYSTEM - A key setting method executed by a node transmitting and receiving data through multi-hop communication in an ad-hoc network among multiple ad-hoc networks, includes detecting connection with a mobile terminal communicating with a server connected to a gateway in each ad-hoc network among the ad-hoc networks; transmitting by simultaneously reporting to the ad-hoc network, an acquisition request for a key for encrypting the data when the connection with the mobile terminal is detected at the detecting; receiving from the server via the mobile terminal, a key specific to a gateway and transmitted from the gateway to the server consequent to transfer of the simultaneously reported acquisition request to the gateway in the ad-hoc network; and setting the key specific to the gateway received at the receiving as the key for encrypting the data. | 2013-05-30 |
20130138951 | METHOD AND DEVICE FOR AUTOMATICALLY DISTRIBUTING UPDATED KEY MATERIAL - A method for handling an encrypted message received on an electronic device that has not been encrypted using a current public key. The portable electronic device automatically generates a reply message to the sender in response to determining that the message has not been encrypted with the current public key. The reply message may contain the current public key of the recipient device, and may request the sender to resend the message encrypted with the current public key. | 2013-05-30 |
20130138952 | SYSTEM AND METHOD TO PASS A PRIVATE ENCRYPTION KEY - A method and system may include receiving, by a certificate authority computing device, a request to provision and provide a private key. A connection may be established between a requester device and a network for identification. The identity of the requester device may be verified via a network path utilized by the connection. A secure session with the requester device may be initiated using an intermediate agent on the network. A private key may be provided from the certificate authority to the requester device using the secure session. The private key may be provisioned. The intermediate agent may be connected to the network at a location that provides the requester device with a connection to the network. The intermediate agent may further authenticate the requester device using the location of the connection to the network of the requesting device. | 2013-05-30 |
20130138953 | COMBINING MULTIPLE DIGITAL CERTIFICATES - A method for forming a digital certificate includes receiving contact information associated with the digital certificate. The contact information includes at least a name, a mailing address, and an email address. The method also includes receiving billing information associated with the digital certificate and receiving a Certificate Signing Request (CSR) for the digital certificate. The method further includes receiving a first name for use in forming the digital certificate and receiving a second name for use in forming the digital certificate. Moreover, the method includes receiving an indication of a vendor of web server software, receiving an indication of a service period for the digital certificate, and forming the digital certificate. The first name is stored in a Subject field of the digital certificate and the second name is stored in the SubjectAltName extension of the digital certificate. | 2013-05-30 |
20130138954 | MODE SENSITIVE ENCRYPTION - Mechanisms are provided to implement framework level mode specific file access operations. In a mode such as a work or enterprise mode, read and write accesses are directed to one or more secured locations. File data and metadata may be secured with encryption and/or authentication mechanisms. Conventional mobile solutions provide only for mode encryption distinctions at the application level, e.g. one work application may prevent access to certain data, but a different application may want to allow access to that same data. Various embodiments provide framework level mode sensitive encryption that does not require different, mutually exclusive, or possibly conflicting applications or platforms. A device and associated applications may have access to different data based on a current mode. | 2013-05-30 |
20130138955 | CLIENT-SIDE ENCRYPTION IN A DISTRIBUTED ENVIRONMENT - Methods and systems for encrypting and decrypting data are described. In one embodiment, a client computing system sends to a server computing system over a network a first network request to perform multiple operations such as a lease operation and a fetch operation. In response, the server computing system performs the operations. Subsequently, the client computing system can send subsequent network requests to write re-encrypted data and to relinquish the lease. The subsequent network requests may also be single network requests that perform lease operations, as well as other operations, such as operations for block alignment purposes. The client computing system can send an actual end of file when relinquishing the lease so that the server computing system can handle a remainder of data that is used for subsequently decrypting the re-encrypted data. | 2013-05-30 |
20130138956 | SYSTEMS AND METHODS OF AUTOMATIC MULTIMEDIA TRANSFER AND PLAYBACK - Digital rights management to protect copyrighted materials is a common element of consumers accessing content for a variety of uses including business and recreational. Such techniques have been generally deployed on small items of multimedia content such as individual tracks of music. However, at present despite the penetration of portable electronic devices for texting, telephony, email, and music their use by consumers for video, film, and large multimedia content has been limited in part due to the issues of downloading and handling individual files of hundreds or thousands of MB. It would therefore be beneficial to provide a means to download large multimedia content files and render these upon a variety of portable electronic devices whilst allowing the downloaded multimedia content to be securely stored within a portable memory device allowing the user to render the content upon their own electronic devices or other electronic devices without re-distributing the content. | 2013-05-30 |
20130138957 | MIGRATING AUTHENTICATED CONTENT TOWARDS CONTENT CONSUMER - Techniques involving migrating authenticated content on a network towards the consumer of the content. One representative technique includes a network node receiving an encrypted seed having at least a location of the user data at a network service that stores the user data, and a cryptographic key to access the user data. The seed is received in response to a user login attempt to the network service. The user data is requested from the location using at least the received cryptographic key. The method further includes receiving and storing the user data at the network node, where the network node is physically closer to a location of the user than is the location of the network service. If the user is successfully authenticated, user access is provided to the stored user data at the network node rather than from the network service. | 2013-05-30 |
20130138958 | METHOD AND APPARATUS OF MATCHING MONITORING SETS TO NETWORK DEVICES - Monitoring computer devices operating on a network is disclosed. Computer devices are all different and require monitoring settings that are tailored to their specific requirements. One example method of assigning a sample set to a network device operating on a network may include identifying the at least one network device, and identifying at least one object identifier associated with the at least one identified network device. The method may also include transmitting the at least one object identified to a memory location, and comparing the at least one object identifier to a plurality of sample sets and assigning relevancy scores to the plurality of sample sets based on the comparison. The method may also include assigning at least one sample set having a greater relevancy score than the other sample sets to the at least one network device. The sample sets may be SNMP sample sets. | 2013-05-30 |
20130138959 | Enabling Users to Select Between Secure Service Providers Using a Central Trusted Service Manager - Systems and methods are described herein for enabling users to select from available secure service providers (each having a Trusted Service Manager (“TSM”)) for provisioning applications and services on a secure element installed on a device of the user. The device includes a service provider selector (“SPS”) module that provides a user interface for selecting the secure service provider. In one embodiment, the SPS communicates with a key escrow service that maintains cryptographic keys for the secure element and distributes the keys to the user selected secure service provider. The key escrow service also revokes the keys from deselected secure service providers. In another embodiment, the SPS communicates with a central TSM that provisions applications and service on behalf of the user selected secure service provider. The central TSM serves as a proxy between the secure service providers and the secure element. | 2013-05-30 |
20130138960 | Systems and Methods for Secure Communication Using a Communication Encryption Bios based Upon a Message Specific Identifier - An apparatus and methods of securely communicating a message between a first device and a second device using a message specific identifier is disclosed. The method begins by receiving the message and the message specific identifier from the first device by the second device where the message specific identifier is associated with one or more attributes associated with the message and the first device. A decryption key request is transmitted to a server in communication with the second device, wherein the decryption key request is based upon the message specific identifier received and a second device attribute. A decryption key is received from the server, wherein the decryption key is based on the message specific identifier and a stored random character set. The encrypted message is then decrypted using the received decryption key. | 2013-05-30 |
20130138961 | COMMUNICATION TERMINAL, COMMUNICATION SYSTEM, COMMUNICATION METHOD AND COMMUNICATION PROGRAM - A communication terminal that can adjust which section of a one-time pad cipher key is used and achieve cipher communication when there is a possibility that the one-time pad cipher keys are not completely matched between communication terminals. A cipher key transfer device acquires a one-time pad cipher key from a key sharing system, divides the acquired one-time pad cipher key with a predetermined number of bits, and transfers the same to a mobile communication terminal after converting the same into one-time pad cipher key cartridges. Along with the partner's terminal, the mobile communication terminal negotiates which one-time pad cipher key cartridge will be used to perform cipher communication, decides the one-time pad cipher key cartridge to be used, and begins cipher communication. | 2013-05-30 |
20130138962 | CONTROL METHOD, PROGRAM AND SYSTEM FOR LINK ACCESS - A plurality of users is assumed in which user A is the owner of content providing the source of a link, user B is the owner of the content providing the destination of the link, and user C is a viewer. Each user has a private key and a public key, and the public keys are shared by the users. User B selects user C in advance as a viewer. User B creates data including a value in which an encryption key with a proxy signature generated on the basis of the public key of user C and its own private key is encrypted using the public key of user A, and distributes the data to user A, which is the owner of the content providing the source of the link. User A decrypts the received data including the value using its own private key. This makes a function available based on encryption with the proxy signature. User A converts the link information using this function, signs the information using its own private key, and sends it to user C. User C verifies the signature by checking the received information using the public key of user A and the public key of user B, extracts the link information generated by user A using the function, decrypts it using its own private key, and obtains the link information. | 2013-05-30 |
20130138963 | STATE-MAINTAINED MULTI-PARTY SIGNATURES - A hash module of a mail sender creates a hash data context structure. The hash module processes the headers and the body of an e-mail message in the order required, for example by the DKIM specification, until the data to be hashed has been input. The hash module converts the context structure into printable characters and the encoded structure is transmitted over the Internet or other network to the next participating system. The token authority's hash module decodes the context back into binary form. After ensuring business logic is satisfied, it generates additional headers required for signature, which are then added to the developing hash. The hash module finalizes the hash function and creates the hash value. The authorization module creates the signature and returns it to the e-mail module, which attaches the signature to the message and transmits it to the destination mailbox provider, which verifies the token. | 2013-05-30 |
20130138964 | VERIFICATION OF AUTHENTICITY AND RESPONSIVENESS OF BIOMETRIC EVIDENCE AND/OR OTHER EVIDENCE - Authenticity and responsiveness of evidence (e.g., biometric evidence) may be validated without regard for whether there is direct control over a sensor that acquired the evidence. In some implementations, only a data block containing evidence that is (1) appended with a server-generated challenge (e.g., a nonce) and (2) signed or encrypted by the sensor may validate that the evidence is responsive to a current request and belongs to a current session. In some implementations, trust may be established and/or enhanced due to one or more security features (e.g., anti-spoofing, anti-tampering, and/or other security features) being collocated with the sensor at the actual sampling site. | 2013-05-30 |
20130138965 | CONTROL METHOD, PROGRAM AND SYSTEM FOR LINK ACCESS - A plurality of users is assumed in which user A is the owner of content providing the source of a link, user B is the owner of the content providing the destination of the link, and user C is a viewer. Each user has a private key and a public key, and the public keys are shared by the users. User B selects user C in advance as a viewer. User B creates data including a value in which an encryption key with a proxy signature generated on the basis of the public key of user C and its own private key is encrypted using the public key of user A, and distributes the data to user A, which is the owner of the content providing the source of the link. User A decrypts the received data including the value using its own private key. This makes a function available based on encryption with the proxy signature. User A converts the link information using this function, signs the information using its own private key, and sends it to user C. User C verifies the signature by checking the received information using the public key of user A and the public key of user B, extracts the link information generated by user A using the function, decrypts it using its own private key, and obtains the link information. | 2013-05-30 |
20130138966 | INFORMATION PROCESSING APPARATUS AND METHOD THEREFOR - Electronic data is input. The electronic data is divided into N (N is an integer satisfying N≧2) segments. Examination data is generated by repeating, up to the Nth segment, the computation processing of using the computation result obtained by performing predetermined computation on the data of the Mth (M is an integer satisfying 1≦M≦N−1) segment as an input for predetermined computation of the data of the (M+1)th segment. Verification data for the electronic data is generated so as to contain, as intermediate data, the examination data and a computation result in the middle of generating the examination data. | 2013-05-30 |
20130138967 | Method and System for Replaying a Voice Message and Displaying a Signed Digital Photograph Contemporaneously - Systems and methods for generating authentic digital memorabilia are described. A signor may be provided a digital photograph. The signor's signature, written message, or voice message may be received. Biometric authentication or verification may be performed on the signor's handwriting or voice sample through comparison with stored samples. If the verification signifies a high likelihood signor's handwriting or voice sample is authentic, creation of digital memorabilia is performed by embedding signor's signature or written message in a digital photograph and linking the signor's voice message with the photograph. The digital memorabilia is accompanied by a certificate of authenticity and distributed to a customer or displayed on a website. | 2013-05-30 |
20130138968 | GRAPHICAL ENCRYPTION AND DISPLAY OF CODES AND TEXT - The present invention provides an image-based encryption and decryption technique where the user uses pre-chosen image categories to create an encryption/decryption key. The encryption key can be used to encrypt alphanumeric strings such as a confirmation code or other information. The user uses the decryption key, i.e., knowledge of the chosen image categories) to decrypt and recover the original message. For example, upon presentation of a grid of images, the user selects certain images contained therein that match the pre-chosen image categories to recover the original message. | 2013-05-30 |
20130138969 | PREVENTING GLITCHING OF A FIRMWARE IMAGE USING ONE OR MORE LAYERS OF RANDOMNESS - Layers and elements of randomness are introduced to the firmware image comparison process to prevent hackers from glitching or tampering with the firmware image on a computing device. A hash function is applied to the firmware image thereby obtaining a first hash value. Random blocks of data are selected from the firmware image before it is hashed. Each or some of the random blocks of the firmware image are hashed thereby providing a hash value for the random blocks. The hash values are combined to derive a second hash value. The first hash value and the second hash value are combined to derive a final hash value. The final hash value is digitally signed and compared to a stored hash value. If the two match, a random non-zero value is stored in the relevant register. | 2013-05-30 |
20130138970 | Deleting Encoded Data Slices in a Dispersed Storage Network - A method begins by a dispersed storage (DS) processing module receiving a request regarding at least a portion of corresponding encoded data slices, wherein a collection of encrypted and encoded data slices of a plurality of collections of encrypted and encoded data slices includes a common data aspect, wherein encrypted and encoded data slices of the collection of encrypted and encoded data slices are produced by individually encrypting corresponding encoded data slices using a common encrypting character string and representations of the corresponding encoded data slices. The method continues with the DS processing module identifying the common encrypting character string of the corresponding encoded data slices. When the request is to delete the corresponding encoded data slices, the method continues with the DS processing module obfuscating the common encrypting character string in a local memory such that the collection of encrypted and encoded data slices are effectively incomprehensible. | 2013-05-30 |
20130138971 | INTELLIGENT SECURITY CONTROL SYSTEM FOR VIRTUALIZED ECOSYSTEMS - Resources of a virtualized ecosystem are intelligently secured by defining and analyzing object handling security control information for one or more logical resources in the virtualized ecosystem and deriving therefrom object properties for each of the logical resources involved in the execution of a virtual machine in any given context within the virtualized ecosystem. | 2013-05-30 |
20130138972 | PROTECTION OF SECURITY PARAMETERS IN STORAGE DEVICES - Security parameters used to encrypt data stored on a storage device may be protected using embodiments of systems and methods described herein. During a resize operation, data stored on a memory unit in the storage device may be altered prior to communicating an updated partition size to a host computer. In some examples, data is altered prior to storing the updated partition sizes in the storage device. In this manner, a host system may not receive the updated partition sizes until after the data is altered. Altering data may avoid exposure encrypted data, information about one or more security parameters used to encrypt data on the memory unit or decrypt data retrieved from the memory unit, or combinations thereof. | 2013-05-30 |
20130138973 | SYSTEM AND METHOD FOR DATA OBFUSCATION BASED ON DISCRETE LOGARITHM PROPERTIES - Disclosed herein are systems, computer-implemented methods, and computer-readable storage media for obfuscating data based on a discrete logarithm. A system practicing the method identifies a clear value in source code, replaces the clear value in the source code with a transformed value based on the clear value and a discrete logarithm, and updates portions of the source code that refer to the clear value such that interactions with the transformed value provide a same result as interactions with the clear value. This discrete logarithm approach can be implemented in three variations. The first variation obfuscates some or all of the clear values in loops. The second variation obfuscates data in a process. The third variation obfuscates data pointers, including tables and arrays. The third variation also preserves the ability to use pointer arithmetic. | 2013-05-30 |
20130138974 | SYSTEM AND METHOD FOR ENCRYPTING AND STORING DATA - A computing device connects with a vision measuring machine (VMS). Then the computing device generates a one time password (OTP). A size of the OTP, the OTP are stored in a predefined file. The computing device obtains a size of measurement program codes of the VMS. The size of the OTP and the size of the measurement program codes are stored in the predefined file. The measurement program codes are encrypted by the OTP. If the measurement data includes image data of an object which is measured by the VMS, the computing device stores the encrypted program codes, a type of the image data, image data, and a size of the image data in the predefined file. | 2013-05-30 |
20130138975 | PROTECTION OF MEMORY AREAS - A method for loading a program, contained in at least a first memory, into a second memory accessible by an execution unit, in which the program is in a cyphered form in the first memory, a circuit for controlling the access to the second memory is configured from program initialization data, instructions of the program, and at least initialization data being decyphered to be transferred into the second memory after configuration of the circuit. | 2013-05-30 |
20130138976 | PROCESSOR, CONTROLLER, AND INPUT/OUTPUT DEVICE POWER REDUCTION AND OPTIMIZATION - Embodiments of the present invention provide a processor design that enables controller and I/O device power reduction and optimization. In a typical embodiment, a processing core is coupled to a set (e.g., three) of I/O blocks. The processing core provides for selective activation and/or deactivation of any of the I/O blocks. Two of the I/O blocks are coupled to individual voltage I/O components as well as individual external circuits. In one embodiment, the individual external circuits are coupled to individual voltage control components. | 2013-05-30 |
20130138977 | METHOD AND APPARATUS FOR ADJUSTING POWER CONSUMPTION LEVEL OF AN INTEGRATED CIRCUIT - Briefly, a method and apparatus adjusts the power consumption level of an integrated circuit by dynamically scaling the clock frequency based on the real-time determined power consumption level. In one example, the method and apparatus changes an actual clock frequency of the integrated circuit to an effective clock frequency based on the maximum clock frequency and the difference between the threshold power consumption level and the actual power consumption level of the integrated circuit in the previous sampling interval. In one example, an effective clock frequency of the integrated circuit in the current sampling interval is determined. In one example, the difference between the maximum and effective clock frequencies in the current sampling interval is proportional to the difference between the threshold and actual power consumption levels in the previous sampling interval. The actual clock frequency of the integrated circuit is changed to the determined effective clock frequency. | 2013-05-30 |
20130138978 | Charge Recycling Between Power Domains of Integrated Circuits - A mechanism is provided for efficiently recycling a charge from a power domain that is discharging. A side of a discharging power domain normally coupled to a voltage supply is disconnected from the voltage supply. The side of the precharging power domain normally coupled to the voltage supply is currently disconnected from the voltage supply. The side of the discharging power domain normally coupled to the voltage supply is connected to a side of the precharging power domain normally coupled to the voltage supply. A side of the discharging power domain normally coupled to the ground is disconnected from ground. The side of the discharging power domain normally coupled to ground is connected to the voltage supply, thereby precharging the precharging power domain with the charge from the discharging power domain that would normally he lost due to leakage. | 2013-05-30 |
20130138979 | SERVER RACK SYSTEM - A server rack system includes a first network switch, a second network switch, servers, a rack internal device, and an integrated management module (IMM). Management network ports of baseboard management controllers (BMCs) of the servers are connected to the first network switch. A management network port of the rack internal device is connected to the second network switch. A first management network port and a second management network port of the IMM are respectively connected to the first network switch and the second network switch. The IMM communicates with the BMCs of the servers through the first network switch, so as to obtain operation states of the servers, or control operations of the servers. The IMM communicates with the rack internal device through the second network switch, so as to obtain an operation state of the rack internal device, or control an operation of the rack internal device. | 2013-05-30 |
20130138980 | SERVER RACK SYSTEM FOR MANAGING POWER SUPPLY - A server rack system for managing power supply is provided. The system includes: a first LAN switch, a plurality of servers, at least one power supply unit, and an IMM. The first LAN switch is coupled to a management network. Each of the servers has a BMC. The BMC has a management network port connected to the management network. The power supply unit supplies electric power to the server rack system and has a management network port connected to the management network. The IMM has a management network port connected to the management network, visits the BMCs through the management network to acquire a power consumption value of the servers, generates a control command according to the power consumption value of the servers, and transmits the control command through the management network to the power supply unit. The power supply unit adjusts electric power output according to the control command. | 2013-05-30 |
20130138981 | POWER DISTRIBUTION METHOD AND SERVER SYSTEM USING THE SAME - A power distribution method suitable for a server system is provided. In the method, an average power is respectively supplied to activated motherboards, an expected power of each activated motherboard is read, and the expected power and the average power are compared, where if the expected power is greater than the average power, a first state is defined, and if the expected power is less than the average power, a second state is defined. Then, the expected powers of the motherboards defined as the second state and the average power are calculated to obtain a first remaining power. Then the first remaining power is averagely distributed to the motherboards defined as the first state. This method is capable of dynamically distributing power according to the needs of each of the motherboards and providing sufficient powers to the motherboards for operation. | 2013-05-30 |
20130138982 | POWER CONSUMPTION MANAGEMENT IN COMMUNICATION SYSTEM - Representative implementations of devices and techniques provide an efficient communication that enables nodes in a reduced power consumption state to resume a regular power state (e.g., fully operational) or otherwise another power state (e.g., semi-operational) after processing the communication. | 2013-05-30 |
20130138983 | AUTOMATED FEATURE CONTROL ON BATTERY LIMITED DEVICES - The present invention introduces a method for saving power in battery limited devices. The invention handles profile properties, which may e.g. be User Interface activity, Bluetooth connection success, email fetch success or WLAN connection success. A value of the property is saved into a memory, e.g. once an hour for the whole calendar week, thus forming a trend value which is regularly updated. Certain behavior patterns may then be seen. When changes in the trend occur with different users or as differences compared to a usual behavior in a calendar week, for instance, the characteristics of the device are altered accordingly in order to minimize power usage. | 2013-05-30 |
20130138984 | Extending RunTime with Battery Ripple Cancellation Using CPU Throttling - Methods of extending runtime with battery ripple cancellation in a CPU based system by providing a CPU that includes an input pin capable of throttling the power consumed by the CPU responsive to the input of a throttling signal, sensing a ripple in the form of a decrease in voltage or an increase in current responsive to a load on a CPU power supply, and when the ripple exceeds a predetermined limit, providing a throttling signal to the input pin to throttle the CPU to reduce the ripple. | 2013-05-30 |
20130138985 | POWER MANAGEMENT USING RELATIVE ENERGY BREAK-EVEN TIME - Systems and methods may provide for determining an absolute energy break-even time for a first low power state with respect to a current state of a system. A relative energy break-even time may also be determined for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time. In addition, an operating state may be selected for the system based on at least in part the relative energy break-even time. | 2013-05-30 |
20130138986 | IMAGE FORMING APPARATUS AND POWER CONTROL METHOD THEREOF - An image forming apparatus includes a volatile memory and System-on-Chip (SoC) part. The SoC part includes an internal memory, a CPU for accessing the volatile memory in the normal mode; an interface part for receiving a external signal, and a control part for, when the interface part has no input during a first preset time, copying information stored to the volatile memory to the internal memory and converting to a first power saving mode to lower an operating frequency of the volatile memory and an operating frequency of the CPU, and when a normal mode switch signal is not input during a second preset time in the first power saving mode, controlling the CPU to access the information copied to the internal memory and converting to a second power saving mode to change the volatile memory to a self-refresh mode. | 2013-05-30 |
20130138987 | METHOD FOR ENTERING IDLE MODE AND MOBILE TERMINAL FOR IMPLEMENTING SUCH METHOD - The present invention discloses a method for entering into an idle mode comprising: a mobile terminal getting ready to enter into an idle state; and determining whether a data connection exists currently, and if the data connection exists, sending a connection release message to a network side, and the mobile terminal entering into the idle state after receiving a reply message, if the data connection does not exist, the mobile terminal entering into the idle state directly. The present invention further discloses a mobile terminal to which the method is applied. Using the method and mobile terminal described above, the mobile terminal can enter into the idle state directly, thereby avoiding waste of electricity in the state transition process and extending the idle time of the mobile terminal. | 2013-05-30 |
20130138988 | SERVER RACK SYSTEM - A server rack system includes a rack, a rack management module, a plurality of servers, a management network connection module and a power module. The rack management module is located in the rack and coupled to a management network line. The servers are located in the rack and respectively have a baseboard management controller (BMC), in which each of the BMCs is used for monitoring a working state of the server where the BMC resides. The power module provides a working voltage required by the rack management module, the management network connection module and the servers. The rack management module obtains overall power consumption information through the power module, and obtains power consumption information of each of the servers through the management network line, and is used for managing the servers according to the overall power consumption information and the power consumption information of each of the servers. | 2013-05-30 |
20130138989 | BATTERY MANAGING METHOD AND APPARATUS, AND ELECTRONIC DEVICE USING THE SAME - A battery managing method and apparatus, and an electronic device using the method and apparatus, to manage a power consumption amount of a battery in the electronic device such that a user may use the electronic device for a desired time period. The power consumption of the battery in the electronic device is measured and the user is notified that the battery is being overly used based on the desired time period of the user such that the user may manage the battery consumption of the electronic device. | 2013-05-30 |
20130138990 | DIGITAL COMPONENT POWER SAVINGS IN A HOST DEVICE AND METHOD - A control arrangement, for example, in a digital component that forms part of a system, draws an input current for its operation and is configured for monitoring an interface for any one of a group of commands and, upon detecting an issued one of the group of commands, operates the component for executing the issued command in an operational mode, and during an idle time on the interface, the control arrangement exclusively monitors the interface for any one of the group of commands such that the input current is limited to a leakage current. The component may draw less than 1 milliamp of current during the idle mode. | 2013-05-30 |
20130138991 | CLOCK SYNCHRONIZATION IN AN IMPLANTABLE MEDICAL DEVICE SYSTEM - This disclosure is directed to the synchronization of clocks of a secondary implantable medical device (IMD) to a clock of a primary IMD. The secondary IMD includes a communications clock. The communications clock may be synchronized based on at least one received communications pulse. The secondary IMD further includes a general purpose clock different than the communications clock. The general purpose clock may be synchronized based on at least one received power pulse. The communications clock may also be synchronized based on the at least one received power pulse. | 2013-05-30 |
20130138992 | Preventing Disturbance Induced Failure In A Computer System - A system and a computer program product for executing a method to prevent failure on a server computer due to internally and/or externally induced shock and/or vibration. The method includes acquiring, by at least one sensor, analog acceleration data of components in a server computer. The data is then converted to digital format and stored within a motor drive assembly processor memory unit. The processor analyzes the stored data for existence of machine degradation. In response to detecting the existence of machine degradation, the motor drive assembly processor initiates remediation procedures. The remediation procedures include controlling rotating speed of moving devices or performing a complete system shut down. | 2013-05-30 |
20130138993 | VOLTAGE CONTROL - An apparatus for controlling a supply voltage to an electronic processing arrangement comprising a processor or a memory element, the apparatus being configured to receive an output of the electronic processing arrangement and comprising: error detection means for detecting errors in an output of the electronic processing arrangement; and means for adaptively varying the supply voltage to the electronic processing arrangement based on an analysis of errors detected in the output of the electronic processing arrangement. The apparatus may further comprise means for correcting errors detected in the output of the electronic processing arrangement. | 2013-05-30 |
20130138994 | Preventing Disturbance Induced Failure in A Computer System - A method to prevent failure on a server computer due to internally and/or externally induced shock and/or vibration. The method includes acquiring, by at least one sensor, analog acceleration data of components in a server computer. The data is then converted to digital format and stored within a motor drive assembly processor memory unit. The processor analyzes the stored data for existence of machine degradation. In response to detecting the existence of machine degradation, the motor drive assembly processor initiates remediation procedures. The remediation procedures include controlling rotating speed of moving devices or performing a complete system shut down. | 2013-05-30 |
20130138995 | DYNAMIC HYPERVISOR RELOCATION - A method for managing multiple nodes hosting multiple memory segments, including: identifying a failure of a first node hosting a first memory segment storing a hypervisor; identifying a second memory segment storing a shadow of the hypervisor and hosted by a second node; intercepting, after the failure, a hypervisor access request (HAR) generated by a core of a third node and comprising a physical memory address comprising multiple node identification (ID) bits identifying the first node; modifying the multiple node ID bits of the physical memory address to identify the second node; and accessing a location in the shadow of the hypervisor specified by the physical address of the HAR after the multiple node ID bits are modified. | 2013-05-30 |
20130138996 | NETWORK AND EXPANSION UNIT AND METHOD FOR OPERATING A NETWORK - A network, in particular an Ethernet network, contains as network elements at least two network components that are interconnected by a network transmission line. Accordingly, at least one expansion unit having two external ports is disposed in the network line for extending the scope thereof, wherein the expansion unit forwards a failure of the network transmission line at one of the ports thereof to a port of the next subsequent network element. | 2013-05-30 |
20130138997 | RACK SYSTEM - A rack system is provided. The rack system includes a first rack apparatus and a second rack apparatus. The first rack apparatus includes multiple first rack internal devices and a first Integrated Management Module (IMM). The first IMM manages the first rack internal devices via a network. The second rack apparatus includes multiple second rack internal devices and a second IMM. The second IMM manages the second rack internal devices via the network. The first IMM and the second IMM are connected via the network and implement a synchronous configuration process. When the second IMM goes abnormal, the first IMM manages the first rack internal devices and the second rack internal devices via the network at the same time. | 2013-05-30 |
20130138998 | METHOD FOR SWITCHING APPLICATION SERVER, MANAGEMENT COMPUTER, AND STORAGE MEDIUM STORING PROGRAM - It is provided a management computer which refers to switching level information including switching patterns to be used at a time of switching the first task to the second application server; sets a level of a degree of safety for each of the switching patterns; refers to a stop time for each first task which is allowed upon switching the first task to the second application server; selects one of the switching patterns having a switching time that is shorter than the stop time of the task requirement information which is set to the first task and having the level of the degree of safety that is highest among the switching patterns of the switching level information; stops the second task of the second application server by the selected one of the switching patterns; and then controls the second application server to provide the first task. | 2013-05-30 |
20130138999 | COMPUTER-READABLE RECORDING MEDIUM, DATA MANAGEMENT METHOD, AND STORAGE DEVICE - An internode put requesting unit detects a time-out with respect to a put request issued to the next node in the order of a multiplexing chain and notifies a put/get executing unit of the time-out. The put/get executing unit sends an error to the previous node in the order of the multiplexing chain or a client and instructs a put-failed-data synchronizing unit to synchronize data failed to be put, and the put-failed-data synchronizing unit performs a synchronization process. A primary makes other put requests wait until completion of the synchronization process. Furthermore, when having received the error, the client issues a get request to the tail end of the multiplexing chain. | 2013-05-30 |
20130139000 | Storage Apparatus and Method of Cooling Storage Apparatus - Provided is a storage apparatus for providing a logical storage area as a data storage area to an external apparatus, comprising: a physical storage medium for creating the logical storage area; first and second storage control modules each of which is communicatively coupled to the physical storage medium to control data input/output processing between the external apparatus and the logical storage area; and first and second power supply modules each of which supplies power to the physical storage medium and the first and second storage control modules and includes a blower for generating a cooling airflow to cool down the physical storage medium and the first and second storage control modules, wherein the blower of the first power supply module generates a first cooling airflow which flows through the physical storage medium, the first storage control module, and the first power supply module, the blower of the second power supply module generates a second cooling airflow which flows through the physical storage medium, the second storage control module, and the second power supply module, and in a case where the first power supply module is removed from the storage apparatus, the blower of the second power supply module generates a third cooling airflow which flows through the physical storage medium, the first storage control module, and the second power supply module as a replacement for the first cooling airflow. | 2013-05-30 |
20130139001 | ONLINE DEBUG SYSTEM AND ONLINE DEBUG METHOD FOR INFORMATION PROCESSING DEVICE - An online debug system for an information processing device is provided that enables easily connecting a debug device for online debugging to an information processing device while maintaining minimum required functions of the information processing device as a product. The online debug system has a debug device that transfers a directive from outside to thereby debug a navigation system. The navigation system includes a debug daemon that debugs the navigation system and a data expansion unit that reads a communication driver group stored in a USB memory via a connection terminal and validates it. A serial communication driver as the communication driver group validated in the navigation system enables the debug device to communicate with the debug daemon. | 2013-05-30 |
20130139002 | DEBUGGING METHOD AND COMPUTER SYSTEM USING THE SAME - A debugging method for a plurality of processor cores is disclosed, which includes defining a debug data transmitting zone in a storage device, utilizing a first processor core for generating a debug data and transmitting the debug data to a second processor core via the debug data transmitting zone for debugging. | 2013-05-30 |
20130139003 | Test Data Generation - Systems and methods for test data generation are described. In one implementation, the method includes receiving seed data having one or more characteristics. Further, the method includes obtaining a selection criterion indicating a selected portion of the seed data to be transformed. Based on the selection criterion, the seed data is transformed for at least a plurality of iterations to generate test data. The test data comprise a plurality of data sets including a primary data set generated in a first iteration and a secondary data set generated in each subsequent iteration. The primary data set includes transformed data corresponding to the selected portion of the seed data and non-transformed data corresponding to a remaining portion of the seed data and each secondary data set includes transformed data corresponding to the selected portion of the seed data. | 2013-05-30 |
20130139004 | TEST MODULE GENERATION APPARATUS, TEST PROCEDURE GENERATION APPARATUS, GENERATION METHOD, PROGRAM, AND TEST APPARATUS - Provided is a test module generation apparatus that generates a test module executed on a test apparatus for testing a device under test. The apparatus includes a condition file generating section in which a test condition is input and that generates a condition file specifying the input test condition, a test method storing section that stores a test method, a test method selecting section that receives, from a user, a selection instruction of the test method adapted to the test module to be generated, a condition file selecting section that receives, from a user, a selection instruction of the condition file corresponding to a parameter which the selected test method requires, and a test module generating section that generates the test module in which a test according to the selected test method is executed with a parameter specified by the condition file. | 2013-05-30 |
20130139005 | USB TESTING APPARATUS AND METHOD - A Universal Serial Bus (USB) testing apparatus includes a Central Processing Unit (CPU); a Southbridge; a Baseboard Management Controller (BMC), connected with the Southbridge via USB. The BMC determines if a test starts or finishes, generates a first instruction of creating a virtual control computer when determining the test starts, creates a control module and a comparing module in a memory unit which are running to become the virtual control computer, and connects the memory unit with the BMC according to the first instruction. The control module sends control data to the CPU. The comparing module obtains feedback data from the CPU and compares the control data with the obtained data to determine if the control data is consistent with the obtained data, thereby determining whether the USB is working normally. | 2013-05-30 |
20130139006 | SYSTEMS AND METHODS OF MEDIA MANAGEMENT, SUCH AS MANAGEMENT OF MEDIA TO AND FROM A MEDIA STORAGE LIBRARY - A system and method for determining media to be exported out of a media library is described. In some examples, the system determines a media component to be exported, determines the media component is in the media library for a specific process, and exports the media component after the process is completed. | 2013-05-30 |
20130139007 | NONVOLATILE CACHE MEMORY, PROCESSING METHOD OF NONVOLATILE CACHE MEMORY, AND COMPUTER SYSTEM - Disclosed is a nonvolatile cache memory including a nonvolatile memory part and a cache controller. The nonvolatile memory part is configured to store cache data. The cache controller is configured to control reading and writing of the cache data with respect to the nonvolatile memory part. Further, the cache controller is configured to perform, as a preparation for an interruption of power supply, standby preparation processing to generate standby state data and store the generated standby state data in the nonvolatile memory part. Further, the cache controller is configured to perform, at resumption of the power supply, restoration processing of the cache data stored in the nonvolatile memory part using the standby state data. | 2013-05-30 |
20130139008 | METHODS AND APPARATUS FOR ECC MEMORY ERROR INJECTION - An error injection module for injecting errors into an ECC memory selects a target address associated with the ECC memory, selects an error injection pattern, and sets a redirect address of the scrubber to the target address. During an injection mode of the scrubber, the error injection module injects the error injection pattern into the target address of the ECC memory with the scrubber. | 2013-05-30 |
20130139009 | SCHEDULING FOR ENHANCING COMMUNICATION PERFORMANCE - Technologies are generally described for enhancing communication performance. In some examples, a scheduling system may include an error detection unit configured to detect existence of an error in data received from a telecommunication device, an error frequency calculation unit configured to calculate an error frequency based at least in part on the error detected by the error detection unit, and a mode decision unit configured to decide a scheduling mode for the telecommunication device based at least in part on the error frequency calculated by the error frequency calculation unit. | 2013-05-30 |
20130139010 | CIRCUIT AND METHOD FOR EFFICIENT MEMORY REPAIR - A circuit and method of testing a memory and calculating a repair solution for a given address location includes pausing a built in self test (BIST) operation on detection of a failing memory output data of an integrated circuit. During the pause, the circuit and method analyzes “n” number of groups of the failing memory output data during “n” cycles using analysis logic and calculating a repair solution. Normal operations can be resumed. | 2013-05-30 |
20130139011 | PREDICTING DEGRADATION OF A COMMUNICATION CHANNEL BELOW A THRESHOLD BASED ON DATA TRANSMISSION ERRORS - Applicants have discovered that error detection techniques, such as Forward Error Correction techniques, may be used to predict the degradation below a certain threshold of an ability to accurately convey information on a communication channel, for example, to predict a failure of the communication channel. In response, transmission and/or reception of information on the channel may be adapted, for example, to prevent the degradation below the threshold, e.g., prevent channel failure. Predicting the degradation may be based, at least in part, on data transmission error information corresponding to one or more blocks of information received on the channel and may include determining an error rate pattern over time. Based on these determinations, the degradation below the threshold may be predicted and the transmission and/or reception adapted. Adapting may include initiating use of a different error encoding scheme and/or using an additional communication channel to convey information. | 2013-05-30 |
20130139012 | APPARATUS, METHODS, AND SYSTEM OF NAND DEFECT MANAGEMENT - Various embodiments comprise apparatus, methods, and systems including method comprising searching for a group address among a plurality of group addresses in a mapping table, and if a match is found, performing a memory operation on a first plurality of memory blocks indicated by the mapping table, and if a match is not found, performing a memory operation on a second plurality of memory blocks, the second plurality of memory blocks having the group address. | 2013-05-30 |
20130139013 | LOW LEAKAGE CURRENT OPERATION OF INTEGRATED CIRCUIT USING SCAN CHAIN - An integrated circuit (IC) having a low leakage current mode of operation has a number of modules for running respective applications. The modules have respective cells and respective test scan chain elements. The IC also has a controller for configuring an active module to operate in a functional mode and a selected inactive module to operate in a low leakage current mode. Configuring the selected inactive module to operate in low leakage current mode includes enabling scan mode of the selected inactive module, and applying a low leakage vector of input signals from the controller to the cells of the inactive module using the scan chain. Functional data outputs of the inactive module are disabled during low leakage current mode. In the meantime, the active modules continue to operate in the functional mode. | 2013-05-30 |
20130139014 | VERIFYING AND DETECTING BOUNDARY SCAN CELLS TO INPUT/OUTPUT MAPPING - In some embodiments, a computer-implemented method includes receiving, in a processor, a device description code identifying components of a device and connections between the components, wherein some of the components and connections form boundary cells used for testing the device. The method can include processing, in the processor, the device description code to determine that the components and the connections meet a standard governing components and connections necessary for the boundary cells. The method can also include traversing the connections between the components to determine that the connections meet the standard, and reporting, via one or more output devices, that the device complies with the standard. | 2013-05-30 |
20130139015 | METHODS AND APPARATUS FOR TESTING MULTIPLE-IC DEVICES - Embodiments of integrated circuits include a first input interconnect, a second input interconnect, an output interconnect, a shift register, a select register, a test access port (TAP) controller, and select register decode circuitry. The TAP controller is coupled to the first input interconnect and the select register, and the TAP controller is configured to shift a select value provided on the first input interconnect into the select register. The select register decode circuitry is configured to control, based on the select value, which of a plurality of test data output signals are provided to the output interconnect, where the plurality of test data output signals includes a first test data output signal and a second test data output signal. The first test data output signal is provided by the shift register, and the second test data output signal is received from a second integrated circuit on the second input interconnect. | 2013-05-30 |
20130139016 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, METHOD OF CONTROLLING THE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND INFORMATION PROCESSING SYSTEM - A debug system scans a scan memory element group having a plurality of scan memory elements which are connected in series in a semiconductor integrated circuit device and collects data in the scan memory element group. The semiconductor integrated circuit device has an end code register which is provided between an input terminal and an input side of the scan memory element group and holds an end code, a start code register which is provided between an output terminal and an output side of the scan memory element group and holds a start code, and a scan control circuit which controls shift operations of the scan memory element group, the end code register and the start code register, and outputs scan data to the output terminal. | 2013-05-30 |
20130139017 | 1149.1 TAP LINKING MODULES - IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations. | 2013-05-30 |
20130139018 | COMMUNICATION SYSTEM AND COMMUNICATION APPARATUS - In a network in which a plurality of ECUs are connected to one another with a common bus, one or more slots are allocated to each ECU in advance, and the plurality of ECUs cyclically transmit messages in an order prescribed in relation to the slots. When each ECU transmits the message related to one slot, each ECU creates and transmits a message including data to be transmitted to other ECUs, and information representing respectively a success/failure of the message reception related to other slots. Each ECU checks information of ACK field included in a message received during one cycle from message transmission related to one slot to a next message transmission related to said one slot. When the message related to one slot is not accurately received by the other ECUs, retransmits the message in the next transmission related to said one slot. | 2013-05-30 |
20130139019 | Unidirectional Error Code Transfer for Both Read and Write Data Transmitted Via Bidirectional Data Link - A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition. | 2013-05-30 |
20130139020 | METHOD OF TRANSMITTING DATA USING CONSTELLATION REARRANGEMENT - A data retransmission method using hybrid automatic repeat request (harq) includes transmitting a data block, receiving a retransmission request signal for the data block, generating a retransmission block by performing swapping or inversion between bits constituting the data block according to the retransmission request signal, and transmitting the retransmission block. | 2013-05-30 |
20130139021 | ERROR CORRECTION CODING (ECC) DECODE OPERATION SCHEDULING - A method includes receiving, at an error correction coding (ECC) controller, information indicating one or more data chunks to be decoded, populating a schedule according to an order of decoding of the data chunks, and initiating decode of the data chunks according to the schedule. | 2013-05-30 |
20130139022 | Variable Sector Size LDPC Decoder - Various embodiments of the present invention are related to methods and apparatuses for decoding data, and more particularly to methods and apparatuses for decoding variably sized blocks of data in an LDPC decoder. For example, in one embodiment an apparatus includes a low density parity check decoder operable to perform decoding of a plurality of circulant sub-matrices from an H matrix, and a controller connected to the low density parity check decoder, operable to omit any of the plurality of circulant sub-matrices from the decoding if they do not contain user data. | 2013-05-30 |
20130139023 | Variable Sector Size Interleaver - Various embodiments of the present invention are related to methods and apparatuses for interleaving data, and more particularly to methods and apparatuses for interleaving variably sized blocks of data. For example, in one embodiment an apparatus includes a data partitioner operable to partition the block of data into a real data portion and a missing bits portion. The real data portion is adapted to contain data bits from the variably sized block of data and the missing bits portion is adapted to be filled with a variable number of the data bits. The apparatus also includes at least one local interleaver operable to apply a permutation across each of a plurality of sub-portions of the real data portion and the missing bits portion, and a global interleaver operable to apply a global permutation across the real data portion. | 2013-05-30 |
20130139024 | HIGH ORDER MODULATION PROTOGRAPH CODES - Digital communication coding methods for designing protograph-based BICM that is general and applies to any modulation. The general coding framework can support not only multiple rates but also adaptive modulation. The method is a two stage lifting approach. In the first stage, an original protograph is lifted to a slightly larger intermediate protograph. The intermediate protograph is then lifted via a circulant matrix to the expected codeword length to form a protograph-based LDPC code. | 2013-05-30 |
20130139025 | CONSTRUCTION OF MULTI RATE LOW DENSITY PARITY CHECK CONVOLUTIONAL CODES - The present disclosure is directed to a device that allows the construction of multi-rate accumulative LDPC convolutional codes (LDPC CCs) based on a mother code with an arbitrary code rate. Related methods for constructing the multi-rate ALDPC-CCs are also disclosed. In one embodiment the multi rate ALDPC-CC includes an encoder for generating a first part of a codeword according to an LDPC code having a first code rate. A plurality of programmable accumulators is coupled to the encoder. The parity bit sequence produced at the output of the programmable accumulators is combined with the first part of the codeword to generate the codeword. The codeword has a second code rate that is lower than the first rate of the LDPC code. The second code rate is defined by the number of accumulators being enabled to connect to the encoder. Puncturing and rate matching techniques can further adjust the coder rate of the second codeword to a higher rate. | 2013-05-30 |
20130139026 | ACCUMULATING LDPC (LOW DENSITY PARITY CHECK) DECODER - The accumulating decoding architecture described herein is applicable to LDPC codes operating on a parity check matrix, H, consisting of CSI (Cyclic Shifted Identity) sub-matrices (or matrix sub-blocks) or permuted identity sub-matrices (or matrix sub-blocks). In such a structure, the entire LDPC matrix is broken into square sub-matrices such that each sub-matrix consists of either a CSI sub-matrix or a permuted identity sub-matrix, or a null matrix. The iterative decoding process operates by updating of APP (a posteriori probability) or gamma (γ) values and check edge message (λ) values, and this by updating one or more individual rows within a number of sub-matrix rows (or all sub-matrix or sub-block rows) are processed in parallel. The amount of parallelism is specified by the designer and is typically an integer divisor of the sub-matrix (or sub-block) size. | 2013-05-30 |
20130139027 | System and Method for Achieving Greater Than 10 Gbit/s Transmission Rates for Twisted Pair Physical Layer Devices - A system and method for achieving greater than 10 Gbit/s transmission rates for twisted pair physical layer devices. An architecture is provided that enables transmission at the next standardized transmission rate over structured cabling. | 2013-05-30 |
20130139028 | Extended Bidirectional Hamming Code for Double-Error Correction and Triple-Error Detection - An embodiment of the invention provides a method of correcting 2 bits and detecting three bit using an extended bidirectional Hamming code. A data word with length K=2 | 2013-05-30 |
20130139029 | MEMORY SYSTEM AND METHOD USING PARTIAL ECC TO ACHIEVE LOW POWER REFRESH AND FAST ACCESS TO DATA - A DRAM memory device includes several banks of memory cells each of which are divided into first and second sets of memory cells. The memory cells in the first set can be refreshed at a relatively slow rate to reduce the power consumed by the DRAM device. Error checking and correcting circuitry in the DRAM device corrects any data retention errors in the first set of memory cells caused by the relatively slow refresh rate. The memory cells in the second set are refreshed at a normal rate, which is fast enough that data retention errors do not occur. A mode register in the DRAM device may be programmed to select the size of the second set of memory cells. | 2013-05-30 |