21st week of 2010 patent applcation highlights part 14 |
Patent application number | Title | Published |
20100127228 | PLANE BRAKING DEVICE FOR ELECTRIC WINCHES AND ELECTRIC WINCH - The present invention discloses a plane braking device for electric winches and electric winch which disposes a section of hollow gear shaft, a section of core shaft, a fixing ring, a wedge shape support, a stopping piece, a braking plate, an elastic element, a wedge shape piece B, a wedge shape piece A, a braking clutch base and so on in a gear box of an electric winch. When a motor works, the section of core shaft of the motor drives the braking clutch base and the wedge shape pieces A, B to rotate, until a gap is formed between the adjacent braking plate and stopping piece between the braking clutch base and the wedge shape piece B, so that the braking effect disappears. When the motor stops suddenly, a heavy load lifted by a tight wire drum provides a reverse pulling force so that the wedge shape piece B produces a reverse thrust force to push the friction planes of the braking plate and the stopping piece, so the plane braking effect is achieved quickly. Based on the plane braking plate, the present invention can increase the braking area and the braking force and achieve safe braking. Furthermore, when there is wear of parts in long usage, so it only needs to replace the braking plate made of friction materials, which can simplify maintenance, reduce the parts costs and ensure service life of the gear box. | 2010-05-27 |
20100127229 | Drawworks - A drawworks ( | 2010-05-27 |
20100127230 | Puller Device - A puller device comprises a support set disposed on one end of a base for moving the puller device vertically and connected with a cylinder, a hydraulic pump mounted on one end of the cylinder; an adjusting assembly fixed on the action end of the support set for adjustably tilting the pulling assembly and including a fixed member secured proximate to the lower end thereof and pivotally coupled with a movable member attached on the upper end of the adjusting assembly, and first and second fastening parts extendedly arranged on the fixed and movable members respectively for inserting through a micro-adjusting post so as to adjustably move the pulling assembly vertically; a pulling assembly assembled on one end of the adjusting assembly for dissembling the large-size workpiece and including a cylinder disposed on one end thereof for driving a hook set to expand or retract to pull the workpiece. | 2010-05-27 |
20100127231 | Decorative fencing system - A customizable decorative fencing system. A plurality of stakes, configured to be driven into the ground at selected positions, have projecting portions projecting above the ground. Posts have cavities in lower distal ends thereof. Any stake projecting portion is configured to slide into any post cavity, and be frictionally, removably, interchangeably retained therein. Fence components, including base units, gate units, and end units, include post collars, and hinge collars, respectively, through which any post can slide. Removability and interchangeability of posts with respect to fence components, and removability and interchangeability of posts with respect to stakes, provides for an infinite number of possible fence configurations. | 2010-05-27 |
20100127232 | NON-VOLATILE MEMORY - A non-volatile memory ( | 2010-05-27 |
20100127233 | METHOD FOR CONTROLLED FORMATION OF THE RESISTIVE SWITCHING MATERIAL IN A RESISTIVE SWITCHING DEVICE AND DEVICE OBTAINED THEREOF - The present disclosure provides a method for controlled formation of the resistive switching layer in a resistive switching device. The method comprises providing a substrate ( | 2010-05-27 |
20100127234 | PHASE CHANGE MEMORY DEVICE HAVING AN INCREASED SENSING MARGIN FOR CELL EFFICIENCY AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device having an increased sensing margin for improved cell efficiency. The phase change memory device includes a plurality of diodes formed in an active region of a semiconductor substrate; an insulation layer pattern formed on the respective diodes; a phase change layer formed on the insulation layer pattern in such a way as not to be electrically connected with the diodes; bit lines formed over the phase change layer; and a global X-decoder line formed over the bit lines. The present invention suppresses current flow in a phase change memory device because the dummy cell string and the dummy active region are not electrically connected with each other under the global X-decoder line, whereby preventing parasitic current from being produced in the phase change memory device. | 2010-05-27 |
20100127235 | INFORMATION RECORDING/REPRODUCING DEVICE - An information recording/reproducing device includes a recording layer, and a recording circuit which records data to the recording layer by generating a phase change in the recording layer. The recording layer includes a first chemical compound having a spinel structure. The recording layer is A | 2010-05-27 |
20100127236 | Laser Diode With High Indium Active Layer And Lattice Matched Cladding Layer - A semiconductor laser diode with a high indium content is provided with a lattice matched cladding layer or layers. One or both of the cladding layers may comprise bulk aluminum gallium indium nitride in the ratio of Al | 2010-05-27 |
20100127237 | HIGH BRIGHTNESS LIGHT EMITTING DIODE STRUCTURE AND A METHOD FOR FABRICATING THE SAME - The preset invention discloses a high-brightness LED structure and a method for fabricating the same. The LED structure of the present invention comprises a silicon substrate, a metal adhesion layer, a metal reflection layer, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, which are sequentially stacked. In the method of the present invention, the P-type semiconductor layer, active layer, N-type semiconductor layer and metal reflection layer are sequentially deposited on an N-type substrate; next, the metal reflection layer is bonded to the metal adhesion layer having been formed on the silicon substrate; then, the N-type substrate is removed. The present invention uses the silicon substrate to replace the light-absorptive GaAs substrate. Therefore, the present invention can promote light efficiency and enhance brightness. | 2010-05-27 |
20100127238 | Light emitting diode - Example embodiments provide a light emitting diode (LED) having improved polarization characteristics. The LED may include wire grid polarizers on and below a light emitting unit. The wire grid polarizers may be arranged at an angle to each other. Thus, because the LED may emit a light beam in a given polarization direction, an expensive component, e.g., a dual brightness enhanced film (DBEF), is not required. Thus, manufacturing costs of a backlight unit including the LED and a display apparatus including the backlight unit may be reduced. | 2010-05-27 |
20100127239 | III-Nitride Semiconductor Light Emitting Device - The present disclosure relates to a III-nitride semiconductor light-emitting device including an n-type nitride semiconductor layer, a p-type nitride semiconductor layer doped with a p-type dopant, an active layer disposed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer and including a quantum well layer to generate light by recombination of electrons and holes, and a diffusion barrier layer disposed between the quantum well layer and the p-type nitride semiconductor layer to be in contact with both layers, having a surface formed to make the interface with the p-type nitride semiconductor layer smooth, and to prevent diffusion of the p-type dopant into the quantum well layer. | 2010-05-27 |
20100127240 | Carbon nanotube fabrication from crystallography oriented catalyst - A device and method associated with carbon nanowires, such as single walled carbon nanowires having a high degree of alignment are set forth herein. A catalyst layer is deposited having a predetermined crystallographic configuration so as to control a growth parameter, such as an alignment direction, a diameter, a crystallinity and the like of the carbon nanowire. The catalyst layer is etched to expose a sidewall portion. The carbon nanowire is nucleated from the exposed sidewall portion. An electrical circuit device can include a single crystal substrate, such as Silicon, and a crystallographically oriented catalyst layer on the substrate having an exposed sidewall portion. In the device, carbon nanowires are disposed on the single crystal substrate aligned in a direction associated with the crystallographic properties of the catalyst layer. | 2010-05-27 |
20100127241 | Electronic Devices with Carbon Nanotube Components - An electronic device has a source electrode, a drain electrode spaced apart from said source electrode, and at least one of a conducting material, dielectric material and a semiconductor material disposed between said source electrode and said drain electrode. At least one of the source electrode, the drain electrode and the semiconductor material includes at least one nanowire. | 2010-05-27 |
20100127242 | TRANSPARENT ELECTRONICS BASED ON TRANSFER PRINTED CARBON NANOTUBES ON RIGID AND FLEXIBLE SUBSTRATES - Methods and devices for transparent electronics are disclosed. According to an embodiment, transparent electronics are provided based on transfer printed carbon nanotubes that can be disposed on both rigid and flexible substrates. Methods are provided to enable highly aligned single-walled carbon nanotubes (SWNTs) to be used in transparent electronics for achieving high carrier mobility while using low-temperature processing. According to one method, highly aligned nanotubes can be grown on a first substrate. Then, the aligned nanotubes can be transferred to a rigid or flexible substrate having pre-patterned gate electrodes. Source and drain electrodes can be formed on the transferred nanotubes. The subject devices can be integrated to provide logic gates and analog circuitry for a variety of applications. | 2010-05-27 |
20100127243 | BI-LAYER PSEUDO-SPIN FIELD-EFFECT TRANSISTOR - A bi-layer pseudo-spin field-effect transistor (BiSFET) is disclosed. The BiSFET includes a first and second conduction layers separated by a tunnel dielectric. The BiSFET transistor also includes a first gate separated from the first conduction layer by an insulating dielectric layer, and a second gate separated from the second conduction layer by an insulating layer. These conduction layers may be composed of graphene. The voltages applied to the first and/or second gates can control the peak current and associated voltage value for current flow between top and bottom conduction channels, and interlayer current voltage characteristic exhibiting negative differential resistance. BiSFETs may be used to make a variety of logic gates. A clocked power supply scheme may be used to facilitate BiSFET-based logic. | 2010-05-27 |
20100127244 | Blends of Fullerene Derivatives, and Uses Thereof in Electronic Devices - Disclosed are compositions of mixed fullerene derivatives with utility in organic semiconductors, and methods of making and using such compositions. In certain embodiments, the present invention relates to compositions of mixed fullerene derivatives further comprising one or more additional fullerene-based components within specified ranges. In certain other embodiments, the invention relates to methods of producing mixed fullerene derivatives of a specific composition from mixed fullerene starting materials, or pure fullerene derivatives of a specific composition from mixed fullerene derivatives. In yet other embodiments, the invention relates to semiconductors and devices comprising a composition of the invention. | 2010-05-27 |
20100127245 | Transmitter and associated display device - The invention relates to a light transmitter comprising two electrodes facing each other, and at least one light-emitting organic layer with two ends. The thickness of the organic layer varies continuously between the two ends. The invention also relates to a display device comprising such a transmitter. | 2010-05-27 |
20100127246 | WHITE ORGANIC ELECTROLUMINESCENT ELEMENT AND LIGHTING DEVICE - Disclosed is a white light-emitting organic electroluminescent device, which is excellent in stability of emission chromaticity over a long operation period, while having high electrical efficiency, long life, excellent storage stability and excellent color rendering properties. Also disclosed is an illuminating device using such an organic electroluminescent device. Specifically disclosed is an organic electroluminescent device having a light-emitting layer between an anode and a cathode, which is characterized by comprising a light-emitting layer A having a maximum emission wavelength of not more than 480 nm and containing a phosphorescent dopant having a maximum emission wavelength of not more than 480 nm, and a light-emitting layer B arranged between the light-emitting layer A and the anode, which has a maximum emission wavelength of not less than 510 nm and contains a phosphorescent dopant. This organic electroluminescent device is also characterized in that the concentration of the phosphorescent dopant contained in the light-emitting layer A varies in the thickness direction of the light-emitting layer A. Also specifically disclosed is an illuminating device using such a white light-emitting organic electroluminescent device. | 2010-05-27 |
20100127247 | POLYMER ELECTRONIC DEVICES BY ALL-SOLUTION PROCESS - A method of producing an electronic or electro-optic device, and the devices produced, includes producing a first electrode by a solution process, producing a second electrode by a solution process, and lamination an active polymer layer between the first and second electrodes. | 2010-05-27 |
20100127248 | STACKED ORGANIC LIGHT-EMITTING DEVICE AND IMAGING APPARATUS AND IMAGE DISPLAY APPARATUS HAVING THE SAME - A stacked organic light-emitting device having a first organic compound layer and a second organic compound layer stacked on a substrate includes: a first light-emitting device in which the first organic compound layer is sandwiched between a first electrode and a second electrode; and a second light-emitting device in which the second organic compound layer is sandwiched between the second electrode and a third electrode. An electrode of a TFT circuit which is electrically connected to the third electrode is formed on the substrate in a region different from a region in which the first light-emitting device and the second light-emitting device emit light. In order to prevent the third electrode which extends to the electrode of the TFT circuit from being electrically connected to the second electrode, the second organic compound layer is formed so as to cover an end portion of the second electrode. | 2010-05-27 |
20100127249 | ELECTROPHORETIC DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME - An electrophoretic display device includes: a first substrate having a plurality of pixels formed in a plurality of vertical pixel rows and a plurality of horizontal pixel rows; a plurality of data lines formed at every vertical pixel row of the first substrate; a thin film transistor (TFT) formed at each pixel of the first substrate and including a source electrode, a drain electrode, an organic semiconductor layer, and a gate electrode; a passivation layer formed on the TFTs and the data lines of the first substrate and including a first contact hole exposing the drain electrode of the TFT and a second contact hole exposing the gate electrode of the TFT; a pixel electrode formed on the passivation layer at each pixel of the first substrate and connected with the drain electrode of the TFT via the first contact hole of the passivation layer; a plurality of gate lines formed on the passivation layer at every horizontal pixel row of the first substrate and connected with the gate electrode of the TFT via the second contact hole of the passivation layer; a second substrate attached to the first substrate in a facing manner; a common electrode formed on the second substrate; and an electrophoretic film formed between the first and second substrates. | 2010-05-27 |
20100127250 | METHOD FOR REALIZING A THIN FILM ORGANIC ELECTRONIC DEVICE AND CORRESPONDING DEVICE - A method realizes a thin film organic electronic device integrated on a substrate and includes an organic material layer and an organic thin film transistor or OTFT transistor. The method comprises: depositing the organic material layer on the substrate, the organic material layer being a conductive organic polymer; patterning by a soft-lithographic procedure the organic material layer to create a reduced portion in order to make a channel area of the OTFT transistor; masking the organic material layer by covering with a cover mask a source area and a drain area of the OTFT transistor; irradiating by ultraviolet radiation to deactivate exposed portions of the organic material layer defining the source area, the drain area and the channel area; depositing on the organic material layer a semiconductor layer; and creating on the semiconductor layer a gate area of the OTFT transistor. | 2010-05-27 |
20100127251 | Aryl-Aryl Dendrimers - Light emitting devices are described which incorporate, as the light emitting element, a dendrimer of which the constituent dendrons include a conjugated dendritic structure comprising aryl and/or heteroaryl groups connected to each other via bonds between sp | 2010-05-27 |
20100127252 | THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - Embodiments of the invention provide a thin film transistor substrate, comprising: an insulating substrate; a gate wire formed on the insulating substrate; a first gate insulating layer made of an inorganic material, formed on the gate wire and having a first insulating layer contact hole for exposing at least a part of the gate wire; a second gate insulating layer made of an organic material, formed on the first gate insulating film and having a second insulating layer contact hole corresponding to the first insulating layer contact hole; a source electrode and a drain electrode formed on the second gate insulating layer and being aparted from each other to be defining a channel area; and an organic semiconductor layer formed on the channel area. | 2010-05-27 |
20100127253 | TFT SUBSTRATE AND METHOD FOR MANUFACTURING TFT SUBSTRATE - An object of the invention is to provide a TFT substrate and a method for producing a TFT substrate which is capable of drastically reducing the production cost by decreasing the number of steps in the production process and improving production yield. A TFT substrate includes: a substrate; a gate electrode and a gate wire formed above the substrate; a gate insulating film formed above the gate electrode and the gate wire; a first oxide layer formed above the gate insulating film which is formed at least above the gate electrode; and a second oxide layer formed above the first oxide layer; wherein at least a pixel electrode is formed from the second oxide layer. | 2010-05-27 |
20100127254 | PHOTO SENSING ELEMENT ARRAY SUBSTRAT - A photo sensing element array substrate is provided. The photo sensing element array substrate includes a flexible substrate and a plurality of photo sensing elements. The photo sensing elements are disposed in array on the flexible substrate. Each of the photo sensing elements includes a photo sensing thin film transistor (TFT), an oxide semiconductor TFT and a capacitor. The photo sensing TFT is disposed on the flexible substrate. The oxide semiconductor TFT is disposed on the flexible substrate. The oxide semiconductor TFT is electrically connected to the photo sensing TFT. The capacitor is disposed on the flexible substrate and electrically connected between the photo sensing TFT and the oxide semiconductor TFT. When the photo sensing element array substrate is bent, it remains unaffected from normal operation. | 2010-05-27 |
20100127255 | CONTACT AND METHOD OF FABRICATION - The present invention provides Schottky-like and ohmic contacts comprising metal oxides on zinc oxide substrates and a method of forming such contacts. The metal oxide Schottky-like and ohmic contacts may be formed on zinc oxide substrates using various deposition and lift-off photolithographic techniques. The barrier heights of the metal oxide Schottky-like contacts are significantly higher than those for plain metals and their ideality factors are very close to the image force controlled limit. The contacts may have application in diodes, power electronics, FET transistors and related structures, and in various optoelectronic devices, such as UV photodetectors. | 2010-05-27 |
20100127256 | SEMICONDUCTOR THIN FILM, SEMICONDUCTOR THIN FILM MANUFACTURING METHOD AND SEMICONDUCTOR ELEMENT - An amorphous oxide thin film containing amorphous oxide is exposed to an oxygen plasma generated by exciting an oxygen-containing gas in high frequency. The oxygen plasma is preferably generated under the condition that applied frequency is 1 kHz or more and 300 MHz or less and pressure is 5 Pa or more. The amorphous oxide thin film is preferably exposed by a sputtering method, ion-plating method, vacuum deposition method, sol-gel method or fine particle application method. | 2010-05-27 |
20100127257 | Method of manufacturing ZnO-based thin film transistor - Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced. | 2010-05-27 |
20100127258 | LCD PANEL HAVING SHARED SHORTING BARS FOR ARRAY INSPECTION AND PANEL INSPECTION - An LCD panel includes a panel area, a plurality of shorting bars, a plurality of panel test pads, and a plurality of array test pads. The panel area includes a plurality of scan lines and a plurality of data lines. The plurality of shorting bars is located inside the panel area. The plurality of scan lines and the plurality of data lines are electrically connected to corresponding shorting bars of the plurality of shorting bars through a switch circuit. The plurality of panel test pads is located inside the panel area. The plurality of panel test pads is electrically connected to the plurality of shorting bars respectively. The plurality of array test pads is located outside the panel area. The plurality of array test pads is electrically connected to corresponding panel test pads of the plurality of panel test pads. | 2010-05-27 |
20100127259 | SEMICONDUCTOR DEVICE - A semiconductor device has a MOS transistor that has a gate connected to a first terminal, a source connected to a second terminal and a drain connected to a third terminal, a first polysilicon diode that has an anode connected to the first terminal, a first single-crystalline silicon diode that is connected to a cathode of the first polysilicon diode at a cathode thereof and to the second terminal at an anode thereof, has a reverse breakdown voltage lower than a reverse breakdown voltage of the first polysilicon diode, a second polysilicon diode that has a cathode connected to the first terminal and a second single-crystalline silicon diode that is connected to an anode of the second polysilicon diode at an anode thereof and to the third terminal at a cathode thereof, has a reverse breakdown voltage lower than a reverse breakdown voltage of the second polysilicon. | 2010-05-27 |
20100127260 | Antireflection film, antireflection film manufacturing method, and semiconductor device using the antireflection film - To improve a transmission rate of an antireflection film, the antireflection film includes: a first silicon oxide film (2), which is formed on a silicon substrate ( | 2010-05-27 |
20100127261 | THIN FILM TRANSISTOR - The thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode, an amorphous semiconductor layer over the gate insulating layer, a semiconductor layer including an impurity element imparting one conductivity type over the amorphous semiconductor layer. The amorphous semiconductor layer comprises an NH radical. Defects of the amorphous semiconductor layer are reduced by cross-linking dangling bonds with the NH radical in the amorphous semiconductor layer. | 2010-05-27 |
20100127262 | Semiconductor Element - A semiconductor element including a substrate and at least one shallow junction formed in the substrate wherein doping atoms are disposed in the shallow junction. A plurality of carbide precipitates and micro-cavities is disposed in the substrate below the at least one shallow junction. | 2010-05-27 |
20100127263 | LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A liquid crystal display device includes a gate line and a data line on a substrate crossing each other to define a pixel region; a thin film transistor in the pixel region and connected to the gate line and the data line; a pixel electrode in the pixel region and connected to the thin film transistor; and a gate pad at an end of the gate line and a data pad at an end of the data line, at least one of the gate pad and the data pad including: a pad electrode including at least one pad contact hole therein along with a passivation layer, the passivation layer on the pad electrode, at least one side of the pad contact hole having an uneven shape in plane; and a pad electrode terminal contacting inner side surfaces of the pad electrode surrounding the pad contact hole. | 2010-05-27 |
20100127264 | ORGANIC LIGHT EMITTING DISPLAY AND METHOD OF MANUFACTURING THE SAME - A top emission organic light emitting display and a method of manufacturing the same. The organic light emitting display includes a substrate, a plurality of thin film transistors (TFT) on the substrate, a plurality of first electrodes coupled to the plurality of TFTs, auxiliary electrodes having a mesh structure defining areas where the plurality of first electrodes are located, a pixel defining layer on a substantially entire area of the substrate and patterned to expose the first electrodes and the auxiliary electrodes, an organic light emission layer on the substantially entire area of the substrate including the exposed first electrodes and auxiliary electrodes, and second electrodes on the organic light emission layer. Steps are formed at lower parts of the auxiliary electrodes, and the second electrodes are coupled to the auxiliary electrodes through contact regions in which the auxiliary electrodes are exposed due to the steps. | 2010-05-27 |
20100127265 | Thin Film Transistor Array Substrate and Manufacturing Method Thereof - A thin film transistor array substrate includes a gate line disposed on a substrate, the gate line comprising a gate electrode including a lower film and an upper film thicker than the lower film, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, an ohmic contact layer formed on the semiconductor layer, a data line electrically connected to a source electrode and a drain electrode formed on the ohmic contact layer, the lower film of the gate line is in contact with the gate insulating layer at a crossing portion of the gate line and the data line and the heights of the source electrode and the drain electrode are substantially the same as or less than a height of the semiconductor layer. | 2010-05-27 |
20100127266 | THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING SAME, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING SAME - A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; a source electrode and a drain electrode provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source electrode and the drain electrode above the gate electrode. | 2010-05-27 |
20100127267 | ALTERNATIVE THIN FILM TRANSISTORS FOR LIQUID CRYSTAL DISPLAYS - Alternative thin film transistors for liquid crystal displays are disclosed. The alternative transistors can be used for panels of displays such as liquid crystal displays (LCDs), especially those having alternative pixel arrangements. These transistors can be oriented on a panel of an LCD using different, non-traditional configurations, while addressing misalignment and parasitic capacitance. | 2010-05-27 |
20100127268 | THIN FILM TRANSISTORS AND HIGH FILL FACTOR PIXEL CIRCUITS AND METHODS FOR FORMING SAME - A method and structures to achieve improved TFTs and high fill-factor pixel circuits are provided. This system relies on the fact that jet-printed lines have print accuracy, which means the location and the definition of the printed lines and dots is high. The edge of a printed line is well defined if the printing conditions are optimized. This technique utilizes the accurate definition and placement of the edges of printed lines of conductors and insulators to define small features and improved structures. | 2010-05-27 |
20100127269 | METHOD AND STRUCTURE FOR ESTABLISHING CONTACTS IN THIN FILM TRANSISTOR DEVICES - The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general. | 2010-05-27 |
20100127270 | THIN FILM TRANSISTOR - A thin film transistor is provided. The thin film transistor includes a gate, at least one inorganic material layer, at least one dielectric layer, a source, a drain and an active layer. The gate is disposed on the substrate. The inorganic material layer covers the gate. The dielectric layer including at least one organic material covers the substrate and has an opening exposing the inorganic material layer on the gate. The source and the drain are disposed on the dielectric layer and a part of the inorganic layer exposed by the opening respectively. A channel region exists between the source and the drain. The active layer is disposed on the channel region. | 2010-05-27 |
20100127271 | ELECTRONIC CIRCUIT STRUCTURE AND METHOD FOR FORMING SAME - A thin film transistor (TFT) structure is implemented. This embodiment is much less sensitive than conventional TFTs to alignment errors and substrate distortion. In such a configuration, there is no need to define gate features, so the layout is simplified. Moreover, the gate layer may be patterned by several inexpensive printing or non-printing methods. | 2010-05-27 |
20100127272 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel according to the present invention includes: a gate line formed on a substrate; a data line insulated from and intersecting the gate line; a thin film transistor connected to the gate line and the data line; a light blocking layer formed on the thin film transistor and having a first transmitting window; a reflection layer formed on the light blocking layer and a second transmitting window overlapping the first transmitting window; a color filter formed in the first transmitting window and the second transmitting window and on the reflection layer; and a pixel electrode formed on the color filter and overlapping the second transmitting window, wherein the reflection layer includes protrusions and depressions corresponding to a portion of the pixel area defined by the gate line and data line. | 2010-05-27 |
20100127273 | Light emitting device and manufacturing method thereof and light emitting display and manufacturing method thereof - The present invention provides a light emitting device comprising a substrate comprising a thin film transistor, a first electrode formed on the substrate and electrically connected to the thin film transistor, a light emitting part formed on the first electrode; | 2010-05-27 |
20100127274 | Thin film light emitting diode - Light emitting LEDs devices comprised of LED chips that emit light at a first wavelength, and a thin film layer over the LED chip that changes the color of the emitted light. For example, a blue LED chip can be used to produce white light. The thin film layer beneficially consists of a florescent material, such as a phosphor, and/or includes tin. The thin film layer is beneficially deposited using chemical vapor deposition. | 2010-05-27 |
20100127275 | GAN-BASED FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A GaN-based field effect transistor | 2010-05-27 |
20100127276 | GaN Based LED with Improved Light Extraction Efficiency and Method for Making the Same - A light-emitting device and the method for making the same are disclosed. The device includes a substrate, a light-emitting structure and a light scattering layer. The light-emitting structure includes an active layer sandwiched between a p-type GaN layer and an n-type GaN layer, the active layer emitting light of a predetermined wavelength when electrons and holes from the n-type GaN layer and the p-type GaN layer, respectively, combine therein. The light scattering layer includes a GaN crystalline layer characterized by an N-face surface. The N-face surface includes features that scatter light of the predetermined wavelength. The light-emitting structure is between the N-face surface and the substrate. | 2010-05-27 |
20100127277 | SEMICONDUCTOR MODULE - A semiconductor module having one or more silicon carbide diode elements mounted on a switching element is provided in which the temperature rise is reduced by properly disposing each of the diode elements on the switching element, to thereby provide a thermal dissipation path for the respective diode elements. The respective diode elements are arranged on a non-central portion of the switching element, to facilitate dissipation of the heat produced by each of the diode elements, whereby the temperature rise in the semiconductor module is reduced. | 2010-05-27 |
20100127278 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device includes the steps of forming a SiC film, forming trenches at a surface of the SiC film, heat-treating the SiC film with silicon supplied to the surface of the SiC film, and obtaining a plurality of macrosteps to constitute channels, at the surface of the SiC film by the step of heat-treating. Taking the length of one cycle of the trenches as L and the height of the trenches as h, a relation L=h(cot α+cot β) (where α and β are variables that satisfy the relations 0.5≦α,β,≦45) holds between the length L and the height h. Consequently, the semiconductor device can be improved in property. | 2010-05-27 |
20100127279 | DUAL-PHOSPHOR FLAT PANEL RADIATION DETECTOR - A solid state radiation detector capable of improving the sharpness of obtained radiation images. The solid state radiation detector includes: two scintillator layers that convert irradiated radiation to light; and a solid state photodetector, disposed between the two scintillators, that detects the light converted by the two scintillator layers and converts the detected light to electrical signals. Here, the scattering length of each of the scintillators is not greater than 100 μm for the light propagating in the direction parallel to the surface of the scintillator. | 2010-05-27 |
20100127280 | PHOTO SENSOR AND DISPLAY DEVICE - Provided is a photo sensor that can be downsized while suppressing occurrence of noise caused by a dark current, and a display device including the photo sensor. The photo sensor used includes a plurality of photodiodes ( | 2010-05-27 |
20100127281 | BACKLIGHT UNIT EQUIPPED WITH LIGHT EMITTING DIODES - Disclosed herein is a backlight unit equipped with LEDs. The backlight includes an insulating substrate, a plurality of LED packages, an upper heat dissipation plate, and a lower heat dissipation plate. The insulating substrate is provided with predetermined circuit patterns. The LED packages are mounted above the insulating substrate, and are electrically connected to the circuit patterns. The upper heat dissipation plate is formed on the insulating substrate, and is configured to come into contact with the circuit patterns and to dissipate heat. The lower heat dissipation plate is formed on the insulating substrate, and is configured to transmit heat transmitted through the upper heat dissipation plate. The upper heat dissipation plate and the lower heat dissipation plate are connected to each other by at least one through hole, and the through hole and the upper heat dissipation plate have a predetermined area ratio. | 2010-05-27 |
20100127282 | Light Emitting Diode Module with Three Part Color Matching - A light emitting diode module is produced using at least one light emitting diode (LED) and at least two selectable components that form or are part of a light mixing chamber that surrounds the LEDs and includes an output port. A first selectable component has a first type of wavelength converting material with a first wavelength converting characteristic and a second selectable component has a second type of wavelength converting material with a different wavelength converting characteristic. The first and second wavelength converting characteristics alter the spectral power distribution of the light produced by the LED to produce light through the output port that has a color point that is a predetermined tolerance from a predetermined color point. Moreover, a set of LED modules may be produced such that each LED module has the same color point within a predetermined tolerance. The LED module may be produced by pre-measuring the wavelength converting characteristics of the different components selecting components with wavelength converting characteristics that convert the spectral power distribution of the LED to a color point that is a predetermined tolerance from a predetermined color point. | 2010-05-27 |
20100127283 | ARRAY LAYOUT FOR COLOR MIXING - Solid state lighting components are disclosed having multiple discrete light sources whose light combines to provide the desired emission characteristics. One embodiment of an LED component according to the present invention comprises a rectangular submount. A first group of blue shifted yellow (BSY) LED chips, a second group of BSY LED chips and a group of red LED chips are mounted on the submount. A plurality of contacts is arranged along one of the edges of the submount and accessible from one side of the component for applying electrical signals to the groups of LED chips. | 2010-05-27 |
20100127284 | SEMICONDUCTOR LIGHT EMITTING DEVICE, ILLUMINATOIN MODULE, ILLUMINATION APPARATUS, METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING ELEMENT - A semiconductor light emitting device ( | 2010-05-27 |
20100127285 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device is provided. The semiconductor light emitting device comprises a conductive supporting member, an N-type semiconductor layer on the conductive supporting member; an active layer on the N-type semiconductor layer, a P-type semiconductor layer on the active layer, an ohmic contact layer on the P-type semiconductor layer, and an electrode on the ohmic contact layer. | 2010-05-27 |
20100127286 | ILLUMINATION SYSTEM COMPRISING A GREEN-EMITTING CERAMIC LUMINESCENCE CONVERTER - An Illumination system comprising a radiation source and a monolithic ceramic luminescence converter comprising at least one phosphor capable of absorbing a part of the light emitted by the radiation source and emitting light of a wavelength different from that of the absorbed light, wherein said at least one phosphor is an europium(II)-activated oxonitridosilicate of the general formula (Sr1-a-b-c-d-e-fCabBacMgdZneCef)Six-gGegNyOz:Eua, wherein 0.001 | 2010-05-27 |
20100127287 | ORGANIC LIGHT EMITTING DIODES WITH STRUCTURED ELECTRODES - A cathode that contain nanostructures that extend into the organic layer of an OLED has been described. The cathode can have an array of nanotubes or a layer of nanoclusters extending out from its surface. In another arrangement, the cathode is patterned and etched to form protruding nanostructures using a standard lithographic process. Various methods for fabricating these structures are provided, all of which are compatible with large-scale manufacturing. OLEDs made with these novel electrodes have greatly enhanced electron injection, have good environmental stability. | 2010-05-27 |
20100127288 | LIGHT-EMITTING DIODE DEVICES AND METHODS FOR FABRICATING THE SAME - An LED device including a support structure with at least one LED die mounted thereon, a recess formed in a part of the support structure from a side of the LED die, and a lens formed over the support structure to encapsulate the LED die and the recess, thereby forming a protrusion in the support structure is disclosed. | 2010-05-27 |
20100127289 | Method and Apparatus for Providing LED Package with Controlled Color Temperature - An optical device capable of illuminating visual light with adjusting color temperature after fabrication is disclosed. The optical device includes a solid state light emitter and a phosphor layer, which is formed over the solid state light emitter. The solid state light emitter, which can be a light emitter diode (“LED”), converts electrical energy to blue light. The phosphor layer subsequently converts first light with a first wavelength to second light with a second wavelength. In one example, the first light is blue light while the second light is white light. A portion of the phosphor layer is adjusted after the phosphor layer is formed for adjusting color of the white light in accordance with color quality of the light detected by a light detector. | 2010-05-27 |
20100127290 | LIGHT EMITTING DIODE PACKAGE AND MANUFACTURING METHOD THEREOF - The present invention relates to a light emitting diode package and a manufacturing method thereof. | 2010-05-27 |
20100127291 | LIGHT EMITTING DIODE - A light emitting diode includes a light emitting diode chip and first and second encapsulation units respectively of first and second encapsulating materials. The first encapsulation unit encapsulates the light emitting diode chip. The first encapsulation unit includes a light emitting surface defining a plurality of recesses therein and forming a plurality of first protrusions between the recesses. The first protrusions are alternately arranged with the recesses. The second encapsulation unit covers the light emitting surface of the first encapsulation unit. The second encapsulation unit includes a plurality of filling portions filling the recesses of the first encapsulation unit, respectively, and a plurality of second protrusions on the first protrusions, respectively. | 2010-05-27 |
20100127292 | Wafer level led package structure for increasing light-emitting efficiency and method for making the same - A wafer level LED package structure for increasing light-emitting efficiency includes: a light-emitting unit, an insulating unit, two first conductive units and two second conductive units. The light-emitting unit has a light-emitting body, a positive conductive layer, a negative conductive layer, and a reflecting insulating layer formed between the positive conductive layer and the negative conductive layer. The light-emitting body has a bottom material layer and a top material layer. The insulating unit is formed around an outer area of a top surface of the bottom material layer and formed on a top surface of the reflecting insulating layer. One first conductive unit is formed on one part of the positive conductive layer and the insulating unit, and another first conductive unit is formed on one part of the negative conductive layer and the insulating unit. The two second conductive units are respectively formed on the two first conductive units. | 2010-05-27 |
20100127293 | LED Module with Color Conversion Layer Designed for a Homogenous Color Distribution - An LED module having an LED semiconductor chip mounted directly or indirectly on a platform. The platform is made from silicon and is extends laterally beyond the LED semiconductor chip having an active light emitting layer and a substrate. At least one electronic component that is part of the control circuitry for the LED semiconductor chip is integrated in the silicon platform. | 2010-05-27 |
20100127294 | SIDE VIEW TYPE LIGHT-EMITTING DIODE PACKAGE STRUCTURE, AND MANUFACTURING METHOD AND APPLICATION THEREOF - A side view type light-emitting diode package structure, and a manufacturing method and an application thereof are described. The side view type light-emitting diode package structure includes a silicon base, a first and a second conductive leads and at least one light-emitting diode chip. The silicon base includes a first cavity defining a light-extracting surface of the package structure. The first and the second conductive leads are respectively disposed at least on a portion and another portion of the first cavity and extend to an outer surface of the silicon base. The first and the second conductive leads are electrically isolated from each other. The light-emitting diode chip includes a first and second electrodes electrically connected to the first and the second conductive leads respectively, wherein the surface on the outer side of the silicon base is substantially perpendicular to the light-extracting surface. | 2010-05-27 |
20100127295 | LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a light emitting device and a method of manufacturing the same. A light emitting device includes an active layer; a first conductive semiconductor layer on the active layer; a second conductive semiconductor layer on the active layer so that the active layer is disposed between the first and second conductive semiconductor layers; and a photonic crystal structure comprising a first light extraction pattern on the first conductive semiconductor layer having a first period, and second light extraction pattern on the first conductive semiconductor layer having a second period, the first period being greater than λ/n, and the second period being identical to or smaller than λ/n, where n is a refractive index of the first conductive semiconductor layer, and λ is a wavelength of light emitted from the active layer. | 2010-05-27 |
20100127296 | LIGHT EMITTING APPARATUS AND METHOD FOR MANUFACTURING SAME - A light emitting apparatus, includes: a substrate; a semiconductor device including a semiconductor layer formed integrally on a major surface of the substrate; and a light emitting device formed separately from the substrate. The light emitting device is mounted on the major surface of the substrate, electrically connected to the semiconductor device, and thermally connected to the substrate. | 2010-05-27 |
20100127297 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - Embodiments relate to a semiconductor light-emitting device. | 2010-05-27 |
20100127298 | LIGHT EMITTING DEVICE - A light emitting device including a substrate, a first conductive semiconductor layer on the substrate, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, and a reflective layer under the substrate and including a light reflection pattern configured to reflect light emitted by the active layer in directions away from the reflective layer. | 2010-05-27 |
20100127299 | Actively Cooled LED Lighting System and Method for Making the Same - A lighting system can comprise one or more light emitting diodes (“LEDs”) that emit substantially white light and a thermoelectric cooler (“TEC”) for maintaining the LEDs within a temperature range. The TEC can comprise an electrical circuit that includes two different semiconductors or two dissimilar metals that provide cooling when electrically energized. The electrical circuit can adjoin or touch one side of a plate, sheet, wafer, or substrate of material, such as ceramic, that insulates electricity and conducts heat. In operation, the electrical circuit can cool the plate or actively transfer heat from the plate. The LEDs can adjoin or touch the side of the plate that is opposite the electrical circuit. Thus, a TEC circuit can contact one surface of a thin piece of ceramic material, while an LED contacts the opposite surface. | 2010-05-27 |
20100127300 | CERAMIC PACKAGE FOR HEADLAMP AND HEADLAMP MODUL HAVING THE SAME - Provided is a ceramic package for headlamp, and a headlamp module having the same. The ceramic package for headlamp includes a body part, a pair of internal electrodes, and an electrode exposing part. The body part has a cavity formed therein. The cavity is upwardly opened to expose a light emitting diode mounted on a mounting part. The pair of internal electrodes in the body part is electrically connected to the light emitting diode. The electrode exposing part is stepped at either side of the body part to upwardly expose the internal electrode to the outside. | 2010-05-27 |
20100127301 | SEMICONDUCTOR HIGH-POWER LIGHT-EMITTING MODULE WITH HEAT ISOLATION - The invention provides a semiconductor high-power light-emitting module including a heat-dissipating member, a heat-conducting device, and a diode light-emitting device. The heat-dissipating member includes an isolator member coupled to a first side of the heat-dissipating member. The heat-dissipating member has a second side opposite to the first side. The isolator member has a third side opposite to the first side. The environment temperature at the third side is higher than that at the second side. The heat-conducting device has a flat end and a contact portion tightly mounted on the heat-dissipating member. The diode light-emitting device is disposed on the flat end of the heat-conducting device. The semiconductor light-emitting module of the invention, applied to a headlamp of an automobile, has properties of saving electricity and long life, and furthermore the capability of integrating the heat-dissipating member into a shell of the automobile is both artistic and practical. | 2010-05-27 |
20100127302 | LIGHT EMITTING DIODE PACKAGE - A light emitting diode package according to an aspect of the invention may include: a body receiving a light emitting diode; a lead electrically connected to the light emitting diode; and an adapter receiving a modified electrode electrically connected to the lead so that the polarity of the modified electrode is changed into the polarity of the lead, the adapter in which the body is received and fixed. | 2010-05-27 |
20100127303 | LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A light emitting device according to an embodiment includes a second electrode layer comprising at least one projection part; at least one current blocking layer on the projection part of the second electrode layer; a second conductive type semiconductor layer on the second electrode layer and the current blocking layer; an active layer on the second conductive type semiconductor layer; a first conductive type semiconductor layer on the active layer; and a first electrode layer on the first conductive type semiconductor layer, at least a portion of the first electrode layer corresponding with the current blocking layer in a vertical direction. | 2010-05-27 |
20100127304 | BIPOLAR SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD - A bipolar semiconductor device and manufacturing method. One embodiment provides a diode structure including a structured emitter coupled to a first metallization is provided. The structured emitter includes a first weakly doped semiconductor region of a first conductivity type which forms a pn-load junction with a weakly doped second semiconductor region of the diode structure. The structured emitter includes at least a highly doped first semiconductor island of the first conductivity type which at least partially surrounds a highly doped second semiconductor island of the second conductivity type. | 2010-05-27 |
20100127305 | ESD PROTECTION DEVICE AND METHOD OF FORMING AN ESD PROTECTION DEVICE - An ESD protection device, which is arranged to be active at a triggering voltage (Vt | 2010-05-27 |
20100127306 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - Provided is a technology capable of improving a production yield of a semiconductor device having, for example, IGBG as a semiconductor element. After formation of an interconnect on the surface side of a semiconductor substrate, a supporting substrate covering the interconnect is bonded onto the interconnect. Then, a BG tape is overlapped and bonded onto the supporting substrate and the semiconductor substrate is ground from the backside. The BG tape is then peeled off and an impurity is introduced into the backside of the semiconductor substrate by ion implantation. Then, the supporting substrate is peeled off, followed by heat treatment of the semiconductor substrate. | 2010-05-27 |
20100127307 | FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A semiconductor layer of a second conductive type is formed on a RESURF layer of a first conductive type that is formed on a buffer layer. A contact layer of the first conductive type is formed in or on the semiconductor layer. A source electrode is formed on the contact layer. A drain electrode is formed on the RESURF layer. A gate insulating film is formed on the semiconductor layer to overlap with an end of the semiconductor layer. A gate electrode is formed on the gate insulating film to overlap with the end of the semiconductor layer. A channel formed near the end of the semiconductor layer is electrically connected to the RESURF layer. | 2010-05-27 |
20100127308 | NON-VOLATILE MEMORY CELL WITH SELF ALIGNED FLOATING AND ERASE GATES, AND METHOD OF MAKING SAME - A memory device, and method of making the same, in which a trench is formed into a substrate of semiconductor material. The source region is formed under the trench, and the channel region between the source and drain regions includes a first portion that extends substantially along a sidewall of the trench and a second portion that extends substantially along the surface of the substrate. The floating gate is disposed in the trench, and is insulated from the channel region first portion for controlling its conductivity. The control gate is disposed over and insulated from the channel region second portion, for controlling its conductivity. The erase gate is disposed at least partially over and insulated from the floating gate. The erase gate includes a notch, and the floating gate includes an edge that directly faces and is insulated from the notch. | 2010-05-27 |
20100127309 | INTEGRATED CAPACITOR WITH ALTERNATING LAYERED SEGMENTS - A capacitor in an integrated circuit (“IC”) has a first node plate link formed in a first metal layer of the IC electrically connected to and forming a portion of a first node of the capacitor extending along a first axis (y) and a second node plate link formed in a second metal layer of the IC extending along the axis and connected to the first node plate with a via. A third node plate link formed in the first metal layer is electrically connected to and forming a portion of a second node of the capacitor and extends along a second axis (x) of the node plate array transverse to the first node plate link, proximate to an end of the first node plate link and overlying a portion of the second node plate link. | 2010-05-27 |
20100127310 | Semiconductor device and method for producing the same - A semiconductor device comprising at least two wiring layers on a substrate or a surface layer of the substrate, wherein a lower wiring layer of the two wiring layers contains silicon, and a silicon carbide layer is placed between the lower wiring layer and an upper wiring layer. | 2010-05-27 |
20100127311 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device and a method of manufacturing a semiconductor device. A method of manufacturing a semiconductor device may include forming a gate electrode over a semiconductor substrate, a second conductive type ion implantation region at opposite sides of a gate electrode, a second conductive type ion implantation region as a first conductive type second ion implantation region by implanting a first conductive type impurity over opposite sides of said gate electrode, and/or forming a first conductive type first ion implantation region that substantially surrounds a first conductive type second ion implantation region. A method of manufacturing a semiconductor device may form an N type MOSFET and/or a P type MOSFET using a single photolithography process for each N+ source/drain photolithography process and/or P+ source/drain photolithography process. | 2010-05-27 |
20100127312 | GRAPHENE DEPOSITION AND GRAPHENATED SUBSTRATES - Methods, devices, systems and/or articles related to techniques for forming a graphene film on a substrate, and the resulting graphene layers and graphenated substrates are generally disclosed. Some example techniques may be embodied as methods or processes for forming graphene. Some other example techniques may be embodied as devices employed to manipulate, treat, or otherwise process substrates, graphite, graphene and/or graphenated substrates as described herein. Graphene layers and graphenated substrates produced by the various techniques and devices provided herein are also disclosed. | 2010-05-27 |
20100127313 | PIXEL FOR PICKING UP IMAGE SIGNAL AND METHOD OF MANUFACTURING THE PIXEL - Provided is a pixel for picking up an image signal capable of suppressing an occurrence of a cross-talk. The pixel for picking up an image signal includes a substrate surrounded by a trench, a photodiode, and a pass transistor. The photodiode is formed at an upper portion of the substrate and includes a P-type diffusion area and an N-type diffusion area which are joined with each other in a longitudinal direction. The pass transistor is formed at the upper portion of the substrate and includes the one terminal that is the joined P-type diffusion area and the N-type diffusion area, the other terminal that is a floating diffusion area, and a gate terminal disposed between the two terminals. The pixel for picking up an image signal is surrounded by the trench which penetrates the substrate from the upper portion to the lower portion of the substrate, and the trench is tilled with an insulator. | 2010-05-27 |
20100127314 | PHOTODIODES AND FABRICATION THEREOF - A photodiode includes an anode ( | 2010-05-27 |
20100127315 | CMOS IMAGE SENSOR - A complementary metal-oxide semiconductor (CMOS) image sensor includes a photodiode, a gate pattern of a transfer transistor contacting one side of the photodiode, a gate pattern of a drive transistor disposed to have a predetermined spacing distance from the gate pattern of the transfer transistor, and a floating diffusion node disposed between the gate pattern of the transfer transistor and the gate pattern of the drive transistor. | 2010-05-27 |
20100127316 | STRUCTURE FOR PROTECTING METAL-INSULATOR-METAL CAPACITOR IN MEMORY DEVICE FROM CHARGE DAMAGE - A dynamic random access memory (DRAM) device has a metal-insulator-metal (MIM) capacitor electrically connected to a PN junction diode through a metal bridge for protecting the MIM capacitor from charge damage generated in back end of line (BEOL) plasma process. | 2010-05-27 |
20100127317 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes a memory cell array region including a plurality of memory cells, an annular groove surrounding the memory cell array region, a protective insulating film covering the inner wall of the annular groove, and a conductor filling the annular groove. | 2010-05-27 |
20100127318 | BICMOS INTEGRATION OF MULTIPLE-TIMES-PROGRAMMABLE NON-VOLATILE MEMORIES - A BiCMOS substrate includes a bipolar area having a buried carrier layer, and a deep trench isolation (DTI) trench extending into the buried carrier layer to form a surface well implant above a buried well implant within the DTI trench, the buried well implant being the buried carrier layer portion within the DTI trench. A floating gate is disposed on the carrier well. Optionally, a high voltage control gate is formed of a stack of the buried well implant and the surface well implant within the DTI trench. Optionally, a poly layer formed of a bipolar process base poly layer is disposed on the floating gate. Optionally, a shallow well isolation region is formed on the substrate, a floating gate is disposed on the shallow well region, and an overlaying control gate, formed of a bipolar process base poly, is disposed above the floating gate. | 2010-05-27 |
20100127319 | Semiconductor devices including a dielectric layer - A semiconductor device includes a substrate and a doped hafnium oxide layer disposed on the substrate, the doped hafnium oxide layer including a hafnium oxide layer doped with doping atoms and having tetragonal unit lattices, an ion size of the doping atom being greater than an ion size of a hafnium atom. | 2010-05-27 |
20100127320 | NONVOLATILE SEMICONDUCTOR MEMORY - Two diffusion layers are provided in an element area. A tunnel insulating film is provided on the surface of the element area between the two diffusion layers. A charge storage layer is provided on the tunnel insulating film. A first insulator provided on the upper surface of the charge storage layer. An inter-electrode insulating film provided on the first insulator, on the side surface of the charge storage layer in a first direction and on the isolation insulating film. And a control gate electrode extends in the first direction and covers the charge storage layer via the first insulator and the inter-electrode insulating film. The first insulator is thicker than the inter-electrode insulating film, and the inter-electrode insulating film has a first slit on the first insulator. | 2010-05-27 |
20100127321 | Semiconductor and Manufacturing Method for the Same - A semiconductor device and a manufacturing method for the same are disclosed. The semiconductor device includes a gate pattern formed at an upper part of the semiconductor substrate to overlap one side of a drift region, and a shallow oxide region disposed adjacent to the gate pattern, having a shallower depth than a plurality of device isolation layers. | 2010-05-27 |
20100127322 | VERTICAL TRENCH GATE TRANSISTOR SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A first region functioning as a transistor includes a drain region, a body region formed over the drain region, a source region formed over the body region and a trench formed through the body region and having a gate electrode buried therein. A source region is formed over the body region extending in a second region. The source region forming an upper edge of the trench is rounded. | 2010-05-27 |
20100127323 | Trench MOSFET with trench source contact having copper wire bonding - A trench MOSFET with trench source contact structure having copper wire bonding is disclosed. By employing the proposed structure, die size can be shrunk into 30%˜70% with high cell density, and the spreading resistance is significantly reduce without adding expensive thick metal layer as prior art. To further reduce fabricating cost, copper wire bonding is used with requirement of thick Al alloys. | 2010-05-27 |
20100127324 | Trench MOSFET with terrace gate and self-aligned source trench contact - A trench MOSFET with terrace gate is disclosed for self-aligned contact. When refilling the gate trenches, the deposited polysilicon layer is higher than the sidewalls of the trenches to be used as a terrace gate of the MOSFET. The source contact width is determined by mesa width between two adjacent trenches minus 2 times of the oxide thickness deposited on the mesa instead of contact mask width which is wider than silicon contact width. Therefore, the position of source contact is still unchanged even if the misalignment of trench mask happens. At the same time, by using terrace gates, the Rg is thus reduced because the terrace gate provides more polysilicon as gate material than the conventional trench gate. | 2010-05-27 |
20100127325 | Recessed channel transistors, and semiconductor devices including a recessed channel transistor - A recessed channel transistor, a semiconductor device including a transistor and methods of manufacturing the same are provided, the recessed channel transistor includes a gate structure, a second impurity region and a first impurity region. The gate structure may be formed on a substrate and filling a recess. The first impurity region, including first impurities, may be formed at a first upper portion of the substrate adjacent to the gate structure. The second impurity region, including second impurities, may be formed at a second upper portion of the substrate contacting the gate structure. The first impurity region may surround the second impurity region. The first impurities have a conductive type different from that of the second impurities. | 2010-05-27 |
20100127326 | MOS transistor with a reduced on-resistance and area product - According to an exemplary embodiment, a MOS transistor, such as an LDMOS transistor, includes a gate having a first side situated immediately adjacent to at least one source region and at least one body tie region. The MOS transistor further includes a drain region spaced apart from a second side of the gate. The MOS transistor further includes a body region in contact with the at least one body tie region, where the at least one body tie region is electrically connected to the at least one source region. The MOS transistor further includes a lightly doped region separating the drain region from the second side of the gate. The lightly doped region can isolate the body region from an underlying substrate. | 2010-05-27 |
20100127327 | GATE ELECTRODE STRESS CONTROL FOR FINFET PERFORMANCE ENHANCEMENT DESCRIPTION - A finFET and its method for fabrication include a gate electrode formed over a channel region of a semiconductor fin. The semiconductor fin has a crystallographic orientation and an axially specific piezoresistance coefficient. The gate electrode is formed with an intrinsic stress determined to influence, and preferably optimize, charge carrier mobility within the channel region. To that end, the intrinsic stress preferably provides induced axial stresses within the gate electrode and semiconductor fin channel region that complement the axially specific piezoresistance coefficient. | 2010-05-27 |