10th week of 2010 patent applcation highlights part 13 |
Patent application number | Title | Published |
20100059711 | FUSED NAPHTHALENES - The invention relates to fused naphthalenes of the general formula I, in which A | 2010-03-11 |
20100059712 | FLUORENE DERIVATIVE, LIQUID CRYSTAL COMPOSITION COMPRISING THE SAME, AND OPTICAL FILM USING THE SAME LIQUID CRYSTAL COMPOSITION - Disclosed are a novel fluorene derivative, a liquid crystal composition comprising the same, and an optical film using the same liquid crystal composition. More particularly, there are provided a liquid crystal material for a viewing angle compensation film with high quality characteristics, which can improve a contrast ratio measured at an oblique angle to the front and minimize variations in color with viewing angles in a black state, a liquid crystal composition comprising the same liquid crystal material, and a compensation film obtained from the same liquid crystal composition. | 2010-03-11 |
20100059713 | Preparation of Stable, Bright Luminescent Nanoparticles Having Compositionally Engineered Properties - A method is provided for preparing luminescent semiconductor nanoparticles composed of a first component X, a second component A, and a third component B, wherein X, A, and B are different, by combining B with X and A in an amount such that the molar ratio B:(A+B) is in the range of approximately 0.001 to 0.20 and the molar ratio X:(A+B) is in the range of approximately 0.5:1.0 to 2:1. The characteristics of the thus-prepared nanoparticles can be substantially similar to those of nanoparticles containing only X and B while maintaining many useful properties characteristic of nanoparticles containing only X and A. The nanoparticles so prepared can additionally exhibit emergent properties such as a peak emission energy less than that characteristic of a particle composed of XA or XB alone; this method is particularly applicable to the preparation of stable, bright nanoparticles that emit in the red to infrared regions of the electromagnetic spectrum. Luminescent semiconductor nanoparticles having exemplary properties are also provided. | 2010-03-11 |
20100059714 | PHPIT and fabrication thereof - The present invention provides PHPIT and fabrication thereof. PHPIT has a side-chain-tethered with hexylphenanthrenyl-imidazole polythiophene. The visible light absorption of the PHPIT/PCBM blend is enhanced by the presence of the electron-withdrawing hexylphenanthrenyl-imidazole. The PHPIT/PCBM blend experienced more-balanced electron and hole mobilities and solvability. | 2010-03-11 |
20100059715 | RESIN COMPOSITION, SHAPED ARTICLE AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE - A resin composition that has high mechanical strength properties, has superior chemical characteristics such as chemical resistance and heat resistance, has high degree of freedom of product design, and has a structure considering the impact on environment is provided at low cost. The resin composition composed of a polyamide resin contains a cotton fiber as a natural fiber. The additive amount of the cotton fiber is preferably 1 wt % to 25 wt % both inclusive. The polyamide resin is polyamide 11 using castor oil as a raw material of plant origin. The average fiber diameter of the cotton fiber is 100 μm or less. The polyamide resin and the cotton fiber are melted and kneaded, and then hot-formed, and thereby a shaped article containing a plant fiber can be fabricated. In addition to the cotton fiber, a plant fiber such as a hemp fiber, a bamboo fiber, and wood powder and a biofiber such as a silk fiber may be applied. | 2010-03-11 |
20100059716 | PENTARYLENE-AND HEXARYLENETETRACARBOXIMIDES AND PREPARATION THEREOF - The present invention relates to processes for preparing pentarylene- and hexarylenetetracarboximides of the general formula (I) or (Ia) | 2010-03-11 |
20100059717 | GaN CRYSTAL PRODUCING METHOD, GaN CRYSTAL, GaN CRYSTAL SUBSTRATE, SEMICONDUCTOR DEVICE AND GaN CRYSTAL PRODUCING APPARATUS - A method for producing a GaN crystal capable of achieving at least one of the prevention of nucleation and the growth of a high-quality non-polar surface is provided. The production method of the present invention is a method for producing a GaN crystal in a melt containing at least an alkali metal and gallium, including an adjustment step of adjusting the carbon content of the melt, and a reaction step of causing the gallium and nitrogen to react with each other. According to the production method of the present invention, nucleation can be prevented, and as shown in FIG. | 2010-03-11 |
20100059718 | Fabrication of carbon nanotubes reinforced polymer composite bipolar plates for fuel cell - A composite bipolar plate for a polymer electrolyte membrane fuel cell (PEMFC) is prepared as follows: a) compounding vinyl ester and graphite powder to form bulk molding compound (BMC) material, the graphite powder content ranging from 60 wt % to 95 wt % based on the total weight of the graphite powder and vinyl ester, wherein carbon nanotubes together with a polyether amine dispersant or modified carbon nanotubes 0.05-10 wt %, based on the weight of the vinyl ester resin, are added during the compounding; b) molding the BMC material from step a) to form a bipolar plates having a desired shaped at 80-200° C. and 500-4000 psi. | 2010-03-11 |
20100059719 | COMPOSITE MATERIAL AND PROCESS FOR THE PRODUCTION THEREOF - This invention is to provide a process for producing a composite material that contains a thermoplastic resin as a matrix and is reinforced with electrically conductive fibers. This invention is to provide a process for producing a composite material that has a small percentage of voids and is excellent in mechanical properties such as flexural strength, flexural modulus. | 2010-03-11 |
20100059720 | DISPERSION METHOD - The invention relates to a method of dispersing carbon nanotubes (CNTs) in a continuous phase, especially in at least one dispersion medium, the carbon nanotubes, especially without prior pretreatment, being dispersed in a continuous phase, especially in at least one dispersion medium, in the presence of at least one dispersant (dispersing agent), with introduction of an energy input sufficient for dispersing, and also to the dispersions that are obtainable in this way, and to their use. With the method of the invention it is possible for the carbon nanotubes (CNTs) to be dispersed in high concentrations and with high storage stability. | 2010-03-11 |
20100059721 | Method for Producing Aqueous Compatible Nanoparticles - A method for producing aqueous compatible semiconductor nanoparticles includes binding pre-modified ligands to nanoparticles without the need for further post-binding modification to render the nanoparticles aqueous compatible. Nanoparticles modified in this way may exhibit enhanced fluorescence and stability compared to aqueous compatible nanoparticles produced by methods requiring post-binding modification processes. | 2010-03-11 |
20100059722 | Conductive Compositions and Method - Conductive compositions for use with medical electrodes are provided. The conductive compositions utilize a surfactant capable of both reducing the surface tension of the conductive composition as well as increasing the viscosity of the conductive composition. Methods of preparing these conductive compositions are also provided. | 2010-03-11 |
20100059723 | BULK THERMOELECTRIC MATERIAL AND THERMOELECTRIC DEVICE INCLUDING THE SAME - A bulk thermoelectric material includes a matrix, the matrix including a crystalline thermoelectric material; and metal oxide particles disposed in the matrix at a grain boundary or within a crystal structure of the crystalline thermoelectric material. | 2010-03-11 |
20100059724 | Super-Pyroelectric Films and Process of Their Preparation - A film is presented having super-pyroelectric properties. The film comprises nano-sized grains being in a ferroelectric phase and having at least three different crystallographic variants defining at least two polycrystalline macro-domains. The film is shaped to define at least one film region with the macro-domains of a predetermined shape and different orientations of crystallographic axes with respect to the film's surface, thereby enabling to apply a temperature change to the film to induce movement of the polycrystalline macro-domains boundaries enabling super-pyroelectric properties. | 2010-03-11 |
20100059725 | Reformer distillate as gassing additive for transformer oils - This invention relates to reformer distillates as gassing additives for transformer oils. The reformer distillates have a 1-ring and 2-ring aromatics content of at least 98%, and are added such that the transformer oil contains less than 10 wt % of reformer distillate. The invention also relates to a method for preparing transformer oils containing reformer distillates and having excellent gassing tendency, oxidative stability, viscosity and volatility. | 2010-03-11 |
20100059726 | MULTICOLOR-ENCODED COLLOIDAL PARTICLES COATED WITH METAL NANOPARTICLES MIXTURE HAVING COLORS IN THE VISIBLE REGION AND METHOD FOR PREPARING THE SAME - The present invention relates to multicolor colloidal particles coated with a metal nanoparticle mixture having colors in the visible region and a method for preparing the same. In particular, relates to a metal nanoparticle mixture in which two or more nanoparticles selected from the group consisting of metal nanoparticles exhibiting red color; metal nanoparticles exhibiting yellow color; and metal nanoparticles exhibiting blue color, are mixed in various compositional ratio, multicolor colloidal particles in which polymer or mineral colloidal particles are coated with the metal nanoparticle mixture, and a method for preparing the same. According to the present invention, all colors that are in the visible region can be developed by suitably mixing metal nanoparticles exhibiting three colors, and multicolor colloidal particles can be prepared by coating polymer or mineral colloidal particles with a metal nanoparticle mixture exhibiting various colors. | 2010-03-11 |
20100059727 | ENGAGEMENT CHAIN TYPE DRIVING DEVICE - The invention relates to an engagement chain type driving device including a pair of driving sprockets, which rotate positively and reversely in opposite directions about a pair of rotating shafts, a pair of engagement chains, which engage with each other by the pair of driving sprockets so to be integrated together, and a driving source, which drives the pair of driving sprockets, wherein the engagement chain includes inner tooth plates and outer tooth plates, which each include buckling limiting flat surfaces, the inner tooth plates and outer tooth plates being brought opposite to each other and into contact with each other when the engagement chains are integrated by the pair of driving sprockets, such that the flat surfaces hold the chain engagement position. | 2010-03-11 |
20100059728 | Security barrier - Embodiments of this invention describe a security system/barrier for use in water, in additional to a method for using the security barrier and improved individual components of the barrier. The security barrier comprises a top structure (“topper”), a vertical pin, a butt plate, a rope-containing tube (“rope tube”), and an individual panel. Other embodiments describe a multiple row security barrier, a flexible mooring for the barrier, and use of acoustic sensing equipment in the lee of the barrier. | 2010-03-11 |
20100059729 | Apparatus and method for memory - A programmable resistance memory includes a volume of programmable resistance material formed between and coupled to two electrodes. The volume of programmable resistance material includes a region of enhanced programmability that is positioned to maximize the effect of a programming current. The region of enhanced programmability is positioned at a distance from regions of high thermal conductivity, such as areas in close proximity to electrodes. | 2010-03-11 |
20100059730 | RESISTANCE CHANGE ELEMENT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - To use a resistance change element having an MIM structure, which is obtained by stacking a metal, a metal oxide, and a metal, as a switching element, it is necessary to achieve OFF resistance higher than that required in a memory element by a factor of at least 1000. On the other hand, when a resistance change element is used as a memory element and when the difference between the ON resistance and the OFF resistance is a large value, high performance, for example, a short readout time, can be achieved. The present invention therefore provides a resistance change element capable of maintaining low ON resistance and achieving high OFF resistance. High OFF resistance can be achieved while low ON resistance is maintained by adding a second metal that is not contained in a metal oxide, which is a resistance change material, the second metal being capable of charge-compensating for metal deficiency or oxygen deficiency. | 2010-03-11 |
20100059731 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device and a corresponding method of manufacturing the same is presented. The phase change memory device includes a silicon substrate, a first insulation layer, cell switching elements, heaters, a gate, a second insulation layer, a barrier layer, a phase change layer and top electrodes. The first insulation layer is in the cell region of the substrate and has a first holes. The cell switching elements are formed in the first holes. The heaters are formed on the cell switching elements. The gate is in the peripheral region of the substrate and is higher than the cell switching elements. The second insulation layer having second holes which expose the heaters, and is defined to expose a hard mask layer of the gate. The barrier layer is on sidewalls of the second holes and on the second insulation layer. The phase change layer is formed in and over the second holes in which the barrier layer is formed. The top electrodes are formed on the phase change layer. | 2010-03-11 |
20100059732 | PHASE CHANGE MEMORY DEVICE HAVING HEAT SINKS FORMED UNDER HEATERS AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a silicon substrate having a cell region and a peripheral region. A first insulation layer is formed in the cell region and includes a plurality of holes. Cell switching elements are formed in the holes of the first insulation layer and heat sinks are formed on the cell switching elements. The heaters are formed on the center of the heat sinks and spacers are formed on the sidewalls. A gate is formed in the peripheral region of the silicon substrate formed of a gate insulation layer, a first conductive layer, a second conductive layer, and a hard mask layer. A second insulation layer covers the entire surface of the resultant silicon substrate and exposes the spacers and the heaters and the hard mask layer. Finally, a stack pattern of a phase change layer and a top electrode is formed on the heaters. | 2010-03-11 |
20100059733 | LED Structure - An LED structure includes a first substrate; an adhering layer formed on the first substrate; first ohmic contact layers formed on the adhering layer; epi-layers formed on the first ohmic contact layers; a first isolation layer covering the first ohmic contact layers and the epi-layers at exposed surfaces thereof; and first electrically conducting plates and second electrically conducting plates, both formed in the first isolation layer and electrically connected to the first ohmic contact layers and the epi-layers, respectively. The first trenches or the second trenches allow the LED structure to facilitate complex serial/parallel connection so as to achieve easy and various applications of the LED structure in the form of single structures under a high-voltage environment. | 2010-03-11 |
20100059734 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND WAFER - A semiconductor light emitting device includes a first layer made of at least one of n-type GaN and n-type AlGaN; a second layer made of Mg-containing p-type AlGaN; and a light emitting section provided between the first layer and the second layer. The light emitting section included a plurality of barrier layers made of Si-containing Al | 2010-03-11 |
20100059735 | LIGHT EMITTING DIODE HAVING BARRIER LAYER OF SUPERLATTICE STRUCTURE - A light emitting diode (LED) having a barrier layer with a superlattice structure is disclosed. In an LED having an active region between an GaN-based N-type compound semiconductor layer and a GaN-based P-type compound semiconductor layer, the active region comprises a well layer and a barrier layer with a superlattice structure. As the barrier layer with the superlattice structure is employed, it is possible to reduce occurrence of defects caused by lattice mismatch between the well layer and the barrier layer. | 2010-03-11 |
20100059736 | Heterostructure Nanotube Devices - Heterostructure devices incorporate carbon nanotube technology to implement rectifying devices including diodes, rectifiers, silicon-controlled rectifiers, varistors, and thyristors. In a specific implementation, a rectifying device includes carbon nanotube and nanowire elements. The carbon nanotubes may be single-walled carbon nanotubes. The devices may be formed using parallel pores of a porous structure. The porous structure may be anodized aluminum oxide or another material. A device of the invention may be especially suited for high power applications. | 2010-03-11 |
20100059737 | Tunnel Field-Effect Transistors with Superlattice Channels - A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric. The first source/drain region is of a first conductivity type. At least one of the channel region and the first source/drain region includes a superlattice structure. The semiconductor device further includes a second source/drain region on an opposite side of the channel region than the first source/drain region. The second source/drain region is of a second conductivity type opposite the first conductivity type. At most, one of the first source/drain region and the second source/drain region comprises an additional superlattice structure. | 2010-03-11 |
20100059738 | Conductive Polymer Compositions in Opto-Electrical Devices - A conductive polymer composition comprising: a polymer having a HOMO level greater than or equal to −5.7 eV and a dopant having a LUMO level less than −4.3 eV. | 2010-03-11 |
20100059739 | ORGANIC ELECTROLUMINESCENCE ELEMENT, IMAGE DISPLAY DEVICE, AND IMAGING APPARATUS - An organic electroluminescence element includes organic compound layers disposed between electrodes, the concentration of halogen atoms contained in organic compounds of the organic compound layers being 1 ppm or less according to combustion ion chromatography. | 2010-03-11 |
20100059740 | POLYMERIC ANIONS/CATIONS - The present invention relates to light-emitting devices and in particular organic light-emitting devices (OLEDs). In particular, the invention relates to emitter materials in which charged metal complexes are bonded to a polymer by electrostatic interactions. | 2010-03-11 |
20100059741 | Light-Emitting Element, Light-Emitting Device, and Electronic Device - To provide a light-emitting element with high light emission efficiency, a long lifetime, and reduced driving voltage. To provide a light-emitting element including an anode, a cathode, and a plurality of light-emitting layers which are in contact with each other so that a stacked structure is formed, between the anode and the cathode, in which the plurality of light-emitting layers are formed with a first light-emitting layer which is close to the anode and a second light-emitting layer which is close to the cathode, the first light-emitting layer and the second light-emitting layer each include a host material, a hole-transporting material, and a light-emitting material, and the concentration of the hole-transporting material in the first light-emitting layer is higher than the concentration of the hole-transporting material in the second light-emitting layer. | 2010-03-11 |
20100059742 | STABLE AMORPHOUS METAL OXIDE SEMICONDUCTOR - A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer. | 2010-03-11 |
20100059743 | NANOCRYSTAL-METAL OXIDE COMPOSITE, METHODS OF MANUFACTURE THEREOF AND ARTICLES COMPRISING THE SAME - Disclosed herein is a method for preparing nanocrystal-metal oxide composites with long-term stability in a simple and easy manner. Also disclosed herein are nanocrystal-metal oxide composites with high luminescence efficiency and uniform emission wavelengths. Also disclosed herein is a light-emitting device using the composites. | 2010-03-11 |
20100059744 | Transistor, inverter including the same and methods of manufacturing transistor and inverter - A transistor, an inverter including the transistor, and methods of manufacturing the inverter and the transistor. A gate insulating layer of the transistor has a charge trap region. A threshold voltage may be moved in a positive (+) direction by trapping charges in the charge trap region. The transistor may be an enhancement mode oxide thin-film transistor (TFT) and may be used as an element of the inverter. | 2010-03-11 |
20100059745 | THIN-FILM TRANSISTOR DISPLAY PANEL AND METHOD OF FABRICATING THE SAME - Provided are a thin-film transistor (TFT) display panel having improved electrical properties that can be fabricated time-effectively and a method of fabricating the TFT display panel. The TFT display panel includes: gate wirings which are formed on an insulating substrate; oxide active layer patterns which are formed on the gate wirings; data wirings which are formed on the oxide active layer patterns to cross the gate wirings; a passivation layer which is formed on the oxide active layer patterns and the data wirings and is made of silicon nitride (SiNx); and a pixel electrode which is formed on the passivation layer. | 2010-03-11 |
20100059746 | THIN FILM FIELD-EFFECT TRANSISTOR AND DISPLAY USING THE SAME - The present invention provides a thin film field-effect transistor comprising a substrate having thereon at least a gate electrode, a gate insulating film, an active layer, a source electrode, and a drain electrode, wherein the active layer is an oxide semiconductor layer, a resistance layer having an electric conductivity that is lower than an electric conductivity of the active layer is provided between the active layer and at least one of the source electrode or the drain electrode, and an intermediate layer comprising an oxide comprising an element having a stronger bonding force with respect to oxygen than that of the oxide semiconductor in the active layer is provided between the active layer and the resistance layer. | 2010-03-11 |
20100059747 | THIN FILM FIELD-EFFECT TRANSISTOR AND DISPLAY DEVICE - The invention provides a thin film field-effect transistor including, on a substrate, a gate electrode, a gate insulating film, an active layer including an oxide semiconductor, a source electrode, a drain electrode, a resistive layer including an oxide semiconductor and positioned between the active layer and at least one of the source electrode or the drain electrode, the resistive layer having an electric conductivity that is lower than the electric conductivity of the active layer, the electric conductivity of the active layer being from 10 | 2010-03-11 |
20100059748 | METHOD FOR MANUFACTURING THIN FILM INTEGRATED CIRCUIT, AND ELEMENT SUBSTRATE - Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. In view of the above described object, one feature of the invention is to provide the steps of forming a separation layer over an insulating substrate and forming a thin film integrated circuit having a semiconductor film as an active region over the separation layer, wherein the thin film integrated circuit is not separated. There is less limitation on the shape of a mother substrate in the case of using the insulating substrate, when compared with the case of taking a chip out of a circular silicon wafer. Accordingly, reduction in cost of an IC chip can be achieved. | 2010-03-11 |
20100059749 | THIN FILM TRANSISTOR - A thin film transistor is provided, which includes a gate electrode layer over a substrate, a gate insulating layer over the gate electrode layer, a layer including an amorphous semiconductor over the gate insulating layer, a pair of crystal regions over the layer including the amorphous semiconductor, and source and drain regions over and in contact with the pair of crystal regions. The source and drain regions include a microcrystalline semiconductor layer to which an impurity imparting one conductivity type is added. | 2010-03-11 |
20100059750 | BOTTOM GATE THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a bottom gate thin film transistor (“TFT”) in which a polycrystalline channel region having a large grain size is formed relatively simply and easily. The method of manufacturing a bottom gate thin film transistor includes forming a bottom gate electrode on a substrate, forming a gate insulating layer on the substrate to cover the bottom gate electrode, forming an amorphous semiconductor layer, an N-type semiconductor layer and an electrode layer on the gate insulating layer sequentially, etching an electrode region and an N-type semiconductor layer region formed on the bottom gate electrode sequentially to expose an amorphous semiconductor layer region, melting the amorphous semiconductor layer region using a laser annealing method, and crystallizing the melted amorphous semiconductor layer region to form a laterally grown polycrystalline channel region. | 2010-03-11 |
20100059751 | THIN-FILM TRANSISTOR AND PROCESS FOR ITS FABRICATION - A bottom gate type thin-film transistor constituted of at least a substrate, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode. At an interface between the gate electrode and the gate insulating layer, the interface has a difference between hill tops and dale bottoms of unevenness in the vertical direction, of 30 nm or less. | 2010-03-11 |
20100059752 | DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME - A method of manufacturing a display substrate and a display substrate manufactured by the same that are capable of improving display quality are presented. The method includes forming a gate wiring, a data wiring, a thin film transistor connected to the gate wiring and the data wiring respectively, and a protective insulating layer covering the gate wiring, the data wiring and the thin film transistor; forming a first black matrix pattern on the protective insulating layer; forming a protective insulating layer pattern by etching a part of the protective insulating layer by using the first black matrix pattern as an etching mask; forming a second black matrix pattern exposing at least one pixel region by removing a part of the first black matrix pattern; forming a color filter on the pixel region; and forming a pixel electrode electrically connected to the thin film transistor on at least a part of the color filter. | 2010-03-11 |
20100059753 | MATRIX ELECTRONIC DEVICES USING OPAQUE SUBSTRATES AND FABRICATION METHOD THEREFOR - A fabrication method is described for forming an electronic circuit on a flexible substrate consisting of plastic and opaque foils. Corresponding circuit structures are also described herein. The opaque substrate can be selected from a set of polymers which have the appropriate thermo-mechanical properties. The foil geometry of the opaque substrate can be selected to maximize the structural integrity on the display in the planar directions but have excellent mechanical stress distribution when bent or flexed. | 2010-03-11 |
20100059754 | ORGANIC LIGHT EMITTING DEVICE AND A MANUFACTURING METHOD THEREOF - An organic light emitting device, wherein a color filter is formed in a display device displaying a color by using a micro-cavity effect, and grooves with a concave lens shape are formed In the surface of the color filter. As a result, the amount of emitted light is increased and the viewing angle is improved due to the grooves with the concave lens shape. | 2010-03-11 |
20100059755 | IMPROVED OXIDE-BASED FIELD-EFFECT TRANSISTORS - A field-effect transistor includes a source region; a drain region; a semiconductor layer disposed between the source and drain regions; a gate region; and a dielectric region disposed between the semiconductor layer and the gate region. The semiconductor layer comprises a titanium dioxide film. The transistor may be light sending, gas- or bio-sensing, or used in a visual display or in electronic circuits. The transistor is formed by forming a dielectric layer adjacent a gate region; forming a source region and a drain region; and forming a semiconductor layer on the dielectric layer, the semiconductor layer comprising titanium dioxide. The titanium dioxide semiconductor layer may be deposited by spray pyrolysis, or alternatively mesoporous TiO | 2010-03-11 |
20100059756 | Thin film transistor and method of manufacturing the same - Disclosed is a thin film transistor (TFT). The TFT may include an intermediate layer between a channel and a source and drain. An increased off current, which may occur to a drain area of the TFT, is reduced due to the intermediate layer. Accordingly, the TFT may be stably driven. | 2010-03-11 |
20100059757 | APPARATUS AND METHOD OF MANUFACTURING THE SAME - An apparatus includes a substrate having a plurality of pixels, wherein the substrate comprises a concave-convex surface and a cured adhesive layer formed on the concave-convex surface. | 2010-03-11 |
20100059758 | PIXEL STRUCTURE OF A DISPLAY PANEL - A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors. | 2010-03-11 |
20100059759 | NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR FORMING THE SAME - An active layer | 2010-03-11 |
20100059760 | GALLIUM NITRIDE-BASED COMPOUND SEMICONDUCTOR LIGHT EMITTING DEVICE AND PROCESS FOR ITS PRODUCTION - It is an object of the present invention to provide a gallium nitride-based compound semiconductor light emitting device with high light emission output and low driving voltage. | 2010-03-11 |
20100059761 | SCHOTTKY BARRIER DIODE - A Schottky barrier diode includes a GaN freestanding substrate having a front surface, a GaN epitaxial layer deposited on the front surface, and an insulation layer deposited on the GaN epitaxial layer at a front surface and having an opening. Furthermore, the Schottky barrier diode also includes an electrode. The electrode is configured by a Schottky electrode provided in the opening in contact with the GaN epitaxial layer, and a field plate electrode connected to the Schottky electrode and also overlapping the insulation layer. The GaN freestanding substrate has a dislocation density of at most 1×10 | 2010-03-11 |
20100059762 | HEAT REMOVAL FACILITATED WITH DIAMOND-LIKE CARBON LAYER IN SOI STRUCTURES - Described are Silicon-on-Insulator devices containing a diamond-like carbon layer, methods of making the Silicon-on-Insulator devices, and methods of using the Silicon-on-Insulator devices. | 2010-03-11 |
20100059763 | LUMINOUS ELEMENT HAVING A PLURALITY OF CELLS - Disclosed is a light emitting element comprising a first array having a plurality of vertical light emitting cells connected in series on a single substrate; and a second array that has another plurality of vertical light emitting cells connected in series on the single substrate and is connected to the first array in reverse parallel. In the light emitting element, each of the vertical light emitting cells in the first and second arrays has a first electrode pad on a bottom surface thereof and a second electrode pad on a top surface thereof, and a connection portion is provided to electrically connect the first electrode pad of the vertical light emitting cell in the first array to the first electrode pad of the vertical light emitting cell in the second array. | 2010-03-11 |
20100059764 | STRUCTURE AND METHOD TO FORM MULTILAYER EMBEDDED STRESSORS - A multilayer embedded stressor having a graded dopant profile for use in a semiconductor structure for inducing strain on a device channel region is provided. The inventive multilayer stressor is formed within areas of a semiconductor structure in which source/drain regions are typically located. The inventive multilayer stressor includes a first conformal epi semiconductor layer that is undoped or lightly doped and a second epi semiconductor layer that is highly dopant relative to the first epi semiconductor layer. The first and second epi semiconductor layers each have the same lattice constant, which is different from that of the substrate they are embedded in. The structure including the inventive multilayer embedded stressor achieves a good balance between stress proximity and short channel effects, and even eliminates or substantially reduces any possible defects that are typically generated during formation of the deep source/drain regions. | 2010-03-11 |
20100059765 | Light-Emitting Device With Improved Electrode Structures - A light-emitting device includes first and second semiconductor layers and a light-emitting layer between the first and second semiconductor layers. The light-emitting device also includes an improved electrode structures. | 2010-03-11 |
20100059766 | STORAGE OF AN IMAGE IN AN INTEGRATED CIRCUIT - An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate, and in second pixels, for each of which the first metal portion is separated from the substrate by at least one insulating portion. | 2010-03-11 |
20100059767 | Surface Light-Emitting Device and Display Device Using the Same - A surface light-emitting device is disclosed, in which a plurality of spot light sources are arranged along the side surface of a housing of the device, and the light emitted from the spot light sources located at the end portions of the spot light source sequence emits a lower light flux than the average light flux of the light emitted from the other spot light sources. The spot light source sequence is, for example, an LED array including an alignment of light-emitting diodes (LEDs). The LED array includes two groups of LED elements arranged in a predetermined repetitive pattern from one and the other ends, respectively, of the LED array, and at least an LED emitting low light flux is arranged at a predetermined position in the vicinity of the center of the array. As a result, the requirement for a reduced thickness and a narrower frame can be met, while at the same time producing the white light of uniform chromaticity over the whole light-emitting surface. | 2010-03-11 |
20100059768 | Series Connected Segmented LED - A light source and method for making the same are disclosed. The light source includes a substrate, and a light emitting structure that is divided into segments. The light emitting structure includes a first layer of semiconductor material of a first conductivity type deposited on the substrate, an active layer overlying the first layer, and a second layer of semiconductor material of an opposite conductivity type from the first conductivity type overlying the active layer. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection electrode connects the first layer in the first segment to the second layer in the second segment. A power contact is electrically connected to the second layer in the first segment, and a second power contact electrically connected to the first layer in the second segment. | 2010-03-11 |
20100059769 | LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a light emitting device is provided. An epitaxial layer is first formed at a plurality of separated regions on a substrate and a second electrode layer is formed on the epitaxial layer. Subsequently, the substrate is removed from the epitaxial layer and a first electrode layer is formed under the epitaxial layer, after which the second electrode layer is divided into chip units. | 2010-03-11 |
20100059770 | Package Method and Structure for a Light Emitting Diode Multi-Layer Module - A package method and structure for a light emitting diode multi-layer module, wherein the method comprises the steps of: fabricating a printed circuit layer with a plurality of staggered nodes on a substrate; fabricating a frame around the substrate; fabricating a protruding inclined pier around the bottom rim of the inner wall of the frame; fabricating a plurality of convex reflecting microstructure points on the surface of the printed circuit layer; positioning chips and wire bonding; spraying reflecting paint on the surface of the substrate and the inner wall of the frame except the chips; filling a silica gel diffusion layer formed by mixing the silica gel and the diffusion powder into the frame; and evenly coating a fluorescent glue layer formed by evenly mixing another silica gel and fluorescent powder on the silica gel diffusion layer. | 2010-03-11 |
20100059771 | MULTI-LAYER LED PHOSPHORS - An LED assembly can have a plurality of different types of phosphors that are separated from one another in a manner that substantially mitigates the cannibalization of light emitted by at least one of the types of phosphors. By mitigating the cannibalization of light, brighter and more efficient white light LED assemblies can be provided. Such LED assemblies can be suitable for use in such applications as flashlights, displays, and area lighting. | 2010-03-11 |
20100059772 | Light Emitting Device - The present invention provides a light emitting device. The light emitting device has a light distribution in which a light distribution I (θ, φ) obtained when light emitted from a chip of the light emitting device is directly measured is not dependent on a direction φ and is substantially represented by I (θ, φ)=I (θ). I (θ, φ) represents a light intensity distribution in a direction (θ, φ), θ represents an angle from a direction of a normal to a light extraction surface of the light emitting device (0≦θ≦90°), φ represents a rotation angle around the normal (0≦φ≦360°), and I (θ) represents a monotone decreasing function with which 0 is approached when θ=90° is satisfied. In the light emitting device, of a structural body constructing the chip of the light emitting device, with regard to a size of a portion of the structural body which is transparent to light emitted from a light emitting layer, a ratio (an aspect ratio) between the size in a lateral direction and the size in a thickness direction is not less than 5 and a structure having a light scattering function is provided on a surface of the light emitting device chip or in an interior of the transparent portion of the structural body. | 2010-03-11 |
20100059773 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - A semiconductor light-emitting device comprises a substrate, a first conductive type semiconductor layer positioned on the substrate, a light-emitting structure positioned on the first conductive type semiconductor layer, and a second conductive type semiconductor layer positioned on the light-emitting structure. The substrate includes an upper surface and a plurality of protrusions positioned on the upper surface. Each of the protrusions includes a top surface, a plurality of wall surfaces, and a plurality of inclined surfaces sandwiched between the top surface and the wall surfaces. | 2010-03-11 |
20100059774 | ENCAPSULANT MATERIAL FOR OPTICAL COMPONENT AND LIGHT-EMITTING DEVICE - A light-emitting device is provided which uses an encapsulant material made from a polymer having a high relative light output. The light-emitting device includes a light-emitting element and a member sealing the light-emitting element. The encapsulant material has one or more than two kinds of units given by the following formula (1) and a refractive index of 1.55 or more. | 2010-03-11 |
20100059775 | Organic light emitting diode and method of fabricating the same - Provided are an organic light emitting diode and a method of fabricating the same, which can reduce the efficiency of electron injection and transport at low brightness to cause low luminous efficiency, thus preventing the organic light emitting diode from emitting light when displaying black. The organic light emitting diode includes a first electrode, an emission layer disposed on the first electrode, a second electrode disposed on the emission layer, and a metal layer formed of a metal element to a thickness of 5 to less than 50 Å. The metal layer is disposed between the first electrode and the emission layer or between the emission layer and the second electrode. | 2010-03-11 |
20100059776 | OPTICAL BONDING COMPOSITION FOR LED LIGHT SOURCE - Disclosed herein is an optical bonding composition that may be used in optical applications. An LED light source that utilizes the composition is also disclosed, as well as a method of making it. The LED light source may comprise: an LED die; an optical element optically coupled to the LED die; and a bonding layer comprising surface-modified metal oxide nanoparticles in an amorphous silicate network, the bonding layer bonding the LED die and the optical element together. Efficiency of the LED light source may be increased when using an optical extractor as the optical element. | 2010-03-11 |
20100059777 | ILLUMINATION DEVICE, PARTICULARLY WITH LUMINESCENT CERAMICS - The invention relates to an illumination device ( | 2010-03-11 |
20100059778 | Organic Light Emitting Element - An object of the present invention is to provide an organic light emitting element where light emitted from the light emitting layer is efficiently emitted to the outside, and thus, the efficiency of light emission is higher. The present invention provides an organic light emitting element where a first reflective electrode | 2010-03-11 |
20100059779 | Light-Emitting Diode with Embedded Elements - A light-emitting diode (LED) device is provided. The LED device has a substrate and an LED structure overlying the substrate. Embedded elements are embedded within one or more layers of the LED structure. In an embodiment, the embedded elements include a dielectric material extending through the LED structure such that the embedded elements are surrounded by the LED structure. In another embodiment, the embedded elements only extend through an upper layer of the LED structure, or alternatively, partially through the upper layer of the LED structure. Another conductive layer may be formed over the upper layer of the LED structure and the embedded elements. | 2010-03-11 |
20100059780 | SYSTEM FOR DISPLAYING IMAGES - A system for displaying images employing an organic electroluminescent device is provided. The organic electroluminescent device includes a first electrode, an organic electroluminescent element disposed on the first electrode, a second electrode disposed on the organic electroluminescent element, and a color tuning element disposed on the second electrode. In particular, the color tuning element has a thickness range T | 2010-03-11 |
20100059781 | SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD OF MANUFACTURING SAME - In an exemplary embodiment of the invention, a semiconductor light-emitting element includes a first semiconductor layer having a first conduction type, a second semiconductor layer having a second conduction type, an active layer provided between the first and second semiconductor layers. The semiconductor light-emitting element also includes a polarity inversion layer provided on the second semiconductor layer, and a third semiconductor layer provided on the polarity inversion layer. The third semiconductor layer has the second conduction type. The crystal orientations of the first through third semiconductor layers are inverted, with the polarity inversion layer serving as a boundary. The first and third semiconductor layers have uppermost surfaces that are made from polar faces having common constitutional elements. Hexagonal conical protrusions arising from a crystal structure are formed at the outermost surfaces of the first and third semiconductor layers. The first through third semiconductor layers are made from a wurtzite-structure group III nitride semiconductor, and are layered along the C-axis direction of the crystal structure. In another embodiment, the polar faces may be made from nitrogen atoms. The hexagonal conical protrusions may be formed by wet etching. | 2010-03-11 |
20100059782 | OPTICAL-SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTRUING THE SAME - A method for manufacturing an optical-semiconductor device, including forming a plurality of first and second electrically conductive members that are disposed separately from each other on a support substrate; providing a base member formed from a light blocking resin between the first and second electrically conductive members; mounting an optical-semiconductor element on the first and/or second electrically conductive member; covering the optical-semiconductor element by a sealing member formed from a translucent resin; and obtaining individual optical-semiconductor devices after removing the support substrate. | 2010-03-11 |
20100059783 | Light Emitting Chip Package With Metal Leads For Enhanced Heat Dissipation - A light emitting chip package includes a planar substrate, an LED die mounted on the substrate, and one or more relatively wide and thick metal leads to serve as a low thermal resistance path. The substrate comprises a chip mounting area and a wire bond area on a dielectric body. The LED die is seated on the chip mounting area and electrically connected to the wire bonding area. The metal leads are attached to the substrate and form terminals for external connection. At least one metal lead is connected to the chip mounting area to serve as a low thermal resistance path between the chip mounting area and an external heat sink. | 2010-03-11 |
20100059784 | LIGHTING DEVICE OF LEDS ON A TRANSPARENT SUBSTRATE - Proposed is a lighting device ( | 2010-03-11 |
20100059785 | LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating a light emitting device initially forms a copper clad ceramic board of the light emitting device using hot-pressing technique at high temperature and photolithography process. Next, a circuit of the light emitting device is formed using die bonding and wire bonding/flip-chip processes. Finally, the light emitting device is sealed using transfer molding or injection molding process. | 2010-03-11 |
20100059786 | SEMICONDUCTOR CHIP ASSEMBLY WITH POST/BASE HEAT SPREADER AND SUBSTRATE - A semiconductor chip assembly includes a semiconductor device, a heat spreader, a substrate and an adhesive. The semiconductor device is electrically connected to the substrate and thermally connected to the heat spreader. The heat spreader includes a post and a base. The post extends upwardly from the base into an opening in the adhesive and an aperture in the substrate, and the base extends laterally from the post. The adhesive extends between the post and the substrate and between the base and the substrate. The assembly provides signal routing between a pad and a terminal. | 2010-03-11 |
20100059787 | SEMICONDUCTOR LIGHT-EMITTING APPARATUS - An object of the present invention is to provide a light-emitting apparatus reduced in the optical self-absorption of the light-emitting device and assured of excellent light extraction efficiency. The inventive light-emitting apparatus comprises a substrate, a semiconductor light-emitting device provided on the substrate with or without intervention of a submount, and an encapsulating structure for encapsulating the semiconductor light-emitting device, wherein the encapsulating structure has a bottom parallel to the bottom of the semiconductor light-emitting device and the side surface of the encapsulating structure is tilted with respect to the bottom. | 2010-03-11 |
20100059788 | THERMOSETTING COMPOSITION - A thermosetting composition containing an aluminosiloxane, a silicone oil containing silanol groups at both ends, and a silicone alkoxy oligomer. The thermosetting composition of the present invention can be used for, for example, encapsulating materials, coating materials, molding materials, surface-protecting materials, adhesive agents, bonding agents, and the like. Especially, in a case where the thermosetting composition of the present invention is used as an encapsulating material, the thermosetting composition is suitably used for, for example, photosemiconductor devices mounted with blue or white LED elements (backlights for liquid crystal displays, traffic lights, outdoor big displays, advertisement sign boards, and the like). | 2010-03-11 |
20100059789 | NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD FOR FABRICATING THEREOF - Disclosed is a nitride semiconductor light-emitting device, including a substrate, a nitride semiconductor layer including a first conductive layer, an active layer and a second conductive layer located on the substrate, a first electrode formed on the first conductive layer, and a second electrode formed on the second conductive layer, wherein a pattern having one or more protrusions formed at a predetermined interval and concave portions resulting from depression of upper surfaces of the protrusions to a predetermined depth is formed on the surface of the substrate which abuts with the first conductive layer. A method of fabricating the nitride semiconductor light-emitting device is also provided. When the substrate having a pattern with protrusions and concave portions is used, higher light extraction efficiency can be obtained. | 2010-03-11 |
20100059790 | NITRIDE-BASED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A nitride-based semiconductor device includes an n-type nitride-based semiconductor layer, and an n-side electrode having a first metal layer made of Al, formed on a surface of the n-type nitride-based semiconductor layer and a second metal layer made of Hf formed so as to cover a surface of the first metal layer on a side opposite to the n-type nitride-based semiconductor layer. | 2010-03-11 |
20100059791 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR THE SAME - A semiconductor device, which reduces the earth inductance, and a fabrication method for the same is provided. | 2010-03-11 |
20100059792 | METHOD OF RADIATION GENERATION AND MANIPULATION - A method of managing radiation having a frequency in the terahertz and/or microwave regions. The method comprises providing a semiconducting device having a two-dimensional carrier gas. Plasma waves are generated in the carrier gas using a laser pulse. The frequency of the plasma waves, and as a result, the generated radiation are adjusted using a voltage applied to the semiconducting device. | 2010-03-11 |
20100059793 | InP BASED HETEROJUNCTION BIPOLAR TRANSISTORS WITH EMITTER-UP AND EMITTER-DOWN PROFILES ON A COMMON WAFER - A wafer comprising at least one emitter-up Heterojunction Bipolar Transistor (HBT) and at least one emitter-down HBT on a common InP based semiconductor wafer. Isolation and N-type implants into the device layers differentiate an emitter-down HBT from an emitter-up HBT. The method for preparing a device comprises forming identical layers for all HBTs and performing ion implantation to differentiate an emitter-down HBT from an emitter-up HBT. | 2010-03-11 |
20100059794 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING THE SAME - To provide a circuit layout design method that can prevent degradation of the circuit reliability even in highly miniaturized circuit cells. | 2010-03-11 |
20100059795 | VERTICAL CURRENT TRANSPORT IN A POWER CONVERTER CIRCUIT - In at least one embodiment of the invention, an apparatus includes an integrated circuit comprising a power stage portion of a power converter circuit. The power stage portion includes a first switch circuit portion formed by a first plurality of lateral devices in a first substrate. The power stage portion includes a second switch circuit portion formed by a second plurality of lateral devices in the first substrate. The integrated circuit includes a multi-layer current routing structure configured to transport a first current between the first plurality of lateral devices and an array of conductor structures on the surface of the integrated circuit using a first substantially vertical conduction path when the first switch circuit portion is enabled. The multi-layer current routing structure is configured to transport a second current between the second plurality of lateral devices and the array of conductor structures using a second substantially vertical conduction path when the second switch portion is enabled. | 2010-03-11 |
20100059796 | Shared masks for x-lines and shared masks for y-lines for fabrication of 3D memory arrays - A structure and a method of manufacturing a three dimensional memory using a number of bit line masks that is less than the number of device layers. A first bit line mask is used to form a first bit line layer in a first device level. The first bit line layer comprises first bit lines. The first bit line mask is also used to form a second bit line layer in a second device level. The second bit line layer comprises second bit lines. The first bit lines and the second bit lines have different electrical connections to a bit line connection level despite employing the same mask pattern. | 2010-03-11 |
20100059797 | (110)-ORIENTED P-CHANNEL TRENCH MOSFET HAVING HIGH-K GATE DIELECTRIC - A method of forming a field effect transistor having a heavily doped p-type (110) semiconductor layer over a metal substrate starts with providing a heavily doped p-type (110) silicon layer, and forming a lightly doped p-type (110) silicon layer on the P heavily doped-type (110) silicon layer. The method also includes forming a p-channel MOSFET which has a channel region along a (110) crystalline plane in the lightly doped p-type (110) silicon layer to allow a current conduction in a <110> direction. The p-channel MOSFET also includes a gate dielectric layer having a high dielectric constant material lining the (110) crystalline plane. The method further includes forming a top conductor layer overlying the lightly doped p-type (110) silicon layer and a bottom conductor layer underlying the heavily doped p-type (110) silicon layer. A current conduction from the top conductor layer to the bottom conductor layer is characterized by a hole mobility along a <110> crystalline orientation and on a (110) crystalline plane. | 2010-03-11 |
20100059798 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - There is provided a semiconductor device including: a SiC substrate; an AlGaN layer formed on the SiC substrate; a source electrode and a drain electrode formed on the AlGaN layer so as to be spaced from each other; a first insulation film formed between the source electrode and the drain electrode and having a band-like opening parallel to the drain electrode and the source electrode; a gate electrode formed at the opening in the first insulation film; a second insulation film formed on the first insulation film in such a manner as to cover a surface of the gate electrode; and a source field plate electrode which is formed on the second insulation film and the source electrode and an end portion of which on the drain electrode side is spaced from the second insulation film, thereby suppressing degradation in device performance. | 2010-03-11 |
20100059799 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - The present invention relates to a method for manufacturing a semiconductor device, and provides to reduce a contact resistance of a landing plug by forming the landing plug in such a manner that a polysilicon layer is deposited only on the surface of a landing plug contact hole, and a metal layer is buried in the rest of the landing plug contact hole in the process of forming a storage node contact or a bit line contact. | 2010-03-11 |
20100059800 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - A semiconductor device including: a SiC substrate; an AlGaN layer formed on the SiC substrate; a source electrode and a drain electrode formed on the AlGaN layer so as to be spaced from each other; an insulation film formed between the source electrode and the drain electrode and having a band-like opening in parallel to the source electrode and the drain electrode; a gate electrode formed at the opening in the insulation film; and a drain-side field plate electrode formed integrally with the gate electrode on the drain electrode side of the gate electrode and having a drain electrode side end portion spaced from the insulation film, thus restraining degradation in performance. | 2010-03-11 |
20100059801 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a gate insulating film formed on a semiconductor region of a first conductivity type; a gate electrode formed on the gate insulating film; an offset spacer formed on a side surface of the gate electrode; an inner sidewall formed on the side surface of the gate electrode with the offset spacer interposed therebetween, and having an L-shaped cross section; and an insulating film formed to cover the gate electrode, the offset spacer, the inner sidewall, and a part of the semiconductor region located laterally outward from the inner sidewall. The offset spacer includes an inner offset spacer formed on the side surface of the gate electrode and an outer offset spacer formed to cover the side surface of the gate electrode and the inner offset spacer. The outer offset spacer is in contact with a top end and outer side surface of the inner offset spacer. | 2010-03-11 |
20100059802 | IMAGE SENSOR WITH RAISED PHOTOSENSITIVE ELEMENTS - An image sensor having a pixel array comprises periphery elements formed over a substrate, an oxide layer formed over the periphery elements, an epitaxial layer formed in an opening in the oxide layer in a pixel array area, and a plurality of photosensitive elements of the pixel array formed in the epitaxial layer. Formation of an initial metallization layer occurs after the formation of the photosensitive elements in the epitaxial layer. The photosensitive elements can thus be formed in the epitaxial layer at a higher level within an image sensor stack than that of the initial metallization layer. This advantageously allows stack height and pixel size to be reduced, and fill factor to be increased. The image sensor may be implemented in a digital camera or other type of digital imaging device. | 2010-03-11 |
20100059803 | LIGHT REFLECTING CMOS IMAGE SENSOR - An image sensor comprising at least:
| 2010-03-11 |
20100059804 | PHOTOELECTRIC CONVERSION DEVICE AND METHOD OF MANUFACTURING THE SAME - A photoelectric conversion device includes a thin film transistor that is placed on a substrate, a photodiode that is connected to a drain electrode of the thin film transistor and includes an upper electrode, a lower electrode and a photoelectric conversion layer placed between the upper and lower electrodes, a first interlayer insulating film that covers at least the upper electrode, a second interlayer insulating film that is placed in an upper layer of the first interlayer insulating film and covers the thin film transistor and the photodiode, and a line that is connected to the upper electrode through a contact hole disposed in the first interlayer insulating film and the second interlayer insulating film. | 2010-03-11 |
20100059805 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate having an active region and an isolation region. A gate structure is provided on the semiconductor device. First and second impurity regions are provided in the substrate on both sides of the gate structure. A pad electrode is provided to contact the first impurity region. Because the pad electrode is provided on the first impurity region of the semiconductor device, the contact plug does not directly contact the active region. Accordingly, failures caused by damage to the active region may be prevented. | 2010-03-11 |
20100059806 | Semiconductor device - A semiconductor device is proposed in which signal delay due to compensation capacitance elements in peripheral circuit element regions is eliminated. The semiconductor device includes: a first region including memory cells; a second region | 2010-03-11 |
20100059807 | Semiconductor device having bar type active pattern - A semiconductor device having a bar type active pattern and a method of manufacturing the same are provided. The semiconductor device may include a semiconductor substrate having a semiconductor fin configured to protrude from a surface of the semiconductor substrate in a first direction, the semiconductor substrate having a first width and a second width crossing the first width, wherein the first width and the second width extend in a second direction. A plurality of active patterns may be arranged in the first direction with a separation gap from the semiconductor fin. A plurality of support patterns may be arranged between the semiconductor fin and one of the plurality of active patterns arranged closer to the semiconductor fin in the first direction, and between the plurality of active patterns arranged in the first direction to support the plurality of active patterns. A gate may be arranged to cross the plurality of active patterns in the second direction and to cover a portion of the at least one of the plurality of active patterns. | 2010-03-11 |
20100059808 | NONVOLATILE MEMORIES WITH CHARGE TRAPPING DIELECTRIC MODIFIED AT THE EDGES - A nonvolatile memory cell has charge trapping dielectric ( | 2010-03-11 |
20100059809 | NON-VOLATILE MEMORY AND METHOD OF FABRICATING THE SAME - A method of fabricating a non-volatile memory is provided. First, a bottom oxide layer is formed on a substrate. Thereafter, a silicon-rich nitride layer is formed on the bottom oxide layer by using NH | 2010-03-11 |
20100059810 | SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - The present invention can realize a highly-integrated semiconductor device having a MONOS type nonvolatile memory cell equipped with a split gate structure without deteriorating the reliability of the device. A memory gate electrode of a memory nMIS has a height greater by from 20 to 100 nm than that of a select gate electrode of a select nMIS so that the width of a sidewall formed over one (side surface on the side of a source region) of the side surfaces of the memory gate electrode is adjusted to a width necessary for achieving desired disturb characteristics. In addition, a gate electrode of a peripheral second nMIS has a height not greater than the height of a select gate electrode of a select nMIS to reduce the width of a sidewall formed over the side surface of the gate electrode of the peripheral second nMIS so that a shared contact hole is prevented from being filled with the sidewall. | 2010-03-11 |