06th week of 2012 patent applcation highlights part 14 |
Patent application number | Title | Published |
20120032154 | SEMICONDUCTOR DEVICE, DISPLAY DEVICE AND ELECTRONIC EQUIPMENT - Disclosed herein is a semiconductor device including: a gate electrode; a gate insulating film; an organic semiconductor layer; and source and drain electrodes. | 2012-02-09 |
20120032155 | LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, DISPLAY DEVICE, AND ELECTRONIC APPARATUS - A light-emitting element includes an anode; a cathode; a first light-emitting layer that is disposed between the anode and the cathode, the first light-emitting layer emitting light in response to application of voltage between the anode and the cathode; a second light-emitting layer that is disposed between the cathode and the first light-emitting layer, the second light-emitting layer emitting light in response to application of voltage between the anode and the cathode; and a carrier-generating layer that is disposed between the first light-emitting layer and the second light-emitting layer, the carrier-generating layer generating electrons and holes. The carrier-generating layer has an n-type electron transport layer and an electron-withdrawing layer, the n-type electron transport layer contacting the first light-emitting layer and having electron transportability, and the electron-withdrawing layer being disposed between the n-type electron transport layer and the second light-emitting layer and having electron-withdrawing properties. | 2012-02-09 |
20120032156 | Triphenylene Hosts in Phosphorescent Light Emitting Diodes - An organic emissive layer is provided. Also provided is a device in which the organic emissive layer is disposed between an anode and a cathode. The organic emissive layer includes a phosphorescent material and triphenylene compound or a compound having a repeat unit having a triphenylene moiety. The triphenylene is optionally substituted. The substituents may be the same or different and each is selected from the group consisting of alkyl, aryl, fused aryl, substituted aryl, alkenyl, alkynyl, and heteroalkyl. Triphenylene compounds are also provided. | 2012-02-09 |
20120032157 | COATING METHOD, AND ORGANIC ELECTROLUMINESCENCE ELEMENT - Disclosed are a coating method of forming a coating with a stable thickness from a coating solution with a low viscosity employing a slit-type die coater and an organic electroluminescence element prepared employing the coating method. The coating method employing a slit-type die coater comprises the steps of allowing a lip tip of the slit-type die coater to bring close to the substrate to form a coating solution bead between the lip tip and the substrate, and coating on the substrate a coating solution ejected from a slit outlet at the lip tip while relatively moving the slit-type die coater and the substrate, thereby forming at least two coating layers in the stripe shape, featured in that the lip tip has at least one groove in the coating region in the coating width direction, and a pressure at the slit outlet of the coating solution of the bead is negative or zero. | 2012-02-09 |
20120032158 | Charge transport compositions and electronic devices made with such compositions - The present invention is directed to a photoactive device comprising an anode, a cathode, and a photoactive layer, which device further comprises an electron transport and/or anti-quenching layer which minimizes both electron transfer quenching and energy transfer quenching of the photoactive layer. | 2012-02-09 |
20120032159 | DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE - It is an object of the present invention to provide a reliable display device and a method for manufacturing the display device reducing the number of manufacturing steps, and with higher yield. A display device according to the invention includes a plurality of display elements each having a first electrode, a layer containing an organic compound, and a second electrode. The display device further includes a heat-resistant planarizing film over a substrate having an insulating surface, a first electrode over the heat-resistant, planarizing film, a wiring covering an end portion of the first electrode, a partition wall covering the end portion of first electrode and the wiring, a layer containing an organic compound, and a second electrode over the layer containing an organic compound. | 2012-02-09 |
20120032160 | ORGANIC FIELD EFFECT TRANSISTOR AND SEMICONDUCTOR DEVICE - It is an object to provide an organic field effect transistor including an electrode which can reduce an energy barrier at an interface between a conductive layer and a semiconductor layer, and a semiconductor device including the organic field effect transistor. A composite layer containing an organic compound and an inorganic compound is provided in at least part of one of a source electrode and a drain electrode in an organic field effect transistor, and as the organic compound, a carbazole derivative represented by the general formula (1) is used. By providing the composite layer in at least part of one of the source electrode and the drain electrode, an energy barrier at an interface between a conductive layer and a semiconductor layer can be reduced. | 2012-02-09 |
20120032161 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device which can hold stored data even when not powered and which achieves high integration by reduction of the number of wirings. The semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, e.g., an oxide semiconductor material which is a wide bandgap semiconductor. When a semiconductor material which allows a sufficient reduction in the off-state current of a transistor is used, data can be held for a long period. One line serves as the word line for writing and the word line for reading and one line serves as the bit line for writing and the bit line for reading, whereby the number of wirings is reduced. Further, by reducing the number of source lines, the storage capacity per unit area is increased. | 2012-02-09 |
20120032162 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device which can hold stored data even when not powered and which achieves high integration by reduction of the number of wirings. The semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, e.g., an oxide semiconductor material which is a wide bandgap semiconductor. When a semiconductor material which allows a sufficient reduction in the off-state current of a transistor is used, data can be held for a long period. One line serves as the word line for writing and the word line for reading and one line serves as the bit line for writing and the bit line for reading, whereby the number of wirings is reduced. Accordingly, the storage capacity per unit area is increased. | 2012-02-09 |
20120032163 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - The electric characteristics of a semiconductor device including an oxide semiconductor change by irradiation with visible light or ultraviolet light. In view of the above problem, one object is to provide a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. Over an oxide insulating layer, a first oxide semiconductor layer is formed to a thickness greater than or equal to 1 nm and less than or equal to 10 nm and crystallized by heat treatment, so that a first crystalline oxide semiconductor layer is formed. A second crystalline oxide semiconductor layer with a greater thickness than the first crystalline oxide semiconductor layer is formed thereover. | 2012-02-09 |
20120032164 | SEMICONDUCTOR DEVICE - In a semiconductor device which conducts multilevel writing operation and a driving method thereof, a signal line for controlling on/off of a writing transistor for conducting a writing operation on a memory cell using a transistor including an oxide semiconductor layer is disposed along a bit line, and a multilevel writing operation is conducted with use of, also in a writing operation, a voltage which is applied to a capacitor at a reading operation. Because an oxide semiconductor material that is a wide gap semiconductor capable of sufficiently reducing off-state current of a transistor is used, data can be held for a long period. | 2012-02-09 |
20120032165 | AQUEOUS SOLUTION COMPOSITION FOR FLUORINE DOPED METAL OXIDE SEMICONDUCTOR AND THIN FILM TRANSISTOR INCLUDING THE SAME - Provided are an aqueous solution composition for fluorine doped metal oxide semiconductor, a method for manufacturing a fluorine doped metal oxide semiconductor using the same, and a thin film transistor including the same. The aqueous solution composition for fluorine doped metal oxide semiconductor includes: a fluorine compound precursor made of one or two or more selected from the group consisting of a metal compound containing fluorine and an organic material containing fluorine; and an aqueous solution containing water or catalyst. The method for manufacturing a fluorine doped metal oxide semiconductor, includes: preparing an aqueous solution composition for fluorine doped metal oxide semiconductor, coating a substrate with the aqueous solution composition; and performing heat treatment on the coated substrate to form the fluorine doped metal oxide semiconductor. The thin film transistor of the present invention can exhibit excellent electrical properties even at a temperature for low-temperature annealing, as compared with the metal oxide semiconductor thin film transistor of the related art. | 2012-02-09 |
20120032166 | HETERO pn JUNCTION SEMICONDUCTOR AND PROCESS FOR PRODUCING THE SAME - A hetero pn junction semiconductor constituted of an electrically conductive polymer as a p-type semiconductor and an inorganic oxide as an n-type semiconductor, which is characterized in that the electrically conductive polymer is filled among nanoparticles of the inorganic oxide so as to satisfy the following Equation 1: | 2012-02-09 |
20120032167 | SEMICONDUCTOR PACKAGE AND METHOD OF TESTING SAME - A packaged integrated circuit includes a substrate having a wire layout pattern and a solder mask layer. An integrated circuit attached to a surface of the substrate is electrically connected to the wire layout pattern. An encapsulation material covers at least the integrated circuit and the solder mask layer. One or more crack seal rings are disposed on the solder mask surface. The crack seal rings are copper traces with terminals that allow current to be applied to the traces. A broken trace (open circuit condition) is indicative of a crack in the package. Thus, electrical testing is performed to detect physical defects. | 2012-02-09 |
20120032168 | PHOTONIC DEVICE AND METHOD OF MAKING THE SAME - A photonic device ( | 2012-02-09 |
20120032169 | Visible ray sensor and light sensor including the same - The present invention relates to a visible ray sensor and a light sensor capable of improving photosensitivity by preventing photodegradation. The visible ray sensor may include: a substrate, a light blocking member formed on the substrate, and a visible ray sensing thin film transistor formed on the light blocking member. The light blocking member may be made of a transparent electrode, a band pass filter, or an opaque metal. | 2012-02-09 |
20120032170 | Electric Double-Layer Capacitor and Solar Power Generation Device - The present invention relates to a solar power generation device which includes an electric double-layer capacitor and a solar cell. The electric double-layer capacitor includes a pair of current collectors formed using a light-transmitting conductive material; active materials which are dispersed on the pair of current collectors; a light-transmitting electrolyte layer which is provided between the pair of current collectors; and a terminal portion which is electrically connected to the current collector. The solar cell includes, over a light-transmitting substrate, a first light-transmitting conductive film; a photoelectric conversion layer which is provided in contact with the first light-transmitting conductive film; and a second light-transmitting conductive film which is provided in contact with the photoelectric conversion layer. The electric double-layer capacitor and the solar cell are electrically connected to each other through the terminal portion, the first light-transmitting conductive film, and the second light-transmitting conductive film. | 2012-02-09 |
20120032171 | SEMICONDUCTOR DEVICE - An object is to miniaturize a semiconductor device. Another object is to reduce the area of a driver circuit of a semiconductor device including a memory cell. The semiconductor device includes an element formation layer provided with at least a first semiconductor element, a first wiring provided over the element formation layer, an interlayer film provided over the first wiring, and a second wiring overlapping with the first wiring with the interlayer film provided therebetween. The first wiring, the interlayer film, and the second wiring are included in a second semiconductor element. The first wiring and the second wiring are wirings to which the same potentials are supplied. | 2012-02-09 |
20120032172 | SEMICONDUCTOR DEVICE - A semiconductor device including the following components and a manufacturing method of the semiconductor device are provided. The semiconductor device includes a substrate; an oxide semiconductor layer over the substrate; a source electrode and a drain electrode whose end portion has a taper angle and whose upper end portion has a curved surface, the source electrode and the drain electrode being electrically connected to the oxide semiconductor layer; a gate insulating layer being in contact with a part of the oxide semiconductor layer and covering the oxide semiconductor layer, the source electrode, and the drain electrode; and a gate electrode overlapping with the oxide semiconductor layer and being over the gate insulating layer. | 2012-02-09 |
20120032173 | TOP GATE THIN FILM TRANSISTOR AND DISPLAY APPARATUS INCLUDING THE SAME - Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer. | 2012-02-09 |
20120032174 | SEMICONDUCTOR DEVICE, DISPLAY DEVICE AND ELECTRONIC DEVICE - Disclosed herein is a semiconductor device including: a gate electrode on a substrate; a gate insulating film covering said gate electrode; an organic semiconductor layer disposed so as to be superposed above said gate electrode with said gate insulating film interposed between the organic semiconductor layer and the gate electrode within a width of said gate electrode; and a source electrode and a drain electrode having respective end parts disposed so as to be opposed to each other on said organic semiconductor layer in a state of said gate electrode being interposed between the source electrode and the drain electrode in a direction of the width of said gate electrode. | 2012-02-09 |
20120032175 | DISPLAY STRUCTURE - A display structure includes a first transparent substrate, a second transparent substrate opposite the first transparent substrate, a display medium interposed between the first transparent substrate and the second transparent substrate, at least one first thin film transistor formed on the first transparent substrate, a first insulation layer formed on the first transparent substrate, a first electrode layer formed on the first insulation layer, an organic light-emitting layer formed on the first electrode layer and in a region not overlapping the first thin film transistor, a cathode layer formed on the organic light-emitting layer, and a second electrode layer formed on the second transparent substrate. | 2012-02-09 |
20120032176 | Electronic Paper Device And Manufacturing Method Thereof - This present invention provides an electronic paper display device. The electronic paper display device includes a thin film transistor array substrate and a display panel disposed on one side of the thin film transistor array substrate. The thin film transistor array substrate comprises a first substrate, a first metal layer, a dielectric layer, a second metal layer, a channel layer, a pixel electrode layer, a protection layer, a first resin layer and a second resin layer. The display panel includes a second substrate, a transparent electrode layer disposed on the second substrate, and an electronic ink material layer between the transparent electrode layer and the thin film transistor array substrate. | 2012-02-09 |
20120032177 | Display Device and Method for Manufacturing the Same - A display device having the high aperture ratio and a storage capacitor with high capacitance is to be obtained. The present invention relates to a display device and a manufacturing method thereof. The display device includes a thin film transistor which includes a gate electrode, a gate insulating film, a first semiconductor layer, a channel protective film, a second semiconductor having conductivity which is divided into a source region and a drain region, and a source electrode and a drain electrode; a third insulating layer formed over the second conductive film; a pixel electrode formed over the third insulating layer, which is connected to one of the source electrode and the drain electrode; and a storage capacitor formed in a region where a capacitor wiring over the first insulating layer and the pixel electrode are overlapped with the third insulating layer over the capacitor wiring interposed therebetween. | 2012-02-09 |
20120032178 | Display Device and Method for Manufacturing the Same - It is an object of the present invention to provide a display device preventing the external invasion of water and/or oxygen and preventing the deterioration of a luminous element due to these invading substances and to provide a production method including simple production steps for producing the display device. The invention provides a display device having a sealing material on the rim of an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Further, the invention provides a display device having a barrier body on an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Furthermore, the application of droplet discharge technique in production steps for producing the display device can eliminate a photolithography step such as exposing and developing. Thus, a method of producing a display device having an improved yield is provided. | 2012-02-09 |
20120032179 | THIN-FILM TRANSISTOR ARRAY DEVICE, ORGANIC EL DISPLAY DEVICE, AND METHOD OF MANUFACTURING THIN-FILM TRANSISTOR ARRAY DEVICE - A thin-film transistor array device includes: a driving TFT including a first crystalline semiconductor film including crystal grains having a first average grain size; and a switching TFT including a second crystalline semiconductor film including crystal grains having a second average grain size that is smaller than the first average grain size. The first crystalline semiconductor film and the second crystalline semiconductor film are formed at the same time by irradiating a noncrystalline semiconductor film using a laser beam having a Gaussian light intensity distribution such that a temperature of the noncrystalline semiconductor film is within a range of 600° C. to 1100° C., and the first crystalline semiconductor film is formed such that the temperature of the noncrystalline semiconductor film is within a temperature range of 1100° C. to 1414° C. due to latent heat generated by the laser irradiation. | 2012-02-09 |
20120032180 | THIN-FILM TRANSISTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In the thin-film transistor device: the stacked thickness of either a source electrode or a drain electrode and a corresponding one of silicon layers is the same value or a value close to the same value as the stacked thickness of a first channel layer and a second channel layer; the stacked thickness of the first channel layer and the second channel layer is the same in a region between the source electrode and the drain electrode and above the source electrode and the drain electrode; the first channel layer and the second channel layer are sunken in the region between the source electrode and the drain electrode, following a shape between the source electrode and the drain electrode; and the gate electrode has one region overlapping with the source electrode and an other region overlapping with the drain electrode. | 2012-02-09 |
20120032181 | SEMICONDUCTOR DEVICE AND DISPLAY DEVICE - It is an object of the invention to provide a thin, lightweight, high performance, and low in cost semiconductor device and a display device by reducing an arrangement area required for a power supply wiring and a ground wiring of a functional circuit and decreasing a drop in power supply voltage and a rise in ground voltage. In the functional circuit of the semiconductor device and the display device, a power supply wiring and a ground wiring are formed in a comb-like arrangement, and the tips thereof are electrically connected with a first wiring, a second wiring, and a contact between the first wiring and the second wiring, thereby forming in a grid-like arrangement. The drop in power supply voltage and the rise in ground voltage can be decreased and the arrangement area can be decreased in the grid-like arrangement. | 2012-02-09 |
20120032182 | SOLID STATE LIGHTS WITH THERMAL CONTROL ELEMENTS - A solid state light (“SSL”), a solid state emitter (“SSE”), and methods of manufacturing SSLs and SSEs. In one embodiment, an SSL comprises a packaging substrate having an electrical contact and a light emitting structure having a front side and a back side. The back side of the light emitting structure is superimposed with the electrical contact of the packaging substrate. The SSL can further include a temperature control element aligned with the light emitting structure and the electrical contact of the packaging substrate. | 2012-02-09 |
20120032183 | GaN Based LED having Reduced Thickness and Method for Making the Same - A device having a carrier, a light-emitting structure, and first and second electrodes is disclosed. The light-emitting structure includes an active layer sandwiched between a p-type GaN layer and an n-type GaN layer, the active layer emitting light of a predetermined wavelength in the active layer when electrons and holes from the n-type GaN layer and the p-type GaN layer, respectively, combine therein. The first and second electrodes are bonded to the surfaces of the p-type and n-type GaN layers that are not adjacent to the active layer. The n-type GaN layer has a thickness less than 1.25 μm. The carrier is bonded to the light emitting structure during the thinning of the n-type GaN layer. The thinned light-emitting structure can be transferred to a second carrier to provide a device that is analogous to conventional LEDs having contacts on the top surface of the LED. | 2012-02-09 |
20120032184 | SYSTEMS AND METHODS FOR PRODUCING WHITE-LIGHT LIGHT EMITTING DIODES - A vertical light-emitting diode (VLED) includes a metal substrate, a p-electrode coupled to the metal substrate, a p-contact coupled to the p-electrode, a p-GaN portion coupled to the p-electrode, an active region coupled to the p-GaN portion, an n-GaN portion coupled to the active region, and a phosphor layer coupled to the n-GaN portion. | 2012-02-09 |
20120032185 | LEAKAGE BARRIER FOR GaN BASED HEMT ACTIVE DEVICE - An improved HEMT formed from a GaN material system is disclosed which has reduced gate leakage current and eliminates the problem of current constrictions resulting from deposition of the gate metal over the step discontinuities formed over the gate mesa. One or more GaN based materials are layered and etched to form a gate mesa with step discontinuities defining source and drain regions. In order to reduce the leakage current, the step discontinuities are back-filled with an insulating material, such as silicon nitride (SiN), forming a flat surface relative to the source and drain regions, to enable to the gate metal to lay flat. By back-filling the source and drain regions with an insulating material, leakage currents between the gate and source and the gate and drain are greatly reduced. In addition, current constrictions resulting from the deposition of the gate metal over a step discontinuity are virtually eliminated. | 2012-02-09 |
20120032186 | WHITE ORGANIC LIGHT EMITTING DEVICE - Provided is a white organic light emitting device (OLED), including: a first electrode formed on a substrate; a hole transport layer formed on the first electrode; an emission layer formed on the hole transport layer; an electron transport layer formed on the emission layer; and an color control layer formed on at least one of the hole transport layer, the emission layer and the electron transport layer, and emitting green and/or red by energy transfer from the emission layer. The white OLED emits red, green and blue light with high efficiency, has excellent color reproducibility and a high color reproduction index. | 2012-02-09 |
20120032187 | Lattice-Mismatched GaInP LED Devices and Methods of Fabricating Same | 2012-02-09 |
20120032188 | COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Two layers of protection films are formed such that a sheet resistance at a portion directly below the protection film is higher than that at a portion directly below the protection film. The protection films are formed, for example, of SiN film, as insulating films. The protection film is formed to be higher, for instance, in hydrogen concentration than the protection film so that the protection film is higher in refractive index the protection film. The protection film is formed to cover a gate electrode and extend to the vicinity of the gate electrode on an electron supplying layer. The protection film is formed on the entire surface to cover the protection film. According to this configuration, the gate leakage is significantly reduced by a relatively simple configuration to realize a highly-reliable compound semiconductor device achieving high voltage operation, high withstand voltage, and high output. | 2012-02-09 |
20120032189 | ORGANOPOLYSILOXANE COMPOSITION AND SEMICONDUCTOR APPARATUS - Provided is an organopolysiloxane composition that provides a cured product which has excellent heat resistance and does not peel or crack even under high temperatures. The organopolysiloxane composition comprises (A) an organopolysiloxane having difunctional siloxane units (D units) and trifunctional siloxane units (T units), and a weight-average molecular weight of 37,000 to 140,000 in which the molar ratio (T/D) of the T units to the D units is 0.3 to 0.8; and (B) an organopolysiloxane having the difunctional siloxane units (D units) and the trifunctional siloxane units (T units), and a weight-average molecular weight of 1,000 to 60,000 in which the molar ratio (T/D) of the T units to the D units is 0.15 or less, the organopolysiloxane composition being characterized by having a molar ratio (B/A) of the organopolysiloxane (B) to the organopolysiloxane (A) of 1.5 to 6.5. | 2012-02-09 |
20120032190 | PACKAGE AND FABRICATION METHOD OF THE SAME - According to one embodiment, provided are a package utilized for a high frequency semiconductor device and a fabrication method for such the package, the package including: a conductive base plate including a CTE control layer composed of compound material, and a heat conduction layer disposed on the CTE control layer and composed of Cu. | 2012-02-09 |
20120032191 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE AND SILICON CARBIDE SUBSTRATE - A method for manufacturing a silicon carbide substrate ( | 2012-02-09 |
20120032192 | LIGHT EMITTING DIODE - A light emitting diode includes a first illumination region, a second illumination region, and the third illumination, wherein a first fluorescent conversion layer and a second fluorescent conversion layer cover the first illumination region and the second illumination region, respectively. The fluorescent conversion layers can convert lights from the illumination regions to other lights with different wavelengths whereby the light emitting diode generates light with multiple wavelengths. | 2012-02-09 |
20120032193 | SOLID-STATE IMAGE SENSING DEVICE AND SEMICONDUCTOR DISPLAY DEVICE - To provide a solid-state image sensing device or a semiconductor display device, which can easily obtain the positional data of an object without contact. Included are a plurality of first photosensors on which light with a first incident angle is incident from a first incident direction and a plurality of second photosensors on which light with a second incident angle is incident from a second incident direction. The first incident angle of light incident on one of the plurality of first photosensors is larger than that of light incident on one of the other first photosensors. The second incident angle of light incident on one of the plurality of second photosensors is larger than that of light incident on one of the other second photosensors. | 2012-02-09 |
20120032194 | LIGHTING MODULE WITH HIGH COLOR RENDING PROPERTY - A lighting module with high rending property includes a substrate, a plurality of first light emitting diode (LED) chips, a plurality of second LED chips and a wavelength conversion layer. The first LED chips are deposed on the substrate and electrically connected to the substrate. The second LED chips are deposed on the substrate and electrically connected to the substrate. The wavelength conversion layer seals the first LED chips and the second LED chips. The light emitted from the LED chips and the light emitted from the wavelength conversion layer caused by an excitation by the LED chips are mixing to form warm white light with high color rending property. The number ratio of the first LED chips to the second LED chips deposed on the substrate is 2:1. | 2012-02-09 |
20120032195 | DISPLAY PANEL - A display panel includes a substrate and a plurality of pixel units. Each pixel unit includes a first thin film transistor and a second thin film transistor. The first thin film transistor includes a first gate electrode electrically connected to a fist gate line, a first source electrode electrically connected to a data line, and a first drain electrode electrically connected to a first pixel electrode. The second thin film transistor includes a second gate electrode electrically connected to a second gate line, a second source electrode electrically connected to the data line, and a second drain electrode electrically connected to a second pixel electrode. The first drain electrode extends along a first direction to overlap the first gate electrode, and the second drain electrode extends along the first direction to overlap the second gate electrode. | 2012-02-09 |
20120032196 | LIGHT EMITTING DEVICE - According to one embodiment, a light emitting device includes a base substrate, first and second substrates, first and second semiconductor light emitting elements. The first and second substrates are provided on a major surface of the base substrate and include first and second reflection regions, respectively. The first and second semiconductor light emitting elements include first and second structural bodies including first and second light emitting layers, respectively. Each of the first and second semiconductor light emitting elements is inputted with a power not less than 1 Watt. An area of a face of the first semiconductor light emitting element is S | 2012-02-09 |
20120032197 | LIGHT EMITTING DEVICE AND IMAGE DISPLAY UNIT - A light emitting device includes a package having a recess, a lead frame buried in the package so that one end of the lead frame is exposed at a bottom of the recess and another end protrudes to an exterior of the package, a light emitting element arranged on the lead frame exposed at the bottom of the recess, and an encapsulant filled in the recess. The package includes, at the side face where the lead frame protrudes, a first side face formed inwardly relative to a side face of the lead frame, and a second side face formed at a lower portion of the first side face and protruded so as to cover a top face of the lead frame. | 2012-02-09 |
20120032198 | OPTOELECTRONIC SEMICONDUCTOR DEVICE - An optoelectronic semiconductor device including: a substrate; a semiconductor system having an active layer formed on the substrate; and an electrode structure formed on the semiconductor system, wherein the electrode structure includes: a first conductivity type bonding pad; a second conductivity type bonding pad; a first conductivity type extension electrode; and a second conductivity type extension electrode, wherein the first conductivity type extension electrode and the second conductivity type extension electrode form a three-dimensional crossover; wherein the first conductivity type extension electrode and the second conductivity type extension electrode are on the opposite sides of the active layer. | 2012-02-09 |
20120032199 | Element Substrate and Light-Emitting Device - A potential of a gate of a driving transistor is fixed, and the driving transistor is operated in a saturation region, so that a current is supplied thereto anytime. A current control transistor operating in a linear region is disposed serially with the driving transistor, and a video signal for transmitting a signal of emission or non-emission of the pixel is input to a gate of the current control transistor via a switching transistor. | 2012-02-09 |
20120032200 | METHOD FOR COATING LIGHT-EMITTING DEVICES, LIGHT COUPLER, AND METHOD FOR MANUFACTURING THE LIGHT COUPLER - A method of coating a light emitting device is provided. The method includes preparing a plurality of light emitting devices. The plurality of light emitting devices are coated with a first photocurable liquid. First light is selectively exposed to the first photocurable liquid to form a first coating layer on at least a partial region of a surface of each of the plurality of light emitting devices. The plurality of light emitting devices on which the first coating layer is formed are coated with a second photocurable liquid. Second light is selectively exposed to the second photocurable liquid to form a second coating layer on at least a partial region of the surface of each of the plurality of light emitting devices or a surface of the first coating layer. The first coating layer corresponds to the cured first photocurable liquid, while the second coating layer corresponds to the cured second photocurable liquid. | 2012-02-09 |
20120032201 | LIGHT-EMITTING DISPLAY APPARATUS - To provide a light-emitting display apparatus having a curved display face which can be manufactured with ease and high yield. The light-emitting display apparatus includes a curved and light-transmitting substrate | 2012-02-09 |
20120032202 | PLANAR LIGHT SOURCE DEVICE AND DISPLAY DEVICE PROVIDED WITH THE PLANAR LIGHT SOURCE DEVICE - A planar light source device is provided which satisfies the inequality α | 2012-02-09 |
20120032203 | LED UNIT - The LED unit | 2012-02-09 |
20120032204 | METHOD OF MANUFACTURING OLED-ON-SILICON - A method of manufacturing an Organic Light Emitting Diode (OLED). A substrate ( | 2012-02-09 |
20120032205 | MICRODISPLAY PACKAGING SYSTEM - Some embodiments provide a microdisplay integrated circuit (IC), a substantially transparent protective cover coupled to the microdisplay IC, and a base coupled to the microdisplay IC. Thermal expansion characteristics of the base may be substantially similar to thermal expansion characteristics of the protective cover. According to some embodiments, at least one set of imaging elements is fabricated on an upper surface of a semiconductor substrate, and a base is affixed to a lower surface of the semiconductor substrate to generate substantially negligible mechanical stress between the semiconductor substrate and the base. | 2012-02-09 |
20120032206 | VARIABLE HEIGHT LIGHT EMITTING DIODE AND METHOD OF MANUFACTURE - In general, embodiments of the present invention provide a variable height LED and method of manufacture. Specifically, under embodiments of the present invention, a buffer layer is applied (e.g., selectively) over a wafer, and a set of LED chips is provided over the buffer layer. One role of the buffer layer is to increase a height of at least a subset of the chips. As such, the buffer layer could be applied using any processing method now known or later developed. For example, the buffer layer could be selectively deposited, etched, etc. Regardless, in a typical embodiment, the buffer layer comprises a mesa structure having a thickness less than approximately 100 μm. In addition, the mesa structure is typically constructed from three RGB wafers. | 2012-02-09 |
20120032207 | ORGANIC LIGHT-EMITTING DISPLAY PANEL, DISPLAY DEVICE, AND METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING DISPLAY PANEL - An organic light-emitting display panel is provided that improves luminous efficiency and luminescent color by adjusting the difference in film thickness between layers of different luminescent colors, such as intermediate layers, when the intermediate layer and light-emitting layers are formed by a wet method. By varying the film thickness of an interlayer insulation film, which is a lower layer of an organic light-emitting element, the volume of a contact hole is varied by color, thereby adjusting the volume of a concavity in each anode plate. When ink that includes material for the intermediate layer, or like, is sprayed by an inkjet method, the film thickness of the intermediate layer, or like, changes in accordance with the amount of ink filing the concavity. Therefore, by adjusting the difference in volume between concavities of different colors, the difference in film thickness between the intermediate layers, or like, is finely adjusted. | 2012-02-09 |
20120032208 | LIGHT EMISSION DEVICE - A light emission device includes multiple electrically activated solid state emitters (e.g., LEDs) having differing spectral output from one another; and/or phosphor material including one or more phosphors arranged to receive spectral output from at least one of the solid state emitters and to responsively emit a phosphor output, to provide spectral output. In one arrangement, multiple LEDs and multiple phosphors have different peak wavelengths and provide aggregated light output with less than four light emission peaks. In one arrangement, a plot of aggregated output emissions (light intensity versus wavelength) has a non-negative slope between more than two wavelength peaks. In one arrangement, a light emission device generates a user-perceptible transition in color of light at a predetermined time period as an indicative of a need to perform at least one selected task. | 2012-02-09 |
20120032209 | SEMICONDUCTOR LIGHT EMITTING DEVICE - According to one embodiment, a semiconductor light emitting device includes: semiconductor layers; a multilayered structural body; and a light emitting portion. The multilayered structural body is provided between the semiconductor layers, and includes a first layer and a second layer including In. The light emitting portion is in contact with the multilayered structural body between the multilayered structural body and p-type semiconductor layer, and includes barrier layers and a well layer including In with an In composition ratio among group III elements higher than an In composition ratio among group III elements in the second layer. An average lattice constant of the multilayered structural body is larger than that of the n-type semiconductor layer. Difference between the average lattice constant of the multilayered structural body and that of the light emitting portion is less than difference between that of the multilayered structural body and that of the n-type semiconductor layer. | 2012-02-09 |
20120032210 | Semiconductor Device with Efficient Carrier Recombination - The present invention introduces the novel, improved design approach of the semiconductor devices that utilize the effect of carrier recombination, for example, to produce the electromagnetic radiation. The approach is based on the separate control over the injection of the electrons and holes into the active region of the device. As a result, better recombination efficiencies can be achieved, and the effect of the wavelength shift of the produced radiation can be eliminated. The devices according to the present invention outperform existing solid state light and electromagnetic radiation sources and can be used in any applications where solid state light sources are currently involved, as well as any applications future discovered. | 2012-02-09 |
20120032211 | Optoelectronic Component - An optoelectronic component comprises an organic layer sequence ( | 2012-02-09 |
20120032212 | METHOD OF LIGHT EMITTING DIODE SIDEWALL PASSIVATION - A Light-Emitting Diode (LED) includes a light-emitting structure having a passivation layer disposed on vertical sidewalls across a first doped layer, an active layer, and a second doped layer that completely covers at least the sidewalls of the active layer. The passivation layer is formed by plasma bombardment or ion implantation of the light-emitting structure. It protects the sidewalls during subsequent processing steps and prevents current leakage around the active layer. | 2012-02-09 |
20120032213 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer. | 2012-02-09 |
20120032214 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a light emitting portion, a first transparent conductive layer, and a second transparent conductive layer. The light emitting portion is provided between the first and second semiconductor layers. The second semiconductor layer is disposed between the first transparent conductive layer and the light emitting portion. The first transparent conductive layer includes oxygen. The second transparent conductive layer is provided between the second semiconductor layer and the first transparent conductive layer. The second transparent conductive layer has a refractive index higher than a refractive index of the first transparent conductive layer, and includes oxygen at a concentration higher than a concentration of oxygen included in the first transparent conductive layer. | 2012-02-09 |
20120032215 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device of one embodiment includes: a substrate; an n-type layer of an n-type nitride semiconductor on the substrate; an active layer of a nitride semiconductor on the n-type semiconductor layer; a p-type layer of a p-type nitride semiconductor on the active layer. The p-type layer has a ridge stripe shape. The device has an end-face layer of a nitride semiconductor formed on an end face of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer. The end face is perpendicular to an extension direction of the ridge stripe shape. The end-face layer has band gap wider than the active layer. The end-face layer has Mg concentration in the range of 5E16 atoms/cm | 2012-02-09 |
20120032216 | Light Emitting Diode Package Structure - Embodiments of a light emitting diode (LED) package structure are provided. In one aspect, an LED package structure includes a base, at least one LED chip, a blocking plate, and a transparent cover plate. The LED chip is disposed on and electrically coupled to the base. The blocking plate is disposed on the base and surrounds the LED chip. The blocking plate has an opening for exposing the LED chip. The blocking plate comprises a light-absorbing material that is opaque. The transparent cover plate is disposed on the blocking plate and covers the opening of the blocking plate. | 2012-02-09 |
20120032217 | WHITE LED DEVICE AND MANUFACTURING METHOD THEREOF - The invention provides a white light emitting diode device, which includes: a conductive substrate; a multilayered light emitting semiconductor epitaxial structure formed on the conductive substrate; a contact provided on the multilayered light emitting semiconductor epitaxial structure; a transparent layer provided on the multilayered light emitting semiconductor epitaxial structure; a wavelength converting layer provided on the transparent layer; and an optical layer provided on the wavelength converting layer. The invention also provides a method of manufacturing the white light emitting diode device. | 2012-02-09 |
20120032218 | SEMICONDUCTOR LIGHT EMITTING DEVICE - There is provided a semiconductor light emitting device including a conductive substrate, a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked. The contact area between the first electrode layer and the first semiconductor layer is 3% to 13% of the total area of the semiconductor light emitting device, and thus high luminous efficiency is achieved. | 2012-02-09 |
20120032219 | LIGHT-EMITTING DEVICE - A light-emitting device includes a circuit board to which external electric power is supplied, a light emitting diode that is electrically connected onto the circuit board and emits light based on electric power from the circuit board, a housing provided on the circuit board so as to surround the light emitting diode and so that the upper end portion of the housing is positioned above the upper end portion of the light emitting diode, and a fluorescent laminate provided on the housing. The fluorescent laminate includes a first fluorescent layer that emits fluorescent light and a second fluorescent layer that emits fluorescent light having a wavelength that is longer than that of the first fluorescent layer. The second fluorescent layer is disposed on the housing and the first fluorescent layer is laminated on the second fluorescent layer. | 2012-02-09 |
20120032220 | PACKAGED LIGHT EMITTING DIODES INCLUDING PHOSPHOR COATING AND PHOSPHOR COATING SYSTEMS - Light emitting structures are disclosed that can include a semiconductor light emitting diode (LED) that includes a p-n junction active layer. A first layer can include a binder material having a thickness that is less than about 1000 μm, wherein the first layer is directly on the LED. A second layer can include phosphor particles, where the second layer can have a thickness that is less than about 1000 μm and can be directly on the first layer so that the first layer is between the LED and the second layer. | 2012-02-09 |
20120032221 | ORGANIC LIGHT EMITTING DIODE AND METHOD FOR PRODUCING AN ORGANIC LIGHT EMITTING DIODE - An organic light-emitting diode includes an organic light-emitting layer located between a transparent electrode and one other electrode on a substrate. In some embodiments at least one of the transparent electrode and the other electrode has two layers. The two layers include a structured layer, which is a charge carrier injection layer, and a conductive second layer into which the first layer is embedded. In some embodiments the organic light-emitting layer includes a structured charge carrier blocking layer. | 2012-02-09 |
20120032222 | LIGHT-EMITTING DEVICE AND METHOD FOR PRODUCING LIGHT EMITTING DEVICE - A method for producing a light-emitting device, includes: performing, on a first substrate made of III-V group compound semiconductor, crystal growth of a laminated body including an etching easy layer contiguous to the first substrate and a light-emitting layer made of nitride semiconductor; bonding a second substrate and the laminated body; and detaching the second substrate provided with the light-emitting layer from the first substrate by, one of removing the etching easy layer by using a solution etching method, and removing the first substrate and the etching easy layer by using mechanical polishing method. | 2012-02-09 |
20120032223 | ULTRAVIOLET LIGHT EMITTING DIODE PACKAGE - An ultraviolet light emitting diode package for emitting ultraviolet light is disclosed. The ultraviolet light emitting diode package comprises an LED chip emitting light with a peak wavelength of 350 nm or less, and a protective member provided so that surroundings of the LED chip is covered to protect the LED chip, the protective member having a non-yellowing property to energy from the LED chip. | 2012-02-09 |
20120032224 | ELECTRICAL CONNECTION STRUCTURE AND LIGHT EMITTING DIODE MODULE, FABRIC CIRCUITS, AND SIGNAL TEXTILE HAVING THE SAME - An electrical connection structure for use in an electronic component, a light emitting diode (LED) module, a fabric circuit and a signal textile with the same are provided. The electrical connection structure comprises a plurality of J-type leads which electrically connect to the electronic component and encircle two conductive lines. Thus, the electronic component can be firmly attached and electrically connected to the two conductive lines. | 2012-02-09 |
20120032225 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR PRODUCING THE SAME - The object of the invention is to improve the visual inspection yield of a semiconductor light emitting device. To achieve the object, a semiconductor light emitting device includes a semiconductor layer, a pad electrode on the layer, and a protection film covering at least the layer. The device includes at least one stopper arranged on a peripheral part of the pad electrode surface away from the film. The stopper has a semicircular arc shape opening toward the center of the pad electrode. In electrical/optical property inspection, if sliding on the pad electrode, a probe needle can be guided into the concave surface of the semicircular arc shape. The stopper can reliably hold the needle. It is avoidable that the needle contacts the film. It is preferable that each of positive/negative electrodes have the pad electrode, and a pair of stoppers be arranged in positions on the electrodes facing each other. | 2012-02-09 |
20120032226 | Light Emitting Diode Submount with High Thermal Conductivity for High Power Operation - This invention relates to the thermal management, extraction of light, and cost effectiveness of Light Emitting Diode, or LED, electrical circuits. An integrated circuit LED submount is described, for the packaging of high power LEDs. The LED submount provides high thermal conductivity while preserving electrical insulation. In particular, a process is described for anodizing a high thermal conductivity aluminum alloy sheet to form a porous aluminum oxide layer and a non-porous aluminum oxide layer. This anodized aluminum alloy sheet acts as a superior electrical insulator, and also provides surface morphology and mechanical properties that are useful for the fabrication of high-density and high-power multilevel electrical circuits. | 2012-02-09 |
20120032227 | LOW VOLTAGE TUNNEL FIELD-EFFECT TRANSISTOR (TFET) AND METHOD OF MAKING SAME - A low voltage tunnel field effect transistor includes a p-n tunnel junction, a gate-dielectric, a gate, a source-contact, and a drain-contact. The p-n tunnel junction includes a depletion region interfacing together a source-layer and a drain-layer. The depletion region includes a source-tunneling-region of the source-layer and a drain-tunneling-region of the drain-layer. When no external electric field is imposed, the depletion region of the p-n tunnel junction has an internal electric field that substantially points towards the source-tunneling-region and the drain-tunneling-region. The gate-dielectric is interfaced directly onto the drain-tunneling-region such that the drain-tunneling-region is between the source-tunneling-region and the gate-dielectric. The gate is interfaced onto the gate-dielectric such that the gate is configured to impose an external electric field which is oriented substantially in parallel to the internal electric field of the depletion region. | 2012-02-09 |
20120032228 | SEMICONDUCTOR DEVICE - A first first-conductivity-type diffusion layer, a first second-conductivity-type diffusion layer, a second first-conductivity-type diffusion layer, and a second second-conductivity-type diffusion layer are arranged in this order. In a region where the second second-conductivity-type diffusion layer and the first-conductivity-type layer are in contact with each other, impurity concentrations thereof are higher in a part in contact with a side face of the second second-conductivity-type diffusion layer than in a part at a bottom surface of the second second-conductivity-type diffusion layer. | 2012-02-09 |
20120032229 | Silicon Wafer And Production Method Thereof - A silicon wafer contains: a silicon substrate; a first epitaxial layer on the silicon wafer, wherein the absolute value of the difference between donor and acceptor concentrations is ≧1×10 | 2012-02-09 |
20120032230 | METHOD OF FORMING STRAINED SEMICONDUCTOR CHANNEL AND SEMICONDUCTOR DEVICE - The present invention provides a method of forming a strained semiconductor channel, comprising: forming a relaxed SiGe layer on a semiconductor substrate; forming a dielectric layer on the relaxed SiGe layer and forming a sacrificial gate on the dielectric layer, wherein the dielectric layer and the sacrificial gate form a sacrificial gate structure; depositing an interlayer dielectric layer, which is planarized to expose the sacrificial gate; etching to remove the sacrificial gate and the dielectric layer to form an opening; forming a semiconductor epitaxial layer by selective semiconductor epitaxial growth in the opening; depositing a high-K dielectric layer and a metal layer; and removing the high-K dielectric layer and metal layer covering the interlayer dielectric layer by planarizing the deposited metal layer and high-K dielectric layer to form a metal gate. The present invention also provides a semiconductor device manufactured by this process. | 2012-02-09 |
20120032231 | MOS TRANSISTOR STRUCTURE WITH IN-SITU DOPED SOURCE AND DRAIN AND METHOD FOR FORMING THE SAME - A MOS transistor structure with an in-situ doped source and/or drain and a method for forming the same are provided. The method comprises steps of: providing a substrate; forming a high Ge content layer on the substrate; forming a gate stack on the high Ge content layer and forming a side wall of one or more layers on both sides of the gate stack; etching the high Ge content layer to form a source region and/or a drain region; and forming a source and/or a drain in the source region and/or the drain region respectively by a low-temperature selective epitaxy, and introducing a doping gas during the low-temperature selective epitaxy to heavily dope the source and/or the drain and to in-situ activate a doping element. | 2012-02-09 |
20120032232 | SEMICONDUCTOR DEVICE - A semiconductor device protects against concentration of electric current at a front end portion of one of the electrodes thereof The semiconductor device includes a substrate, a compound semiconductor layer formed on the substrate and having a channel layer based on a hetero junction, a first main electrode formed on the compound semiconductor layer, a second main electrode formed on the compound semiconductor surrounding the first main electrode and having a linear region and an arc-shaped region, a control electrode formed on the compound semiconductor layer and disposed opposite to the first main electrode and the second main electrode, an electric current being made to flow between the first main electrode and the second main electrode, and an electric current limiting section formed between the first main electrode and the arc-shaped region of the second main electrode. | 2012-02-09 |
20120032233 | SILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR AND MANUFACTURING METHOD OF THE SAME - A Silicon-Germanium heterojunction bipolar transistor (SiGe HBT) formed on a silicon substrate, wherein, an active region is isolated by field oxide regions, a collector region is formed in the active region and extends into the bottom of the field oxide regions; pseudo buried layers are formed at the bottom of the field oxide regions. Each of the pseudo buried layers is a lateral distance away from the active region and contacts with a part of the collector region. Deep-hole contacts are formed in the field oxide regions located on top of the pseudo buried layers to pick up the collector region. The present invention can adjust the breakdown voltage of devices through adjusting the lateral distance. A method for manufacturing the SiGe HBT is also disclosed. | 2012-02-09 |
20120032234 | Antiphase Domain Boundary-Free III-V Compound Semiconductor Material on Semiconductor Substrate and Method for Manufacturing Thereof - Methods of manufacturing a III-V compound semiconductor material, and the semiconductor material thus manufactured, are disclosed. In one embodiment, the method comprises providing a substrate comprising a first semiconductor material having a {001} orientation and an insulating layer overlaying the first semiconductor material. The insulating layer comprises a recessed region exposing an exposed region of the first semiconductor material. The method further comprises forming a buffer layer overlaying the exposed region that comprises a group IV semiconductor material. The method further comprises thermally annealing the substrate and the buffer layer, thereby roughening the buffer layer to create a rounded, double-stepped surface having a step density and a step height. A product of the step density and the step height is greater than or equal to 0.05 on the surface. The method further comprises at least partially filling the recessed region with a III-V compound semiconductor material overlaying the surface. | 2012-02-09 |
20120032235 | Backside Stimulated Sensor with Background Current Manipulation - A CMOS (Complementary Metal Oxide Semiconductor) pixel for sensing at least one selected from a biological, chemical, ionic, electrical, mechanical and magnetic stimulus. The CMOS pixel includes a substrate including a backside, a source coupled with the substrate to generate a background current, and a detection element electrically coupled to measure the background current. The stimulus, which is to be provided to the backside, affects a measurable change in the background current. | 2012-02-09 |
20120032236 | SEMICONDUCTOR DEVICE - An object is to realize high performance and low power consumption in a semiconductor device having an SOI structure. In addition, another object is to provide a semiconductor device having a high performance semiconductor element which is more highly integrated. A semiconductor device is such that a plurality of n-channel field-effect transistors and p-channel field-effect transistors are stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. By controlling a distortion caused to a semiconductor layer due to an insulating film having a stress, a plane orientation of the semiconductor layer, and a crystal axis in a channel length direction, difference in mobility between the n-channel field-effect transistor and the p-channel field-effect transistor can be reduced, whereby current driving capabilities and response speeds of the n-channel field-effect transistor and the p-channel field-effect can be comparable. | 2012-02-09 |
20120032237 | SEMICONDUCTOR DEVICE STRUCTURES AND METHODS OF FORMING SEMICONDUCTOR STRUCTURES - A method of patterning a semiconductor film is described. According to an embodiment of the present invention, a hard mask material is formed on a silicon film having a global crystal orientation wherein the semiconductor film has a first crystal plane and second crystal plane, wherein the first crystal plane is denser than the second crystal plane and wherein the hard mask is formed on the second crystal plane. Next, the hard mask and semiconductor film are patterned into a hard mask covered semiconductor structure. The hard mask covered semiconductor structured is then exposed to a wet etch process which has sufficient chemical strength to etch the second crystal plane but insufficient chemical strength to etch the first crystal plane. | 2012-02-09 |
20120032238 | CONTACT ETCH STOP LAYERS OF A FIELD EFFECT TRANSISTOR - An exemplary structure for a field effect transistor according to at least one embodiment comprises a substrate comprising a surface; a gate structure comprising sidewalls and a top surface over the substrate; a spacer adjacent to the sidewalls of the gate structure; a first contact etch stop layer over the spacer and extending along the surface of the substrate; an interlayer dielectric layer adjacent to the first contact etch stop layer, wherein a top surface of the interlayer dielectric layer is coplanar with the top surface of the gate structure; and a second contact etch stop layer over the top surface of the gate structure. | 2012-02-09 |
20120032239 | METHOD FOR INTRODUCING CHANNEL STRESS AND FIELD EFFECT TRANSISTOR FABRICATED BY THE SAME - The present invention relates to CMOS ultra large scale integrated circuits, and provides a method for introducing channel stress and a field effect transistor fabricated by the same. According to the present invention, a strained dielectric layer is interposed between source/drain regions and a substrate of a field effect transistor, and a strain is induced in a channel by the strained dielectric layer which directly contacts the substrate, so as to improve a carrier mobility of the channel and a performance of the device. The specific effects of the invention include: a tensile strain may be induced in the channel by using the strained dielectric layer having a tensile strain in order to increase an electron mobility of the channel; a compressive strain may be induced in the channel by using the strained dielectric layer having a compressive strain in order to increase a hole mobility of the channel. According to the invention, not only an effectiveness of the introduction of channel stress is ensued, but the device structure of the field effect transistor is also improved fundamentally, so that a capability for suppressing a short channel effect of the device is increased. | 2012-02-09 |
20120032240 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes a field effect transistor including: a semiconductor substrate including a channel forming region; a gate insulating film formed at the channel forming region on the semiconductor substrate; a gate electrode formed over the gate insulating film; a first stress application layer formed over the gate electrode and applying stress to the channel forming region; a source/drain region formed on a surface layer portion of the semiconductor substrate at both sides of the gate electrode and the first stress application layer; and a second stress application layer formed over the source/drain region in a region other than at least a region of the first stress application layer and applying stress different from the first stress application layer to the channel forming region. | 2012-02-09 |
20120032241 | IMAGE SENSOR - An image sensor includes: a substrate, at least a pixel, and at least a light shield is provided. Wherein the pixel includes a photodiode and at least a transistor, and the transistor is connected to a metal line via a contact. The light shield is positioned around at least one side of the pixel, wherein the light shield is made while forming the contact. | 2012-02-09 |
20120032242 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes: a diffusion layer configuring a memory cell, and a diffusion layer configuring a dummy cell formed over the semiconductor substrate, interlayer insulating films formed over the semiconductor substrate, a cylinder layer insulating film including at least one concavity overlapping a diffusion layer and formed over an interlayer insulating film, a contact plug formed over one diffusion layer, a contact plug formed over another diffusion layer, a lower electrode formed over the side surfaces and bottom surface of the concavity and coupled to the diffusion layer by way of the contact plug, a dielectric material film formed over the lower electrode, over the cylinder layer insulating film and over the contact plug, and coupling by way of the contact plug to the diffusion layer, and an upper electrode formed over the inductive film material. | 2012-02-09 |
20120032243 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes at least one semiconductor region provided in a semiconductor substrate, and a capacitor group including a plurality of capacitors provided in the semiconductor region, each capacitor including a capacitor insulating film provided on the semiconductor region, a capacitor electrode provided on the capacitor insulating film, and at least one diffusion layer provided in the semiconductor region adjacent to the capacitor electrode. | 2012-02-09 |
20120032244 | Compact Semiconductor Package with Integrated Bypass Capacitor - A top-side cooled compact semiconductor package with integrated bypass capacitor is disclosed. The top-side cooled compact semiconductor package includes a circuit substrate with terminal leads, numerous semiconductor dies bonded atop the circuit substrate, numerous elevation-adaptive interconnection plates for bonding and interconnecting top contact areas of the semiconductor dies with the circuit substrate, a first member of the elevation-adaptive interconnection plates has a first flat-top area and a second member of the elevation-adaptive interconnection plates has a second flat-top area in level with the first flat-top area, a bypass capacitor, having two capacitor terminals located at its ends, stacked atop the two interconnection plate members while being bonded thereto via the first flat-top area and the second flat-top area for a reduced interconnection parasitic impedance. | 2012-02-09 |
20120032245 | Vertical Structure Non-Volatile Memory Device - A vertical structure non-volatile memory device includes semiconductor regions that vertically extend on a substrate, a plurality of memory cell strings that vertically extend on the substrate along sidewalls of the semiconductor regions and include a plurality of memory cells and at least one or more first selection transistors, which are disposed on sides of the memory cells and are adjacent to one another. A plurality of wordlines is connected to the memory cells of the memory cell strings. A first selection line is connected to the selection transistors of the memory cell strings and insulating regions are formed as air gaps between the first selection transistors of the adjacent memory cell strings. | 2012-02-09 |
20120032246 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile semiconductor memory device according to an embodiment includes a semiconductor substrate, a memory cell transistor formed in a memory cell region, and a field-effect transistor formed in a peripheral circuit region. The memory cell transistor includes: a floating gate electrode; a first inter-electrode insulating film; and a control gate electrode. The field-effect transistor includes: a lower gate electrode; a second inter-electrode insulating film having an opening; and an upper gate electrode electrically connected to the lower gate electrode via the opening. The control gate electrode and the upper gate electrode are formed by a plurality of conductive films that are stacked. The control gate electrode and the upper gate electrode include a barrier film formed in one of interfaces between the stacked conductive films and configured to suppress diffusion of metal atoms. The control gate electrode and the upper gate electrode have a part that is silicided. | 2012-02-09 |
20120032247 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell transistor obtained by sequentially stacking the gate insulation film, the floating gate electrode, the interelectrode insulation film, and the control gate electrode over the channel semiconductor layer. The control gate electrode has a structure obtained by sequentially stacking the semiconductor film, the silicide phase-change suppressing layer, and the silicide film. In addition, the silicide phase-change suppressing layer includes a polycrystalline silicon film in which at least one of C, F, and N is doped in a concentration range of 1×10 | 2012-02-09 |
20120032248 | NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, NONVOLATILE SEMICONDUCTOR MEMORY, AND METHOD FOR OPERATING NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT - According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film. | 2012-02-09 |
20120032249 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes a multilayer body, a semiconductor pillar, a memory layer, a first insulating film and a second insulating film. The multilayer body includes a plurality of interelectrode insulating films and a plurality of electrode films alternately stacked in a first direction. The semiconductor pillar penetrates through the multilayer body in the first direction. The memory layer is provided between each of the electrode films and the semiconductor pillar and extends in the first direction. The first insulating film is provided between the memory layer and the semiconductor pillar and extends in the first direction. The second insulating film is provided between each of the electrode films and the memory layer and extends in the first direction. The second insulating film is projected between the electrode films. | 2012-02-09 |
20120032250 | SEMICONDUCTOR DEVICES - A semiconductor device can include a first substrate and conductive patterns on the first substrate, where the conductive patterns are disposed in stacks vertically extending from the substrate. An active pillar can be on the first substrate vertically extend from the first substrate through the conductive patterns to provide vertical string transistors on the first substrate. A second substrate can be on the conductive patterns and the active pillar opposite the first substrate. A peripheral circuit transistor can be on the second substrate opposite the first substrate, where the peripheral circuit transistor can be adjacent to and overlap an uppermost pattern of the conductive patterns. | 2012-02-09 |
20120032251 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - First and second memory cells have first and second channels, first and second tunnel insulating films, first and second charge storage layers formed of an insulating film, first and second block insulating films, and first and second gate electrodes. A first select transistor has a third channel, a first gate insulating film, and a first gate electrode. The first channel includes a first-conductivity-type region and a second-conductivity-type region which is formed on at least a part of the first-conductivity-type region and whose conductivity type is opposite to the first conductivity type. The third channel includes the first-conductivity-type region and the second-conductivity-type region formed on the first-conductivity-type region. The number of data stored in the first memory cell is smaller than that of data stored in the second memory cell. | 2012-02-09 |
20120032252 | THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL - Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area. | 2012-02-09 |
20120032253 | NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME - A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer. | 2012-02-09 |