03rd week of 2016 patent applcation highlights part 50 |
Patent application number | Title | Published |
20160019872 | Flute Support - An apparatus comprises a flute, a base, and a thumb rest. The base is attached to the flute and defines a channel. The thumb rest is inserted into the channel and defines an elongate body. The thumb rest is positioned such that a flutist may rest a right thumb against the thumb rest while using conventional fingering to play the flute. | 2016-01-21 |
20160019873 | ELECTRONIC PAD - The present invention provides an electronic pad, including: a struck body, including a first struck portion and a second struck portion; a first and a second vibration sensor, detecting a vibration of the first struck portion and the second struck portion. In the electronic pad, a partitioning portion is interposed between the first struck portion and the second struck portion for partitioning. The partitioning portion includes: a first upright portion, protruding further than at least one of an upper surface of the first struck portion and a lower surface opposite the upper surface; a second upright portion, separated from the first upright portion by a predetermined spacing and protruding further than at least one of an upper surface of the second struck portion and a lower surface opposite the upper surface; and a connection portion connected between the first upright portion and the second upright portion. | 2016-01-21 |
20160019874 | INPUT/OUTPUT CONTROLS - Embodiments generally relate to processing music. In one embodiment, a system includes a base and one or more structures coupled to the base, where the one or more structures form one or more respective bays in the base. The system also includes one or more input/output (I/O) modules configured to be removably received into the one or more bays, where the one or more I/O modules are operable to provide control information. | 2016-01-21 |
20160019875 | MUSICAL SOUND CONTROL APPARATUS, ELECTRIC MUSICAL INSTRUMENT, MUSICAL SOUND CONTROL METHOD, AND PROGRAM STORAGE MEDIUM - A musical sound control apparatus includes: an operator which as an index portion and changes values of a plurality of kinds of parameters by moving a position of the index portion; and a parameter control unit which executes processing of changing the values of the plurality of kinds of parameters according to an operated position as a position at which the index portion was moved from a standard position by an operation and processing of, when changing an assignment to the operator from a first parameter among the plurality of kinds of parameters to a second parameter among the plurality of kinds of parameters in a state in which the index portion is positioned at a position other than the standard position, setting a value of the second parameter assigned to a value which does not correspond to the position of the index portion. | 2016-01-21 |
20160019876 | MACHINE-CONTROL OF A DEVICE BASED ON MACHINE-DETECTED TRANSITIONS - Apparatus, methods, and systems that operate to perform machine-control of a device based on machine-detected transitions are disclosed. | 2016-01-21 |
20160019877 | SYSTEM FOR NETWORKING AUDIO EFFECTS PROCESSORS, ENABLING BIDIRECTIONAL COMMUNICATION AND STORAGE/RECALL OF DATA - Systems and methods of networking and managing audio effects processors for musical instruments and vocal microphones, in which multiple sets of parameter settings involved in audio effects processing can be stored as well as modified within a central management hub. In response to one or more simple user inputs, the respective sets of parameter settings can be recalled or otherwise accessed from the central management hub and applied to selected ones of the audio effects processors, thereby allowing both musicians and vocalists to create a multitude of characteristic sounds with their musical instruments and vocal microphones, respectively, with increased convenience and ease-of-use. | 2016-01-21 |
20160019878 | AUDIO SIGNAL PROCESSING METHODS AND SYSTEMS - Described are methods and systems of identifying one or more fundamental frequency component(s) of an audio signal. The methods and systems may include any one or more of an audio event receiving step, a signal discretization step, a masking step, and/or a transcription step. | 2016-01-21 |
20160019879 | METAMATERIAL - A metamaterial ( | 2016-01-21 |
20160019880 | APPARATUS AND METHOD FOR CANCELLING, REDUCING AND MODULATING NOISE SIGNAL AND FOR SIGNAL ENHANCING AND SIGNAL PROOFING - The embodiments herein provide an apparatus and method for cancelling signal noise. According to one embodiment, an apparatus for cancelling signal noise has a sensor or receiver to capture the undesirable signals. A transducer converts the energy of the captured signals and modulates the captured undesirable signals. A signal inverting circuit is connected to the transducer to generate the inverse of the captured undesirable signals by inverting the amplitude of the undesirable signal while maintain the frequency at the same level. The generated inverse of the undesirable signal transmitted by a transmitter is received by a receiver and output through a speaker so that the output inverse of the undesirable signal is combined with the undesirable signal to produce a desired signal environment. | 2016-01-21 |
20160019881 | BEAMFORMING APPARATUS, BEAMFORMING METHOD, AND ULTRASONIC IMAGING APPARATUS - A beamforming apparatus includes: a signal output unit configured to output signals; a time difference corrector configured to correct a time difference between the signals; and a weight applier configured to apply a weight value to the signals, according to an error between the signals with the corrected time difference and a target delay pattern. | 2016-01-21 |
20160019882 | SYSTEMS AND METHODS FOR SPEECH ANALYTICS AND PHRASE SPOTTING USING PHONEME SEQUENCES - A contact center system can receive audio messages. The system can review audio messages by identifying phoneme strings within the audio messages associated with a characteristic. A phoneme can be a component of spoken language. Identified phoneme strings are used to analyze subsequent audio messages to determine the presence of the characteristic without requiring human analysis. Thus, the identification of phoneme strings then can be used to determine a characteristic of audio messages without transcribing the messages. | 2016-01-21 |
20160019883 | DATASET SHIFT COMPENSATION IN MACHINE LEARNING - A method for inter-dataset variability compensation, the method comprising using at least one hardware processor for: receiving a heterogeneous development dataset comprising multiple samples and metadata associated with at least some of the multiple samples; dividing the multiple samples into multiple homogenous subsets, based on the metadata; averaging high-level features of each of the multiple homogenous subsets, to produce multiple central high-level features for the multiple homogenous subsets, respectively; computing an inter-dataset variability subspace spanned by the multiple central high-level features; removing the inter-dataset variability subspace from the high-level features of the multiple homogenous subsets, to produce denoised samples; and training a machine learning system using the denoised speech samples. | 2016-01-21 |
20160019884 | METHODS AND APPARATUS FOR TRAINING A TRANSFORMATION COMPONENT - According to some aspects, a method of training a transformation component using a trained acoustic model comprising first parameters having respective first values established during training of the acoustic model using first training data is provided. The method comprises using at least one computer processor to perform coupling the transformation component to a portion of the acoustic model, the transformation component comprising second parameters, and training the transformation component by determining, for the second parameters, respective second values using second training data input to the transformation component and processed by the acoustic model, wherein the acoustic model retains the first parameters having the respective first values throughout training of the transformation component. | 2016-01-21 |
20160019885 | WORD CLOUD DISPLAY - Machine learning-based methods to improve the knowledge extraction process in a specific domain or business environment, and then provides that extracted knowledge in a word cloud user interface display capable of summarizing and conveying a vast amount of information to a user very quickly. Based on the self-training mechanism developed by the inventors, the ontology programming automatically trains itself to understand the domain or environment of the communication data by processing and analyzing a defined corpus of communication data. The developed ontology can be applied to process a dataset of communication information to create a word cloud that can provide a quick view into the content of the dataset, including information about the language used by participants in the communications, such as identifying for a user key phrases and terms, the frequency of those phrases, the originator of the terms of phrases, and the confidence levels of such identifications. | 2016-01-21 |
20160019886 | METHOD AND APPARATUS FOR RECOGNIZING WHISPER - A method and an apparatus of recognizing whisper are provided. The method of recognizing a whisper may include recognizing a whispering action performed by a user through a first sensor, recognizing a loudness change through a second sensor, and activating a whisper recognition mode based on the whispering action and the loudness change. | 2016-01-21 |
20160019887 | METHOD AND DEVICE FOR CONTEXT-BASED VOICE RECOGNITION - A method and a device of voice recognition are provided. The method involves receiving a voice signal, identifying a first voice recognition model in which context information associated with a situation at reception of the voice signal is not reflected and a second voice recognition model in which the context information is reflected, determining a weighted value of the first voice recognition model and a weighted value of the second voice recognition model, and recognizing a word in the voice signal by applying the determined weighted values to the first voice recognition model and the second voice recognition model. | 2016-01-21 |
20160019888 | ORDER ENTRY SYSTEM AND ORDER ENTRY METHOD - There is provided an order entry system including: a first microphone that picks up speech regarding order details of a first speaker; a second microphone that picks up speech regarding the order details of a second speaker for checking the order details of the first speaker; a speech recognizer that recognizes the speech regarding the order details of the first speaker which is picked up by the first microphone and the speech regarding the order details of the second speaker which is picked up by the second microphone; and an order data output that displays on a display, a display screen of order data regarding the order details of the first speaker, including a first speech recognition result of the speech regarding the order details of the first speaker and a second speech recognition result of the speech regarding the order details of the second speaker. | 2016-01-21 |
20160019889 | SPEAKER VERIFICATION USING CO-LOCATION INFORMATION - Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying a user in a multi-user environment. One of the methods includes receiving, by a first user device, an audio signal encoding an utterance, obtaining, by the first user device, a first speaker model for a first user of the first user device, obtaining, by the first user device for a second user of a second user device that is co-located with the first user device, a second speaker model for the second user or a second score that indicates a respective likelihood that the utterance was spoken by the second user, and determining, by the first user device, that the utterance was spoken by the first user using (i) the first speaker model and the second speaker model or (ii) the first speaker model and the second score. | 2016-01-21 |
20160019890 | Vehicle State-Based Hands-Free Phone Noise Reduction With Learning Capability - This disclosure generally relates to a system, apparatus, and method for achieving a vehicle state-based hands free noise reduction feature. A noise reduction tool is provided for applying a noise reduction strategy on a sound input that uses machine learning to develop future noise reduction strategies, where the noise reduction strategies include analyzing vehicle operational state information and external information that are predicted to contribute to cabin noise and selecting noise reducing pre-filter options based on the analysis. The machine learning may further be supplemented by off-line training to generate a speech quality performance measure for the sound input that may be referenced by the noise reduction tool for further noise reduction strategies. | 2016-01-21 |
20160019891 | AUDIO COMMAND ADAPTIVE PROCESSING SYSTEM AND METHOD - A system and method are provided for adaptively processing audio commands supplied by a user in an aircraft cabin, and includes receiving ambient noise in the aircraft cabin via one or more audio input device, sampling, with a processor, the received ambient noise, and analyzing, in the processor, the sampled ambient noise and, based on the analysis, selecting one or more filter functions and adjusting one or more filter parameters associated with the one or more selected filter functions. Audio and ambient noise are selectively received via the one or more audio input devices, and are filtered, through the selected one or more filter functions, to thereby supply filtered audio. | 2016-01-21 |
20160019892 | PROCEDURE TO AUTOMATE/SIMPLIFY INTERNET SEARCH BASED ON AUDIO CONTENT FROM A VEHICLE RADIO - Audio obtained from a car radio is converted to digital data that is stored in a circular buffer, the size of which enables at least several seconds of audio to be recorded continuously. When a driver or passenger hears something of interest, data in the circular buffer is converted to strings of text. The text obtained from the recorded data is presented on a display device where individual text strings can be selected for transmission to an Internet search engine running on a computer or saved for the future use. The results of the Internet search are presented on the display device. | 2016-01-21 |
20160019893 | METHOD FOR CONTROLLING SPEECH-RECOGNITION TEXT-GENERATION SYSTEM AND METHOD FOR CONTROLLING MOBILE TERMINAL - A method for controlling a speech-recognition text-generation system that captures speech, converts the captured speech into character strings through speech recognition, includes determining whether or not the character strings include a predetermined phrase; specifying, in a case where the predetermined phrase is determined to be included, a character string associated with the predetermined phrase among the character strings as a first character string which is a deletion candidate; and displaying the first character string in a first display form on a display terminal and displaying a second character string, which is a character string other than the first character string, in a second display form on the display terminal. | 2016-01-21 |
20160019894 | VOICE INFORMATION CONTROL METHOD AND TERMINAL DEVICE - A voice information control method for a terminal used in a system including a server device which creates text data on the basis of the voice information received from the terminal device, the method including: acquiring plurality items of first voice information; specifying a time interval that includes second voice information which is one of the plurality items of the first voice information, and which includes spoken voice of a first speaker who uses the first terminal device; and transmitting the second voice information included in the specified time interval being transmitted to the server device. | 2016-01-21 |
20160019895 | TECHNOLOGIES FOR PROVIDING TEXTUAL INFORMATION AND SYSTEMS AND METHODS USING THE SAME - Technologies for providing textual information are described. In some embodiments the technologies include an audio sensor, a loudspeaker, and a voice to text server. The audio sensor may function to detect an audio input and produce a first signal containing auditory information. The auditory information may be conveyed to the loudspeaker and the voice to text server. The voice to text server may function to convert the auditory information to textual information and transmit the textual information to one or more client devices, e.g., in a text message. Systems, methods, and devices including or utilizing such technology are also described. | 2016-01-21 |
20160019896 | SPEAKER VERIFICATION USING CO-LOCATION INFORMATION - Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying a user in a multi-user environment. One of the methods includes receiving, by a first user device, an audio signal encoding an utterance, obtaining, by the first user device, a first speaker model for a first user of the first user device, obtaining, by the first user device for a second user of a second user device that is co-located with the first user device, a second speaker model for the second user or a second score that indicates a respective likelihood that the utterance was spoken by the second user, and determining, by the first user device, that the utterance was spoken by the first user using (i) the first speaker model and the second speaker model or (ii) the first speaker model and the second score. | 2016-01-21 |
20160019897 | SPEAKER RECOGNITION FROM TELEPHONE CALLS - The present invention relates to a method for speaker recognition, comprising the steps of obtaining and storing speaker information for at least one target speaker; obtaining a plurality of speech samples from a plurality of telephone calls from at least one unknown speaker; classifying the speech samples according to at least one unknown speaker thereby providing speaker-dependent classes of speech samples; extracting speaker information for the speech samples of each of the speaker-dependent classes of speech samples; combining the extracted speaker information for each of the speaker-dependent classes of speech samples; comparing the combined extracted speaker information for each of the speaker-dependent classes of speech samples with the stored speaker information for at least one target speaker to obtain at least one comparison result; and determining whether at least one unknown speaker is identical with at least one target speaker based on at least one comparison result. | 2016-01-21 |
20160019898 | TIME DOMAIN LEVEL ADJUSTMENT FOR AUDIO SIGNAL DECODING OR ENCODING - An audio signal decoder for providing a decoded audio signal representation on the basis of an encoded audio signal representation has a decoder preprocessing stage for obtaining a plurality of frequency band signals from the encoded audio signal representation, a clipping estimator, a level shifter, a frequency-to-time-domain converter, and a level shift compensator. The clipping estimator analyzes the encoded audio signal representation and/or side information relative to a gain of the frequency band signals in order to determine a current level shift factor. The level shifter shifts levels of the frequency band signals according to the level shift factor. The frequency-to-time-domain converter converts the level shifted frequency band signals into a time-domain representation. The level shift compensator acts on the time-domain representation for at least partly compensating a corresponding level shift and for obtaining a substantially compensated time-domain representation. | 2016-01-21 |
20160019899 | Audio Processing - An audio processing system ( | 2016-01-21 |
20160019900 | METHOD AND APPARATUS FOR LATTICE VECTOR QUANTIZATION OF AN AUDIO SIGNAL - An apparatus comprising: a vector generator configured to generate a first vector of parameters defining at least one audio signal; a vector extender configured to extend the first vector of parameters to a second vector, where the first vector is length n and the second vector is length n, where m is greater than n; a vector transformer configured to transform the second vector, a lattice quantizer configured to lattice quantize the transformed second vector; and a reverse transformer configured to reverse transform the lattice quantized transformed second vector, such that the first n components of a reverse transformed lattice quantized transformed second vector are a lattice quantization of the first vector. | 2016-01-21 |
20160019901 | AUDIO WATERMARKING FOR PEOPLE MONITORING - Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to utilize audio watermarking for people monitoring are disclosed. Example people monitoring methods disclosed herein include determining, at a user device, whether a first trigger condition for emitting an audio watermark identifying at least one of the user device or a user of the user device is satisfied. Such example methods also include, in response to determining that the first trigger condition is satisfied, providing a first audio signal including the audio watermark to an audio circuit that is to output an acoustic signal from the user device. | 2016-01-21 |
20160019902 | OPTIMIZED PARTIAL MIXING OF AUDIO STREAMS ENCODED BY SUB-BAND ENCODING - The invention relates to a method for combining a plurality of audio streams encoded by frequency sub-band encoding, comprising the following steps: decoding (E | 2016-01-21 |
20160019903 | OPTIMIZED MIXING OF AUDIO STREAMS ENCODED BY SUB-BAND ENCODING - The invention relates to a method for mixing a plurality of audio streams coded according to a frequency sub-band coding, comprising the steps for decoding (E | 2016-01-21 |
20160019904 | Adaptive Vehicle State-Based Hands-Free Phone Noise Reduction With Learning Capability - This disclosure generally relates to a system, apparatus, and method for achieving an adaptive vehicle state-based hands free noise reduction feature. A noise reduction tool is provided for adaptively applying a noise reduction strategy on a sound input that uses feedback speech quality measures and machine learning to develop future noise reduction strategies, where the noise reduction strategies include analyzing vehicle operational state information and external information that are predicted to contribute to cabin noise and selecting noise reducing pre-filter options based on the analysis. | 2016-01-21 |
20160019905 | SPEECH PROCESSING SYSTEM - A speech intelligibility enhancing system for enhancing speech to be outputted in a noisy environment, the system comprising: a speech input for receiving speech to be enhanced; a noise input for receiving real-time information concerning the noisy environment; an enhanced speech output to output said enhanced speech; and a processor configured to convert speech received from said speech input to enhanced speech to be output by said enhanced speech output, the processor being configured to: apply a spectral shaping filter to the speech received via said speech input; apply dynamic range compression to the output of said spectral shaping filter; and measure the signal to noise ratio at the noise input, wherein the spectral shaping filter comprises a control parameter and the dynamic range compression comprises a control parameter and wherein at least one of the control parameters for the dynamic range compression or the spectral shaping is updated in real time according to the measured signal to noise ratio. | 2016-01-21 |
20160019906 | SIGNAL PROCESSOR AND METHOD THEREFOR - A signal processor is configured to suppress a noise component contained in an input voice signal by means of coherence filtering. The processor includes an iterative coherence filtering function for repeatedly conducting the coherence filtering on a signal, which has been subjected to the coherence filtering and then input to the processor again as input signal, and performs the iteration processing on the signal obtained by the coherence filtering until a condition for terminating the iteration is satisfied, thereby preventing musical noise from generating while a noise component is suppressed. | 2016-01-21 |
20160019907 | System For Automatic Speech Recognition And Audio Entertainment - In one aspect, the present application is directed to a device for providing different levels of sound quality in an audio entertainment system. The device includes a speech enhancement system with a reference signal modification unit and a plurality of acoustic echo cancellation filters. Each acoustic echo cancellation filter is coupled to a playback channel. The device includes an audio playback system with loudspeakers. Each loudspeaker is coupled to a playback channel. At least one of the speech enhancement system and the audio playback system operates according to a full sound quality mode and a reduced sound quality mode. In the full sound quality mode, all of the playback channels contain non-zero output signals. In the reduced sound quality mode, a first subset of the playback channels contains non-zero output signals and a second subset of the playback channels contains zero output signals. | 2016-01-21 |
20160019908 | COMPANDING APPARATUS AND METHOD TO REDUCE QUANTIZATION NOISE USING ADVANCED SPECTRAL EXTENSION - Embodiments are directed to a companding method and system for reducing coding noise in an audio codec. A compression process reduces an original dynamic range of an initial audio signal through a compression process that divides the initial audio signal into a plurality of segments using a defined window shape, calculates a wideband gain in the frequency domain using a non-energy based average of frequency domain samples of the initial audio signal, and applies individual gain values to amplify segments of relatively low intensity and attenuate segments of relatively high intensity. The compressed audio signal is then expanded back to substantially the original dynamic range that applies inverse gain values to amplify segments of relatively high intensity and attenuating segments of relatively low intensity. A QMF filterbank is used to analyze the initial audio signal to obtain a frequency domain representation. | 2016-01-21 |
20160019909 | ACOUSTIC ECHO MITIGATION APPARATUS AND METHOD, AUDIO PROCESSING APPARATUS AND VOICE COMMUNICATION TERMINAL - The present application provides an acoustic echo mitigation apparatus and method, an audio processing apparatus and a voice communication terminal. According to an embodiment, an acoustic echo mitigation apparatus is provided, including: an acoustic echo canceller for cancelling estimated acoustic echo from a microphone signal and outputting an error signal; a residual echo estimator for estimating residual echo power; and an acoustic echo suppressor for further suppressing residual echo and noise in the error signal based on the residual echo power and noise power. Here, the residual echo estimator is configured to be continuously adaptive to power change in the error signal. According to the embodiments of the present application, the acoustic echo mitigation apparatus and method can, at least, be well adaptive to the change of power of the error signal after the AEC processing, such as that caused by change of double-talk status, echo path properties, noise level and etc. | 2016-01-21 |
20160019910 | Methods and Apparatus for Dynamic Low Frequency Noise Suppression - Methods and apparatus for dynamically suppressing low frequency non-speech audio events, such as road bumps, without suppressing speech formants. In exemplary embodiments of the invention, maximum powers in first and second windows are computed and used to determine whether dampening should be applied, and if so, to what extent. | 2016-01-21 |
20160019911 | FREQUENCY BAND EXTENDING DEVICE AND METHOD, ENCODING DEVICE AND METHOD, DECODING DEVICE AND METHOD, AND PROGRAM - The present invention relates to a frequency band extending device and method, an encoding device and method, a decoding device and method, and a program, whereby music signals can be played with higher sound quality due to the extension of frequency bands. | 2016-01-21 |
20160019912 | VOICE SIGNAL MODULATION SERVICE FOR GEOGRAPHIC AREAS - Modulating a voice signal is provided. The voice signal corresponding to a voice communication is received from a sending voice communication device via a network. Voice signal features corresponding to the voice communication are extracted. A set of voice signal filters are selected to modulate the extracted voice signal features corresponding to the voice communication to an average voice signal associated with a geographic area where the voice communication is destined for. The voice signal features corresponding to the voice communication are modulated by applying the selected set of voice signal filters to generate the average voice signal associated with the geographic area where the voice communication is destined for. | 2016-01-21 |
20160019913 | SIGNAL PROCESSING APPARATUS, SIGNAL PROCESSING METHOD, AND SIGNAL PROCESSING PROGRAM - Disclosed is a signal processing apparatus that processes an input signal to accurately detect an abrupt change in the input signal in accordance with the degree of linear change of a phase component in a frequency domain. The signal processing apparatus includes a converter that converts the input signal into the phase component and an amplitude component in the frequency domain, a linearity calculator that calculates the linearity of the phase component in the frequency domain, and a determiner that determines presence of the abrupt change in the input signal based on the linearity calculated by the linearity calculator. | 2016-01-21 |
20160019914 | SIGNAL PROCESSING APPARATUS, SIGNAL PROCESSING METHOD, AND SIGNAL PROCESSING PROGRAM - This invention provides a signal processing apparatus for effectively detecting an abrupt change in an input signal. The signal processing apparatus includes a converter that converts an input signal into a phase component signal and an amplitude component signal in a frequency domain. The signal processing apparatus further includes a calculator that calculates feature amounts of the phase component signal and the amplitude component signal derived by the converter. The signal processing apparatus further includes a determiner that determines presence probability of an abrupt change in the input signal based on the feature amounts calculated by the calculator. | 2016-01-21 |
20160019915 | REAL-TIME EMOTION RECOGNITION FROM AUDIO SIGNALS - Systems, methods, and computer-readable storage media are provided for recognizing emotion in audio signals in real-time. An audio signal is detected and a rapid audio fingerprint is computed on a user's computing device. One or more features is extracted from the audio fingerprint and compared with features associated with defined emotions to determine relative degrees of similarity. Confidence scores are computed for the defined emotions based on the relative degrees of similarity and it is determined whether a confidence score for one or more particular emotions exceeds a threshold confidence score. If it is determined that a threshold confidence score for one or more particular emotions is exceeded, the particular emotion or emotions are associated with the audio signal. As desired, various action then may be initiated based upon the emotion/emotions associated with the audio signal. | 2016-01-21 |
20160019916 | Unbalanced Data Writer Coil - A data writer may be configured with at least a write pole and a continuous coil with the continuous coil having a first turn with a first cross-sectional shape and a second turn with a second cross-sectional shape that differs from the first cross-sectional shape. The second turn may be positioned proximal a leading edge of the write pole and an air bearing surface while the first turn is positioned distal the air bearing surface. | 2016-01-21 |
20160019917 | CURRENT-PERPENDICULAR-TO-PLANE MAGNETO-RESISTANCE EFFECT ELEMENT - The CPPGMR element of the present invention has an orientation layer | 2016-01-21 |
20160019918 | SUSPENSION ASSEMBLY AND DISK DRIVE WITH THE SAME - According to one embodiment, a suspension assembly includes a base plate having a securing plate portion protruding outwardly from a side edge of the base plate, a load beam secured on a first surface of the base plate and extending from the base plate, and a wiring member. The wiring member includes a distal side portion attached to the load beam and the first surface of the base plate, and a proximal side portion extending outwardly from the side edge of the base plate and extending in a direction opposite to the load beam along the support surface. | 2016-01-21 |
20160019919 | DYNAMICALLY OPTIMIZING READ PERFORMANCE BY ADJUSTING SERVO-BASED HEAD LOCATION - In one embodiment, a method includes determining a reading performance based on one or more metrics, adjusting a commanded lateral reading location of a head relative to a medium, determining the reading performance after the adjusting, comparing the reading performance after the adjusting relative to the reading performance before the adjusting for determining whether the reading performance has improved, and selecting a commanded lateral reading location based on the comparing. In another embodiment, a controller is configured to perform the foregoing method. In yet another embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a controller configured to perform the foregoing method. | 2016-01-21 |
20160019920 | DETECTING A SERVO PATTERN USING A DATA CHANNEL IN A MAGNETIC TAPE DRIVE - In one embodiment, a system for processing data includes an equalizer having a finite impulse response (FIR) filter configured to process data read with a channel using servo coefficients to generate equalized data, and one or more low-pass filters configured to filter the equalized data to output filtered data. The one or more low-pass filters is configured to remove high frequency noise from the equalized data. A method for processing data in a read channel, in one embodiment, includes receiving data read from a magnetic tape using the read channel of a magnetic tape drive. A finite impulse response (FIR) filter is applied to the data by an equalizer using servo coefficients to output equalized data. One or more low-pass filters is applied to the equalized data to obtain filtered data, the one or more low-pass filters being configured to remove high frequency noise from the equalized data. | 2016-01-21 |
20160019921 | WRITE DELAY TO DE-SKEW DATA IN READ WHILE WRITE FUNCTION FOR TAPE STORAGE DEVICES - A controller, according to one embodiment, has at least some hardware components, and is configured to determine an offset between adjacent arrays of transducers in a direction perpendicular to an intended direction of media travel when a magnetic head having the arrays is positioned at a first position, cause the magnetic head to tilt to a second position, and delay write operations performed by at least some of the transducers in a first of the arrays such that data written by the transducers in the first array is readable by a second array of read transducers aligned in the direction orthogonal to the intended direction of media travel without implementing readback delays corresponding to the write delays. | 2016-01-21 |
20160019922 | METHOD OF SETTING FLYING HEIGHT AND FLYING HEIGHT SETTING DEVICE - While a plurality of drive currents for flying height setting with current values smaller than a tentative optimum drive current are supplied to a light source, respectively, heater power is supplied to a heater part, and touch down of a thermally-assisted magnetic recording head is detected. Tentative optimum heater power is determined based on a correlation between the heater power when the touch down is detected and each drive current for flying height setting. The tentative optimum drive current is supplied to the light source part; the tentative optimum heater power is supplied to the heater part; a reference signal is recorded in a magnetic recording medium; and flying height of the thermally-assisted magnetic recording head is set by determining whether or not the reference signal is recorded with the desired signal intensity. | 2016-01-21 |
20160019923 | RESISTIVE TEMPERATURE SENSORS FOR IMPROVED ASPERITY, HEAD-MEDIA SPACING, AND/OR HEAD-MEDIA CONTACT DETECTION - A sensor supported by a head transducer has a temperature coefficient of resistance (TCR) and a sensor resistance. The sensor operates at a temperature above ambient and is responsive to changes in sensor-medium spacing. Conductive contacts connected to the sensor have a contact resistance and a cross-sectional area adjacent to the sensor larger than that of the sensor, such that the contact resistance is small relative to the sensor resistance and negligibly contributes to a signal generated by the sensor. A multiplicity of head transducers each support a TCR sensor and a power source can supply bias power to each sensor of each head to maintain each sensor at a fixed temperature above an ambient temperature in the presence of heat transfer changes impacting the sensors. A TCR sensor of a head transducer can include a track-oriented TCR sensor wire for sensing one or both of asperities of the medium. | 2016-01-21 |
20160019924 | SLIDERS HAVING AT LEAST TWO REGIONS ON THE TRAILING EDGE SURFACE - A slider that includes a leading edge surface; a trailing edge surface; and an air bearing surface (ABS) positioned between the leading edge surface and the trailing edge surface, wherein the trailing edge surface includes a read-write element, at least one low surface energy region and at least one high surface energy region. | 2016-01-21 |
20160019925 | OPTICAL PICKUP DEVICE - An optical pickup device is one in which a lens holder is held by a movable base by using a resilient wire. A restricting abutting portion is formed at a lower portion of the lens holder. When the lens holder moves excessively downward, the restricting abutting portion comes into contact with a stopper portion to restrict a downward movement of the lens holder, so that it is possible to prevent the lens holder from contacting a unit chassis. When the unit chassis is not mounted on the movable base, it is possible to prevent excessive flexing of the resilient wire caused when an opposing abutting portion of the lens holder comes into contact with the unit chassis. | 2016-01-21 |
20160019926 | OPTICAL INFORMATION RECORDING MEDIUM, REPRODUCTION APPARATUS, AND REPRODUCTION METHOD - The reliability of a super-resolution optical information recording medium whose capacity can be increased is increased. On an optical information recording medium ( | 2016-01-21 |
20160019927 | UTILIZING STORED WRITE ENVIRONMENT CONDITIONS FOR READ ERROR RECOVERY - Described herein are embodiments for utilizing stored write environment conditions for read error recovery. A tape drive measures read environment conditions as a result of receiving a read command to read data from a portion of tape and compares the read environment conditions to the write environment conditions stored for that portion of tape. If the read environment conditions are not within the predetermined range of the write environment conditions, then the handling of the tape is altered to improve read element placement on the tape by accounting for expansion and contraction of the tape based on the stored write environment conditions. The handling of the tape is altered by at least one of increasing or decreasing the tension of the tape, offsetting the tape head up or down laterally with respect to the tape, and slowing down the movement of tape across the tape head. | 2016-01-21 |
20160019928 | OPTICAL DISC DEVICE - An optical disc device is provided. The optical disc device comprises: a comprising an optical pickup and a transfer unit for linearly moving the optical pickup in a radial direction; and a locking module that is mounted on a rear side of the tray for unlocking the tray from the body, the locking module comprising: a locking part comprising a hook for engaging a locking projection formed on the body and being mounted to be rotatable; a circular gear being mounted to be rotatable in connection with the transfer unit; a first connecting for rotating by a linear force transmitted through the transfer unit moving outward; and a second connecting part for rotating by a force transmitted sequentially from the first connecting part and the circular gear and to transmit torque to the locking part to cause the hook to be unlocked from the locking projection. | 2016-01-21 |
20160019929 | CONSTRAINING FIR FILTER TAPS IN AN ADAPTIVE ARCHITECTURE - According to one embodiment, a system for processing data includes a processor and logic integrated with and/or executable by the processor, the logic being configured to individually set, for each of one or more range-constrained finite impulse response (FIR) filter taps configured for use in a FIR filter, a predetermined range of values suitable for controlling an equalizer response, and pass data through the equalizer including the FIR filter to obtain equalized data, wherein each of the one or more range-constrained FIR filter taps are individually adaptive within its predetermined range of values. Other systems and methods for processing data by constraining FIR filter taps while reading data from a data storage medium are described in more embodiments. | 2016-01-21 |
20160019930 | DYNAMIC GAIN CONTROL FOR USE WITH ADAPTIVE EQUALIZERS - According to one embodiment, a system for processing data includes a controller configured to: receive data read from a magnetic storage medium, apply a finite impulse response (FIR) filter to the data to obtain equalized data, and direct the equalized data through either a first FIR gain module or a second FIR gain module to control FIR gain of the equalized data, wherein the first FIR gain module is utilized when reading data in an asynchronous mode, and wherein the second FIR gain module is utilized when reading data in a synchronous mode and a FIR gain value of the second FIR gain module is automatically controlled. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments. | 2016-01-21 |
20160019931 | GENERATING POSITION ERROR SIGNAL BASED ON DATA TRACKS FOR ROTATING STORAGE DATA STORAGE - A system including an inter-track interference detection module and a position error signal generation module. The inter-track interference detection module determines a first inter-track interference value based on a first signal from a first sensor positioned over a first track of a rotating storage medium. The first inter-track interference value indicates energy contributed by tracks adjacent to the first track compared to energy contributed by the first track. The inter-track interference detection module determines a second inter-track interference value based on a second signal from a second sensor positioned over a second track of the rotating storage medium. The second inter-track interference value indicates energy contributed by tracks adjacent to the second track compared to energy contributed by the second track. The position error signal generation module generates a position error signal based on the first inter-track interference value and the second inter-track interference value. | 2016-01-21 |
20160019932 | SYSTEMS AND METHODS FOR GENERATING VIDEO - The present disclosure provides methods for generating video with minimal user involvement. A method for generating a video comprises accessing an audio repository and retrieving audio and analyzing the audio to identify peaks that have a signal amplitude above a threshold. The time between identified peaks is the determined. Next, a set of images for use in generating the video is retrieved from an image repository. The video is then generated such that individual images of the set of images are transitioned at a transition time that is equal to the time between peaks. | 2016-01-21 |
20160019933 | APPARATUS AND METHODS FOR RECORDING AUDIO AND VIDEO - Audio/video recorders are presented for recording audio and video of various types of proceedings, including court proceedings. In some examples, audio/video recorders may obtain case information associated with a case identifier from a case management database, and associate at least some of the case information with one or more audio channel inputs of the audio interface. In some examples, audio/video recorders may associate a speaker with an audio channel input of the audio interface, determine that an amplitude of an audio signal received at the audio channel input is above a threshold, determine a time when the amplitude of the audio signal at the audio channel was determined to be above the threshold, and generate metadata as a timeline indicating that the first speaker began speaking at the first time. | 2016-01-21 |
20160019934 | CONTINUING MEDIA PLAYBACK AFTER BOOKMARKING - One embodiment provides a method, including: identifying, using a processor, a consumer of media content; detecting, using data derived from a device selected from the group consisting of an image capture device and an audio capture device, a trigger event associated with the consumer; and creating, using a processor, a bookmark at a location in the media content associated with the detection of the trigger event. Other embodiments are described and claimed. | 2016-01-21 |
20160019935 | TIMELINE SYNCHRONIZATION CONTROL METHOD FOR MULTIPLE DISPLAY VIEWS - A video surveillance system and methods for operating that sets the timeline for multiple views of video data from different cameras to playback separately from one another or to be linked so as to synchronize their playback. Placement and selection of a playback cursor to a particular point in a timeline of master view will cause linked views to automatically move to and synchronize to the same point in their associated timelines, and when the video data is being transmitted from multiple cameras to cause the cameras displaying the linked views to update so that the video data associated with each camera is updated to the selected point in time from the linked master view. Timeline resolutions for linked views are not affected by linking or unlinking views. | 2016-01-21 |
20160019936 | ULTRA LOW POWER ARCHITECTURE TO SUPPORT ALWAYS ON PATH TO MEMORY - An apparatus with an ultra low power architecture is described herein. The apparatus includes a first power supply rail, wherein a plurality of subsystems are to be powered by the first power supply rail. The apparatus also includes a second power supply rail, wherein a plurality of autonomous subsystems are to be powered by the power supply rail, wherein the second power supply rail is to be always on, always available, and low power. | 2016-01-21 |
20160019937 | DISTRIBUTED COMPUTING WITH PHASE CHANGE MATERIAL THERMAL MANAGEMENT - Various apparatus and methods using phase change materials are disclosed. In one aspect, a method of operating a computing device that has a first semiconductor chip with a first phase change material and a second semiconductor chip with a second phase change material is provided. The method includes determining if the first semiconductor chip phase change material has available thermal capacity. If the first semiconductor chip phase change material has available thermal capacity then the first semiconductor chip is instructed to operate in sprint mode. The first semiconductor chip is instructed to perform a first computing task while in sprint mode. | 2016-01-21 |
20160019938 | LATCH CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A latch circuit includes: first to Nth storage nodes where N is an even number equal to or more than four; and first to Nth pairs of transistors, each of which comprises a PMOS transistor and an NMOS transistor coupled in series with each other through a corresponding node among the first to Nth storage nodes. The PMOS transistor is coupled to one of the storage nodes included in previous one of the pairs of transistors at a gate of the PMOS transistor. The NMOS transistor is coupled to one of the storage nodes included in next one of the pairs of transistors at a gate of the NMOS transistor. The PMOS transistors of the first to Nth pairs of transistors are formed in a first active region. The NMOS transistors of the first to Nth pairs of transistors are formed in a second active region, separated from the first active region. | 2016-01-21 |
20160019939 | MEMORY AND METHOD OF OPERATING THE SAME - A memory includes a plurality of memory blocks, a plurality of sensing circuits, a plurality of global bit lines, a common pre-charging circuit and a selection circuit. Each global bit line of the plurality of global bit lines is coupled to at least one of the memory blocks by a corresponding sensing circuit of the plurality of sensing circuits. The common pre-charging circuit is configured to individually pre-charge each global bit line of the plurality of global bit lines to a pre-charge voltage. The selection circuit is configured to selectively couple the common pre-charging circuit to a selected global bit line of the plurality of global bit lines. | 2016-01-21 |
20160019940 | MEMORY DEVICE - A memory device includes a plurality of normal word lines arranged at a first distance from each other, a redundant word line arranged at a second distance, which is greater than the first distance from a normal word line adjacent to the redundant word line, among the normal word lines, and a word line control unit suitable for selectively activating the normal word lines, and replacing a frequently activated word line with the redundant word line when the frequently activated word line is detected. | 2016-01-21 |
20160019941 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes: banks each including a memory cell array; word lines connected to rows of each of the banks; an address latch circuit configured to latch a full address for specifying one of the word lines, the full address including a first address and a second address; and a control circuit configured to ignore a reset operation for the first address as a target of a set operation, and overwrite the first address in accordance with the set operation when receiving a first command for specifying a reset operation for a bank and a set operation for the first address. | 2016-01-21 |
20160019942 | MAGNETIC RANDOM ACCESS MEMORY - According to one embodiment, a magnetic random access memory includes a write circuit to write complementary data to first and second magnetoresistive elements, and a read circuit to read the complementary data from the first and second magnetoresistive elements. The control circuit is configured to change the first and second bit lines to a floating state after setting the first and second bit lines to a first potential, and change a potential of the first bit line in the floating state to a first value in accordance with a resistance value of the first magnetoresistive element and a potential of the second bit line in the floating state to a second value in accordance with a resistance value of the second magnetoresistive element by setting the common source line to a second potential higher than the first potential. | 2016-01-21 |
20160019943 | METHOD AND APPARATUS FOR MRAM SENSE REFERENCE TRIMMING - A trimming process for setting a reference current used in operating an MRAM module comprising an operational MRAM cell coupled to a bit line, multiple reference MRAM cells coupled to a reference bit line, and a sense amplifier coupled to the bit line and the reference bit line is disclosed in some embodiments. The process includes applying a bit line reference voltage to the reference bit line to provide a reference cell current formed by a sum of respective currents through the plurality of reference MRAM cells. The reference cell current is detected. A determination is made as to whether the detected reference cell current differs from a target reference cell current. The bit line reference voltage is varied, or a sensing ratio of the sense amplifier is varied, if it is determined that the detected reference cell current differs from the target reference cell current. | 2016-01-21 |
20160019944 | ADDRESS GENERATION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME - An address generation circuit may include: a first latch unit suitable for latching an address obtained by inverting a part of an input address; a second latch unit suitable for latching the partly inverted input address of the first latch unit, and suitable for latching an added/subtracted address after a first refresh operation during a target refresh period; a third latch unit suitable for latching the partly inverted input address of the first latch unit during a period other than the target refresh period; and an addition/subtraction unit suitable for generating the added/subtracted address by adding/subtracting a predetermined value to/from the latched address of the second latch unit. | 2016-01-21 |
20160019945 | POWER GATE FOR LATCH-UP PREVENTION - In an embodiment of the invention, power is provided to an SRAM array without causing latch-up by charging the positive voltage node in the SRAM array and the Nwell regions in the SRAM at approximately the same rate. | 2016-01-21 |
20160019946 | THREE-DIMENSIONAL THREE-PORT BIT CELL AND METHOD OF ASSEMBLING SAME - A three-port, three-dimensional bit cell generally comprises a read portion of a cell disposed on a first tier. The read portion comprises a plurality of read port elements. The three-port bit cell further comprises a write portion of the cell disposed on a second tier that is vertically stacked with respect to the first tier. The first and second tiers are coupled using at least one via. The write portion comprises a plurality of write port elements. | 2016-01-21 |
20160019947 | Multiple Pass Programming For Memory With Different Program Pulse Widths - Techniques are provided for programming memory cells while reducing the effects of detrapping which cause a downshift in the threshold voltage distribution. Detrapping is particularly problematic for charge-trapping memory cells such as in a 3D stacked non-volatile memory device. After completion of a full programming pass, a verify test is performed to identify cells for which reprogramming is warranted. The reprogramming can include multiple program-verify iterations which use longer program pulses than in the full programming pass. Moreover, the number of program-verify iterations is limited to reduce the reprogramming time. In one approach, cells of all target data states are programmed together. In another approach, cells of different target data states are programmed separately. | 2016-01-21 |
20160019948 | Reprogramming Memory With Single Program Pulse Per Data State - Techniques are provided for programming memory cells while reducing the effects of detrapping which cause a downshift in the threshold voltage distribution. Detrapping is particularly problematic for charge-trapping memory cells such as in a | 2016-01-21 |
20160019949 | PROGRAMMING MEMORIES WITH MULTI-LEVEL PASS SIGNAL - Memories and methods for programming memories with multi-level pass signals are provided. One method includes programming cells of the memory selected to be programmed to a particular target data state of the memory, using program disturb to program cells of the memory selected to be programmed to target data states that are lower than the particular target data state while programming cells of the memory selected to be programmed to the particular target data state, and boosting a channel voltage for cells of the memory selected to be programmed to the target data states that are lower than the particular target data state. Boosting may include using a multi-step pass signal. | 2016-01-21 |
20160019950 | AUTO LOW CURRENT PROGRAMMING METHOD WITHOUT VERIFY - A flash memory device employs a low current auto-verification programming scheme using multi-step programming voltage and cell current detection. The low current auto-verification programming scheme performs programming of memory cells by the application of programming voltages in step increments. For each programming pulse, the cell current of the memory cell is sensed to determine when the memory cell is programmed. The programming pulse is terminated when the cell current decreases below a reference current level. | 2016-01-21 |
20160019951 | RESISTIVE MEMORY DEVICE, RESISTIVE MEMORY SYSTEM, AND METHOD OF OPERATING RESISTIVE MEMORY DEVICE - A resistive memory device includes a memory cell array including a plurality vertically stacked layers having one layer designated as an interference-free layer and another layer designated as an access prohibited layer, wherein the interference-free layer and the access prohibited layer share a connection with at least one signal line and access operations directed to memory cells the access prohibited layer are prohibited. | 2016-01-21 |
20160019952 | INTRINSIC VERTICAL BIT LINE ARCHITECTURE - Methods for reducing leakage currents through unselected memory cells of a memory array during a memory operation are described. In some cases, the leakage currents through the unselected memory cells of the memory array may be reduced by setting an adjustable resistance bit line structure connected to the unselected memory cells into a non-conducting state. The adjustable resistance bit line structure may comprise a bit line structure in which the resistance of an intrinsic (or near intrinsic) polysilicon portion of the bit line structure may be adjusted via an application of a voltage to a select gate portion of the bit line structure that is not directly connected to the intrinsic polysilicon portion. The intrinsic polysilicon portion may be set into a conducting state or a non-conducting state based on the voltage applied to the select gate portion. | 2016-01-21 |
20160019953 | SETTING CHANNEL VOLTAGES USING A DUMMY WORD LINE - Methods for reducing leakage currents through unselected memory cells of a memory array during a memory operation are described. In some cases, the leakage currents through the unselected memory cells of the memory array may be reduced by setting an adjustable resistance bit line structure connected to the unselected memory cells into a non-conducting state. The adjustable resistance bit line structure may comprise a bit line structure in which the resistance of an intrinsic (or near intrinsic) polysilicon portion of the bit line structure may be adjusted via an application of a voltage to a select gate portion of the bit line structure that is not directly connected to the intrinsic polysilicon portion. The intrinsic polysilicon portion may be set into a conducting state or a non-conducting state based on the voltage applied to the select gate portion. | 2016-01-21 |
20160019954 | Switchable Macroscopic Quantum State Devices and Methods for Their Operation - Discloses is an electronic device and a method for its operation. The device has first and second electrodes and an active material. The active material has selectable and stable first and second macroscopic quantum states, such as charge density wave ordered states, having respectively first and second values of electrical resistivity ρ | 2016-01-21 |
20160019955 | MEMORY DEVICE - According to one embodiment, a memory device includes a memory cell, a sense amplifier, and a resistor. The sense amplifier includes a first input and a second input, outputs a signal in accordance with a difference between the first and second inputs, and is selectively coupled at a second input to the memory cell. The resistor is in a first path between the first input of the sense amplifier and a ground node. | 2016-01-21 |
20160019956 | ELECTRONIC DEVICE - This patent document relates to memory circuits or devices and their applications in electronic devices or systems. The disclosed technology in this patent document includes memory circuits or devices and their applications in electronic devices or systems and various implementations of an electronic device in which an electronic device capable of reducing an area, improving device characteristics due to a reduction in the resistance of a switching transistor, simplifying the process, and reducing a cost is provided. In accordance with the electronic device of this patent document, an area can be reduced, device characteristics can be improved due to a reduction in the resistance of the switching transistor, the process can be simplified, and a cost can be reduced. | 2016-01-21 |
20160019957 | REDUCING DISTURB WITH ADJUSTABLE RESISTANCE BIT LINE STRUCTURES - Methods for reducing leakage currents through unselected memory cells of a memory array during a memory operation are described. In some cases, the leakage currents through the unselected memory cells of the memory array may be reduced by setting an adjustable resistance bit line structure connected to the unselected memory cells into a non-conducting state. The adjustable resistance bit line structure may comprise a bit line structure in which the resistance of an intrinsic (or near intrinsic) polysilicon portion of the bit line structure may be adjusted via an application of a voltage to a select gate portion of the bit line structure that is not directly connected to the intrinsic polysilicon portion. The intrinsic polysilicon portion may be set into a conducting state or a non-conducting state based on the voltage applied to the select gate portion. | 2016-01-21 |
20160019958 | DESCENDING SET VERIFY FOR PHASE CHANGE MEMORY - Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a phase change memory. | 2016-01-21 |
20160019959 | NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME - A nonvolatile memory device comprises a memory cell comprising a variable resistance element connected between a couple of wirings and a control circuit applying a voltage between the couple of wirings connected to the memory cell. In data rewriting, the control circuit repeats a first voltage application step of applying a first write voltage between the couple of wirings and a first verify step of applying a first voltage lower than the first write voltage between the couple of wirings and comparing a cell current through the cell with a first threshold current, the steps repeated until a magnitude relation of the cell current and the first threshold current satisfies a first condition. If the first condition is satisfied, the circuit performs a second voltage application step of applying a second write voltage between the couple of wirings. | 2016-01-21 |
20160019960 | OPERATION MODES FOR ADJUSTABLE RESISTANCE BIT LINE STRUCTURES - Methods for reducing leakage currents through unselected memory cells of a memory array during a memory operation are described. In some cases, the leakage currents through the unselected memory cells of the memory array may be reduced by setting an adjustable resistance bit line structure connected to the unselected memory cells into a non-conducting state. The adjustable resistance bit line structure may comprise a bit line structure in which the resistance of an intrinsic (or near intrinsic) polysilicon portion of the bit line structure may be adjusted via an application of a voltage to a select gate portion of the bit line structure that is not directly connected to the intrinsic polysilicon portion. The intrinsic polysilicon portion may be set into a conducting state or a non-conducting state based on the voltage applied to the select gate portion. | 2016-01-21 |
20160019961 | CONTROLLING ADJUSTABLE RESISTANCE BIT LINES CONNECTED TO WORD LINE COMBS - Methods for reducing leakage currents through unselected memory cells of a memory array during a memory operation are described. In some cases, the leakage currents through the unselected memory cells of the memory array may be reduced by setting an adjustable resistance bit line structure connected to the unselected memory cells into a non-conducting state. The adjustable resistance bit line structure may comprise a bit line structure in which the resistance of an intrinsic (or near intrinsic) polysilicon portion of the bit line structure may be adjusted via an application of a voltage to a select gate portion of the bit line structure that is not directly connected to the intrinsic polysilicon portion. The intrinsic polysilicon portion may be set into a conducting state or a non-conducting state based on the voltage applied to the select gate portion. | 2016-01-21 |
20160019962 | RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS - The gate of the access transistor of a 1 transistor 1 resistor (1T1R) type RRAM cell is biased relative to the source of the access transistor using a current mirror. Under the influence of a voltage applied across the 1T1R cell (e.g., via the bit line), the RRAM memory element switches from a higher resistance to a lower resistance. As the RRAM memory element switches from the higher resistance to the lower resistance, the current through the RRAM cell switches from being substantially determined by the higher resistance of the RRAM device (while the access transistor is operating in the linear region) to being substantially determined by the saturation region operating point of the access transistor. | 2016-01-21 |
20160019963 | AUTO-TRACKING UNSELECTED WORD LINE VOLTAGE GENERATOR - Methods for reducing leakage currents through unselected memory cells of a memory array during a memory operation are described. In some cases, the leakage currents through the unselected memory cells of the memory array may be reduced by setting an adjustable resistance bit line structure connected to the unselected memory cells into a non-conducting state. The adjustable resistance bit line structure may comprise a bit line structure in which the resistance of an intrinsic (or near intrinsic) polysilicon portion of the bit line structure may be adjusted via an application of a voltage to a select gate portion of the bit line structure that is not directly connected to the intrinsic polysilicon portion. The intrinsic polysilicon portion may be set into a conducting state or a non-conducting state based on the voltage applied to the select gate portion. | 2016-01-21 |
20160019964 | MEMORY DEVICE WITH COMBINED NON-VOLATILE MEMORY (NVM) AND VOLATILE MEMORY - A memory device includes a volatile memory cell, a non-volatile memory cell, and a transfer system connected between the volatile memory cell and the non-volatile memory cell. The transfer circuit allows data transfer from the volatile memory cell to the non-volatile memory cell when the memory device is operating in a first mode, and from the non-volatile memory cell to the volatile memory cell when the memory device is operating in a second mode. | 2016-01-21 |
20160019965 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a memory cell, a peripheral circuit configured to drive the memory cell, and a protection element. The peripheral circuit includes a first p-type MOS transistor including a gate electrode and a gate insulating film having a first film thickness, a second p-type MOS transistor including a gate electrode and a gate insulating film having a second film thickness, and an n-type MOS transistor. The gate electrode of the first p-type MOS transistor is connected to the protection element. The gate electrodes included in the second p-type MOS transistor and the n-type MOS transistor are connected only to an impurity region of another transistor or only to a gate electrode of the another transistor. | 2016-01-21 |
20160019966 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device is operated by, inter alia, performing least significant bit programs for pages in a first page group, performing least significant bit programs for pages in a second page group, and performing most significant bit programs for the pages in the first page group. The distance between the second page group and the common source line is greater than that between the first page group and the common source line. | 2016-01-21 |
20160019967 | EXTERNAL MEMORY DEVICE - An external memory device configured to communicate with an external electronic device includes: a semiconductor substrate including a first edge and a second edge perpendicular to the first edge; a semiconductor integrated circuit device provided on the semiconductor substrate, the semiconductor integrated circuit device including a memory device configured to store data provided from the external electronic device, an input/output interface configured to interface with the external electronic device, and a controller configured to control the memory device in response to a signal transmitted through the input/output interface; an insulating layer covering the semiconductor integrated circuit device; and external input/output pins provided adjacent to the first edge on the insulating layer and configured to establish an electrical connection between the external electronic device and the semiconductor integrated circuit device. | 2016-01-21 |
20160019968 | FLASH MEMORY DEVICE - A flash memory device includes a first page buffer, a second page buffer neighboring the first page buffer, a source-pick-up region disposed between the first page buffer and the second page buffer, and a source line extending in a direction. The source line includes a first portion that corresponds to the first page buffer and a second portion that corresponds to the second page buffer. A first resistance value of the first portion is substantially the same as a second resistance value of the second portion. | 2016-01-21 |
20160019969 | SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF - A semiconductor memory device according to an embodiment of the present invention includes a first cell string and a second cell string coupled to a first word line group and a second word line group, respectively. An operating method of the semiconductor memory device may include forming a channel in the second cell string by applying a pass voltage to the second word line group, reflecting data of a selected memory cell coupled to a selected word line of the first word line group, among memory cells of the first cell string, on the channel of the second cell string through the bit line, and determining the data of the selected memory cell by sensing a quantity of electric charge of the second cell string through the bit line. | 2016-01-21 |
20160019970 | SHIELDED VERTICALLY STACKED DATA LINE ARCHITECTURE FOR MEMORY - Apparatuses and methods are disclosed, including an apparatus that includes first and second strings of vertically stacked memory cells, and first and second pluralities of vertically stacked data lines. A data line of the first plurality of data lines is coupled to the first string through a first select device. A data line of the second plurality of data lines is coupled to the second string through a second select device and is adjacent to the data line coupled to the first string. Such an apparatus can be configured to couple the data line coupled to the first string to a shield potential during at least a portion of a memory operation involving a memory cell of the second string. | 2016-01-21 |
20160019971 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME - According to an embodiment, a non-volatile semiconductor memory device comprises a NAND cell unit, a bit-line, a source-line, word-lines and a control circuit. The NAND cell unit comprises memory cells connected in series. The bit-line is connected to an end of the NAND cell unit. The source-line is connected to the other end of the NAND cell unit. The word-lines are connected to respective control gates of the memory cells. The control circuit applies, to a non-selected word-line on the bit-line side of a predetermined boundary in the NAND cell unit, a first read-pass voltage turning on the memory cell regardless of the cell data. The control circuit applies, to a non-selected word-line on the source-line side of the predetermined boundary, a second read-pass voltage less than the first read-pass voltage. The control circuit provides a read bit-line voltage between the bit-line and the source-line. | 2016-01-21 |