02nd week of 2011 patent applcation highlights part 56 |
Patent application number | Title | Published |
20110010475 | METHOD AND DEVICE FOR LOGGING PROCESS VARIABLES OF A DIGITAL FIELD DEVICE - A method and an electronic device are provided for logging process variables of a bus-controlled automation system in which process variables which are relevant to evaluation are buffered in at least one digital field device and are subsequently read, for the purpose of evaluation, by a central computer unit which is connected to the field device via a data bus. Process variable values which are relevant to evaluation are buffered in the field device in the form of a message, a plurality of equidistantly successive process variable values are recorded as messages, where the first process variable value is assigned a time stamp recorded for each message, and further process variable values are stored in further identical messages. | 2011-01-13 |
20110010476 | TWO-WIRE LOOP PROCESS IO TRANSMITTER POWERED FROM THE TWO-WIRE LOOP - A two-wire process input-output (“IO”) transmitter powered by a two-wire process loop and configured as a single transmitter. The transmitter including a gateway module and at least one local IO module. The gateway module including a first circuit configured to wholly power the gateway module from the two-wire process loop, a second circuit configured to communicate via the two-wire process loop, and a third circuit configured to communicate with the at least one IO module via a local bus separated from the two-wire process loop. The at least one local IO module including a first circuit configured to wholly power the respective local IO module from the two-wire process loop, a second circuit to communicate at least with the gateway module via the local bus, and a third circuit configured to interface with at least one IO field device. | 2011-01-13 |
20110010477 | UNIVERSAL SERIAL BUS CONTROL SYSTEM AND METHOD OF DRIVING THE SAME - A universal serial bus (USB) control system includes a plurality of antennas configured to transmit and receive a radio frequency (RF) signal, a plurality of wireless USB modules connected to the plurality of antennas, and an application layer connected to the plurality of wireless USB modules. Each wireless USB module is configured to convert the RF signal received through a corresponding antenna into data, convert the data into the RF signal, and transmit the RF signal through the corresponding antenna. | 2011-01-13 |
20110010478 | SYSTEM AND METHOD FOR DEVICE RESOURCE ALLOCATION AND RE-BALANCE - In at least one embodiment, an apparatus for providing resources from a plurality of on-board device nodes to a hot-plugged device node in a computer is provided. The apparatus comprises a resource manager configured to receive a resource request over a bus system indicative of a set of desired resources from the hot-plugged device node. The resource manager is further configured to probe a parent device and at least one upper level device node positioned above the parent device node for the set of desired resources. The resource manager is further configured to provide the set of desired resources from the parent device node and one or more nodes of the at least one upper level device node over the bus system for transmission to the hot-plugged device node to enable the hot-plugged device node to operate in the intended manner. | 2011-01-13 |
20110010479 | DATA PROCESSOR AND CONTROL SYSTEM - Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests. | 2011-01-13 |
20110010480 | METHOD FOR EFFICIENT I/O CONTROLLER PROCESSOR INTERCONNECT COUPLING SUPPORTING PUSH-PULL DMA READ OPERATIONS - A system for I/O controller-processor interconnect coupling supporting a push-pull DMA read operation, in one aspect, may comprise a processor interconnect comprising a plurality of caches and memory subsystems and an I/O controller coupled with the processor interconnect. The I/O controller may comprise a plurality of DMA read request queues, a DMA read slot pool comprising a plurality of DMA read slots, and an expander logic determining a priority of requests in said request queues. | 2011-01-13 |
20110010481 | MASSIVE MULTI-CORE PROCESSOR BUILT WITH SERIAL SWITCHING - A multi-processor architecture for a network device that includes a plurality of barrel cards, each including: a plurality of processors, a PCIe switch coupled to each of the plurality of processors, and packet processing logic coupled to the PCIe switch. The PCIe switch on each barrel card provides high speed flexible data paths for the transmission of incoming/outgoing packets to/from the processors on the barrel card. An external PCIe switch is commonly coupled to the PCIe switches on the barrel cards, as well as to a management processor, thereby providing high speed connections between processors on separate barrel cards, and between the management processor and the processors on the barrel cards. | 2011-01-13 |
20110010482 | Self-Healing Chip-to-Chip Interface - A method, apparatus, and computer instructions for managing a set of signal paths for a chip. A defective signal path within the set of signal paths for the chip is detected. Signals are re-routed through the set of signal paths such that the defective signal path is removed from the set of signal paths and sending signals using remaining data signal paths in the set of signal paths and using an extra signal path in response to detecting the defective signal path. | 2011-01-13 |
20110010483 | MEMORY PROTECTION UNIT IN A VIRTUAL PROCESSING ENVIRONMENT - The present invention relates to a memory management system in a virtualized environment. The system comprises a virtual address, a buffer storage such as a translation lookaside buffer provided to store virtual address to physical address translations, a buffer storage such as a page table provided to store virtual address to real address translations and memory protection unit provided to verify whether a physical address obtained from the virtual address is within boundaries of one or more physical system memory regions assigned to a virtual machine. | 2011-01-13 |
20110010484 | OPTIMIZED PAGE PROGRAMMING ORDER FOR NON-VOLATILE MEMORY - During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write to a memory array of the memory device is provided before a page which takes less time to write. Overall programming time for the recording unit is reduced since a greater degree of parallel processing occurs. While the page which takes longer to program is being programmed to the memory array, the page which takes less time to program is being transferred to the memory device. After programming is completed, the memory device signals the host to transfer a next recording unit. The pages of data may include lower, middle and upper pages. | 2011-01-13 |
20110010485 | Flash Memory Control Device - A flash memory control device includes a controller and an expansion device. The expansion device is electrically connected to the controller and one and more flash memory devices for temporarily storing data, integrating data and presenting processing status, wherein the controller orders the expansion device to transform data to the one and more flash memory devices or receive data from the one and more flash memory devices according to processing status. | 2011-01-13 |
20110010486 | REALTIME LINE OF RESPONSE POSITION CONFIDENCE MEASUREMENT - A PET event position calculation method using a combination angular and radial event map wherein identification of the radial distance of the event from the centroid of the scintillation crystal with which the event is associated as well as angular information is performed. The radial distance can be converted to a statistical confidence interval, which information can be used in downstream processing. More sophisticated reconstruction algorithms can use the confidence interval information selectively, to generate higher fidelity images with higher confidence information, and to improve statistics in dynamic imaging with lower confidence information. | 2011-01-13 |
20110010487 | Health Reporting From Non-Volatile Block Storage Device to Processing Device - Methods and devices are provided for adapting an I/O pattern, with respect to a processing device using a non-volatile block storage device based on feedback from the non-volatile block storage device. The feedback may include information indicating a status of the non-volatile block storage device. In response to receiving the feedback, a storage subsystem, included in an operating system executing on processing device, may change a behavior with respect to the non-volatile block storage device in order to avoid, or reduce, a negative impact to the non-volatile block storage device or to enhance an aspect of the non-volatile block storage device. The feedback may include performance information and/or operating environmental information of the non-volatile block storage device. When the non-volatile block storage device is not capable of providing the feedback, the processing device may request information about the non-volatile block storage device from a database service. | 2011-01-13 |
20110010488 | SOLID STATE DRIVE DATA STORAGE SYSTEM AND METHOD - The present disclosure relates to a data storage system and method that includes at least two solid state devices that can be classified in at least two different efficiency levels, wherein data progression is used to allocate data to the most cost-appropriate device according to the nature of the data. | 2011-01-13 |
20110010489 | LOGICAL BLOCK MANAGEMENT METHOD FOR A FLASH MEMORY AND CONTROL CIRCUIT STORAGE SYSTEM USING THE SAME - A logical block management method for managing a plurality of logical blocks of a flash memory device is provided. The logical block management method includes providing a flash memory controller, grouping the logical blocks into a plurality of logical zones, wherein each logical block maps to one of the logical zones. The logical block management method also includes counting a use count value for each logical block, and dynamically adjusting mapping relations between the logical blocks and the logical zones according to the use count values. Accordingly, the logical block management method can effectively utilizing the logical zones to determine usage patterns of the logical blocks and use different mechanisms to write data, so as to increase the performance of the flash memory storage device. | 2011-01-13 |
20110010490 | SOLID STATE DRIVE AND RELATED METHOD OF OPERATION - A solid state drive (SSD) comprises an input/output interface and a memory controller. The input/output interface stores a plurality of input/output commands. The memory controller comprises first and second input/output contexts and an input/output scheduler. The first and second input/output contexts process input/output commands from the input/output interface in an alternating sequence. The input/output scheduler schedules operations of the first and second input/output contexts. In particular, the input/output scheduler suspends execution of a first input/output command by the first input/output context upon determining that an execution time of the first input/output command exceeds an interval before a deadline time. After suspending execution of the first input/output command, the input/output scheduler transmits a second input/output command to the second input/output context. | 2011-01-13 |
20110010491 | DATA STORAGE DEVICE - A data storage device comprising: at least two flash devices for storing data; a circuit board, wherein each of the flash devices are integrated on the circuit board; a controller integrated on the circuit board for reading and writing to each flash devices, wherein the controller interfaces each flash devices; at least one NOR Flash device in communication with the controller through a host bus; at least one host bus memory device in communication with the controller and at least one NOR Flash device through the host bus; at least one interface in communication with the controller and adapted to physically and electrically couple to a system, receive and store data therefrom and retrieve and transmit data to the system. | 2011-01-13 |
20110010492 | Data Protection for Non-Volatile Semiconductor Memory Using Block Protection Flags - Receiving a request for canceling setting, a control circuit erases data stored in a corresponding block, changes a value of a protection flag, and cancels protection setting. When an overall protection is set for any block, the control circuit prohibits access to all blocks, except when it is an operation mode for activating a memory program contained in the microcomputer. Further, control circuit permits an access to a block M only when partial protection is set, CPU is in the mode for activating a memory program contained in the microcomputer and the access is for reading an instruction code in accordance with an instruction fetch. | 2011-01-13 |
20110010493 | NONVOLATILE STORAGE GATE, OPERATION METHOD FOR THE SAME, AND NONVOLATILE STORAGE GATE EMBEDDED LOGIC CIRCUIT, AND OPERATION METHOD FOR THE SAME - Provided is a nonvolatile storage gate embedded logic circuit embedding a nonvolatile storage gate which can hold data after power supply cutoff and can cut off a power supply at the same time shifting into a standby state. The nonvolatile storage gate embedded logic circuit includes a logic calculation unit having a logic gate, and a nonvolatile storage gate having a nonvolatile storage element, a data interface control unit disposed so as to be adjoining to the nonvolatile storage element, and receiving a nonvolatile storage control signal for data read-out from the nonvolatile storage element and data write-in to the nonvolatile storage element, and a volatile storage element disposed so as to be adjoining to the nonvolatile storage element, receiving a data input signal and a clock signal, and outputting a data output signal. | 2011-01-13 |
20110010494 | MEMORY CONTROL CIRCUIT AND MEMORY CONTROL METHOD - The memory control circuit has an access count setting circuit and a DRAM access control circuit. The access count setting circuit receives a minimum activation interval time for different rows in the same bank of the SDRAM, an operating speed, and the number of banks, and calculates an optimal number of readings or writings to each bank. The DRAM access control circuit generates a command sequence and an address for reading or writing a image signal to the SDRAM. | 2011-01-13 |
20110010495 | AUTONOMIC RECLAMATION PROCESSING ON SEQUENTIAL STORAGE MEDIA - Various embodiments for autonomic reclamation of data stored on at least one sequential storage media are provided. In one exemplary embodiment, active data stored on the at least one sequential storage media is identified. The active data is read out from a reclamation memory. The active data is stored in a sequential order by starting at a beginning block address of the at least one sequential storage media. | 2011-01-13 |
20110010496 | METHOD FOR MANAGEMENT OF DATA OBJECTS - A method and system for management of data objects on a variety of storage media, wherein a storage control module is allocated to each of the storage media, wherein a file system is provided that communicates with each of the storage control modules, wherein the storage control module obtains information about the storage medium, the information including, at a minimum, a latency, a bandwidth, the number of possible parallel read/write accesses, or information on occupied and free storage blocks on the storage medium, wherein all information about the allocated storage medium is forwarded to the file system by the storage control module. | 2011-01-13 |
20110010497 | A STORAGE DEVICE RECEIVING COMMANDS AND DATA REGARDLESS OF A HOST - A storage device includes an input device for receiving data and commands directly from a user, without the storage device reporting to or notifying of the storage device activities that result from the received data and received commands. The user may visually-code the commands for the storage device, or s/he may transfer the commands to the storage device as voice commands or as vibration-induced commands. A command transferred by the user to the storage device specifies to the storage device a set of one or more digital contents that are (to be) stored in the storage device, and an operation that is to be performed on the set of one or more digital contents. A command may instruct the storage device to irreversibly caption a set of one or more digital photos by using a caption picture or caption data, or to associate a voice tag to these digital photos. | 2011-01-13 |
20110010498 | Providing preferred seed data for seeding a data deduplicating storage system - There is disclosed a computer system operable to process a plurality of logical storage unit manifests the manifests comprising respective pluralities of chunk identifiers identifying data chunks in a deduplicated data chunk store The computer system can determine at least one preferred manifest or preferred combination of manifests according to levels of duplication of the chunk identifiers within respective said manifests, and/or within respective combinations of said manifests. The computer system can provide preferred seed data corresponding to data chunks identified by the at least one preferred manifest or preferred combination of manifests. A method and computer readable medium are also disclosed. At least some embodiments facilitate timely and convenient transfer and storage of relevant data chunks to a receiving deduplicated data chunk store of a data storage system. | 2011-01-13 |
20110010499 | STORAGE SYSTEM, METHOD OF CONTROLLING STORAGE SYSTEM, AND METHOD OF CONTROLLING CONTROL APPARATUS - A storage system including a storage, has a first power supplier for supplying electronic power, a second power supplier for supplying electronic power when the first power supplier not supplying electronic power to the storage system, a cache memory for storing data sent out from a host, a non-volatile memory for storing data stored in the cache memory, and a controller for writing the data stored in the cache memory into the non-volatile memory when the second supplier supplying electronic power to the storage system, for stopping the writing and for deleting data stored in the non-volatile memory so until a free space volume of the non-volatile memory being not less than a volume of the data stored in the cache memory when the first supplier restoring electronic power to the storage system. | 2011-01-13 |
20110010500 | Novel Context Instruction Cache Architecture for a Digital Signal Processor - Improved thrashing aware and self configuring cache architectures that reduce cache thrashing without increasing cache size or degrading cache hit access time, for a DSP. In one example embodiment, this is accomplished by selectively caching only the instructions having a higher probability of recurrence to considerably reduce cache thrashing. | 2011-01-13 |
20110010501 | EFFICIENT DATA PREFETCHING IN THE PRESENCE OF LOAD HITS - A BIU prioritizes L1 requests above L2 requests. The L2 generates a first request to the BIU and detects the generation of a snoop request and L1 request to the same cache line. The L2 determines whether a bus transaction to fulfill the first request may be retried and, if so, generates a miss, and otherwise generates a hit. Alternatively, the L2 detects the L1 generated a request to the L2 for the same line and responsively requests the BIU to refrain from performing a transaction on the bus to fulfill the first request if the BIU has not yet been granted the bus. Alternatively, a prefetch cache and the L2 allow the same line to be simultaneously present. If an L1 request hits in both the L2 and in the prefetch cache, the prefetch cache invalidates its copy of the line and the L2 provides the line to the L1. | 2011-01-13 |
20110010502 | Cache Implementing Multiple Replacement Policies - In an embodiment, a cache stores tags for cache blocks stored in the cache. Each tag may include an indication identifying which of two or more replacement policies supported by the cache is in use for the corresponding cache block, and a replacement record indicating the status of the corresponding cache block in the replacement policy. Requests may include a replacement attribute that identifies the desired replacement policy for the cache block accessed by the request. If the request is a miss in the cache, a cache block storage location may be allocated to store the corresponding cache block. The tag associated with the cache block storage location may be updated to include the indication of the desired replacement policy, and the cache may manage the block in accordance with the policy. For example, in an embodiment, the cache may support both an LRR and an LRU policy. | 2011-01-13 |
20110010503 | CACHE MEMORY - A cache memory for operating in accordance with a multi-way set associative system, the cache memory includes an identification information storage for storing an identification information for identifying a requesting element of a memory access request corresponding to a cache block specified by a received memory access request, a replacement cache block candidate determinator for determining, upon an occurrence of a cache miss corresponding to the memory access request, a candidate of the cache block for replacing, on the basis of the identification information attached to the memory access request and the identification information stored in the identification information storage corresponding to the cache block specified by the memory access request, and a replacement cache block selector for selecting a replacement cache block from the candidate. | 2011-01-13 |
20110010504 | Combined Transparent/Non-Transparent Cache - In one embodiment, a memory that is delineated into transparent and non-transparent portions. The transparent portion may be controlled by a control unit coupled to the memory, along with a corresponding tag memory. The non-transparent portion may be software controlled by directly accessing the non-transparent portion via an input address. In an embodiment, the memory may include a decoder configured to decode the address and select a location in either the transparent or non-transparent portion. Each request may include a non-transparent attribute identifying the request as either transparent or non-transparent. In an embodiment, the size of the transparent portion may be programmable. Based on the non-transparent attribute indicating transparent, the decoder may selectively mask bits of the address based on the size to ensure that the decoder only selects a location in the transparent portion. | 2011-01-13 |
20110010505 | RESOURCE MANAGEMENT CACHE TO MANAGE RENDITIONS - A resource management cache of a computing device receives a request for an item. The item may include any type of content, such as an image or a video. A rendition for the item is determined. The item may be stored in a plurality of renditions for retrieval. The resource management cache can send one or more requests to one or more sources for the rendition. The sources may include remote sources and also a local source. If a source responds with an indication the rendition is available, the rendition is sent to and received at the computing device. If no sources respond with an indication the rendition is available, the resource management cache may send a message asking if a source can generate the rendition from another rendition of the item. The rendition may be generated and it is sent to and received at the resource management cache. | 2011-01-13 |
20110010506 | DATA PREFETCHER WITH MULTI-LEVEL TABLE FOR PREDICTING STRIDE PATTERNS - A data prefetcher includes a table of entries to maintain a history of load operations. Each entry stores a tag and a corresponding next stride. The tag comprises a concatenation of first and second strides. The next stride comprises the first stride. The first stride comprises a first cache line address subtracted from a second cache line address. The second stride comprises the second cache line address subtracted from a third cache line address. The first, second and third cache line addresses each comprise a memory address of a cache line implicated by respective first, second and third temporally preceding load operations. Control logic calculates a current stride by subtracting a previous cache line address from a new load cache line address, looks up in the table a concatenation of a previous stride and the current stride, and prefetches a cache line using the hitting table entry next stride. | 2011-01-13 |
20110010507 | HOST MEMORY INTERFACE FOR A PARALLEL PROCESSOR - A memory interface for a parallel processor which has an array of processing elements and can receive a memory address and supply the memory address to a memory connected to the processing elements. The processing elements transfer data to and from the memory at the memory address. The memory interface can connect to a host configured to access data in a conventional SDRAM memory device so that the host can access data in the memory. | 2011-01-13 |
20110010508 | Memory system and information processing device - A memory system includes a first memory that is used as a main memory of a target device, a second memory that has an access speed lower than that of the first memory, a securing section that secures a predetermined area of the first memory as a temporary storage area of the second memory, and a memory control section that receives an instruction to write data into the second memory, temporarily stores the data into the first memory and also transfers the stored data from the first memory to the second memory. | 2011-01-13 |
20110010509 | SYSTEM AND METHOD OF SORTING AND CALCULATING STATISTICS ON LARGE DATA SETS WITH A KNOWN VALUE RANGE - A system for sorting data and calculating statistics on large data sets with a known value range includes a memory element and a processing element configured to execute steps of the methods. Methods for sorting data include establishing an array of counters such that each counter corresponds to a value in the data set, reading the numbers and incrementing the counter corresponding to the value of each number, and listing the values in sequential order wherein each value occurs in the list according to the count of the corresponding counter. Methods for calculating statistics utilize the count stored in each counter from the sorted data and the value that corresponds thereto. | 2011-01-13 |
20110010510 | Method for updating a program section - A method for updating a program section is disclosed; the method is used for an electronic system. The electronic system comprises a control unit and a storage device; the control unit is electrically connected with the storage device; the storage device comprises a program section; the program section comprises an application section and a boot section; the application section comprises a first bootloader and application information, wherein the first bootloader comprises a first driver. The method comprises the following steps of: connecting a data source device, wherein the data source device comprises update data; determining whether the first driver is able to drive the data source device or not; and if the first driver is able to drive the data source device, the first driver performs an updating procedure according to the update data. | 2011-01-13 |
20110010511 | INTERLEAVE CONTROL DEVICE, INTERLEAVE CONTROL METHOD, AND MEMORY SYSTEM - According to one embodiment, an interleave control device of a memory system includes a memory divided into sections, and a data bus used, in common, for data transfers for the sections, the device comprises a detector and a start module. The detector is configured to detect a transfer of data of a predetermined size during a transfer of data on the data bus to be written to a certain section of the memory or data read from the section. The start module is configured to start a transfer of interleave control data in place of the data to be written or the read data when the detector detects the transfer of the data of the predetermined size. | 2011-01-13 |
20110010512 | METHOD FOR CONTROLLING STORAGE SYSTEM HAVING MULTIPLE NON-VOLATILE MEMORY UNITS AND STORAGE SYSTEM USING THE SAME - A method for controlling a storage system and the storage system using this method are disclosed. In the storage system, at least two memory units share an I/O bus. The shared I/O bus transfers information for each memory unit to execute an operation. The operation has at least one high priority cycle and at least one low priority cycle. When a low priority cycle is overlapped with a high priority cycle, the low priority cycle is suspended, and the high priority cycle is operated first. After the high priority cycle is finished, the suspended low priority cycle is then resumed. By doing so, the shared I/O bus may be used by one memory unit during a busy cycle for another memory unit, during which the latter memory unit does not use the I/O bus. Therefore, the I/O bus can be more efficiently used. | 2011-01-13 |
20110010513 | STORAGE MANAGEMENT SYSTEM FOR PRESERVING CONSISTENCY OF REMOTE COPY DATA - A storage control system adapted to operate as a remote copy pair by communicating between a primary and a secondary of the remote copy pair comprises: a selector for selecting writes to be placed in a batch based on one or more criteria; a sequence number requester for requesting a sequence number for the batch; a sequence number granter for granting a sequence number for the batch; a batch transmitter for transmitting the batch to the secondary; a permission receiver for receiving a permission to write the batch from the secondary; and a write component responsive to the permission receiver to write the batch to completion; wherein the secondary is responsive to the completion to grant a further permission to write for a further batch. | 2011-01-13 |
20110010514 | Adjusting Location of Tiered Storage Residence Based on Usage Patterns - Mechanisms for managing data segments in a tiered storage system are provided. The mechanisms maintain at least one counter for each data segment in the tiered storage system. Each counter in the at least one counter counts a number of access operations to a corresponding data segment for a predetermined time interval. The mechanisms further perform one or more analytical operations based on one or more values of the at least one counter for each data segment to make residence determinations for each data segment. The mechanisms also adjust a storage location of one or more data segments in tiers of the tiered storage system to thereby move the one or more data segments to appropriate tiers of the tiered storage system based on results of the one or more analytical operations. | 2011-01-13 |
20110010515 | BACKUP OF VIRTUAL MACHINES USING CLONED VIRTUAL MACHINES - A system and method for creating a backup of a virtual machine running on a host computer is described herein. The system and method operate by creating a copy or “clone” of a virtual machine running on a first host computer on a second host machine connected thereto. After generation of the clone, a backup of the virtual hard disk of the clone can be obtained in a manner that does not consume any resources of the first host machine. The backup of the virtual hard disk of the clone can then be used as the backup of the original virtual machine. | 2011-01-13 |
20110010516 | METHOD FOR CONTROLLING ACCESS TO A DATA FILE OF AN IC CARD - A method is for controlling access to a data file of an IC card and may include storing a plurality of access conditions to be evaluated for accessing the data file, and enabling access to the file if the access conditions are satisfied. The method may further include ordering the access conditions to be evaluated in a Reverse Polish Notation inside a memory queue of the IC card, and evaluating the access conditions starting from a head of the memory queue. | 2011-01-13 |
20110010517 | ELECTRONIC DEVICE, PASSWORD DELETION METHOD, AND PROGRAM - An electronic device that can automatically unlock an external storage device with a password without adding a function to the external storage device is provided. An electronic device | 2011-01-13 |
20110010518 | Systems and Methods for Migrating Components in a Hierarchical Storage Network - System and methods for selectively or automatically migrating resources between storage operation cells are provided. In accordance with one aspect of the invention, a management component within the storage operation system may monitor system operation and migrate components from storage operation cell to another to facilitate failover recovery, promote load balancing within the system and improve overall system performance as further described herein. Another aspect of the invention may involve performing certain predictive analyses on system operation to reveal trends and tendencies within the system. Such information may be used as the basis for potentially migrating components from one storage operation cell to another to improve system performance and reduce or eliminate resource exhaustion or congestion conditions. | 2011-01-13 |
20110010519 | MEMORY MANAGEMENT FOR A MOBILE MULTIMEDIA PROCESSOR - Certain embodiments of the invention may be found in a method for memory management for a mobile multimedia processor. The method may comprise receiving within a mobile multimedia processor chip a plurality of memory requests, and setting a priority level for each of the plurality of received memory requests. Memory from one or both of at least one on-chip memory block and at least one off-chip memory block may be allocated, and one or more of the plurality of received memory requests may be handled, using the allocated memory, based on a corresponding set priority level and at least one dynamically settable memory allocation priority threshold. The priority level may be set based on an expected number of memory accesses and/or a total number of memory accesses per unit time. The off-chip memory block may be placed into a power-saving mode. | 2011-01-13 |
20110010520 | Block-Based Non-Transparent Cache - In an embodiment, a non-transparent memory unit is provided which includes a non-transparent memory and a control circuit. The control circuit may manage the non-transparent memory as a set of non-transparent memory blocks. Software executing on one or more processors may request a non-transparent memory block in which to process data. The control circuit may allocate a first block, and may return an address (or other indication) of the allocated block so that the software can access the block. The control circuit may also provide automatic data movement between the non-transparent memory and a main memory system to which the non-transparent memory unit is coupled. For example, the automatic data movement may include filling data from the main memory system to the allocated block, or flushing the data in the allocated block to the main memory system after the processing of the allocated block is complete. | 2011-01-13 |
20110010521 | TLB Prefetching - In an embodiment, a memory management unit (MMU) is configured to retain a block of data that includes multiple page table entries. The MMU is configured to check the block in response to TLB misses, and to supply a translation from the block if the translation is found in the block without generating a memory read for the translation. In some embodiments, the MMU may also maintain a history of the TLB misses that have used translations from the block, and may generate a prefetch of a second block based on the history. For example, the history may be a list of the most recently used Q page table entries, and the history may show a pattern of access that are nearing an end of the block. In another embodiment, the history may comprise a count of the number of page table entries in the block that have been used. | 2011-01-13 |
20110010522 | MULTIPROCESSOR COMMUNICATION PROTOCOL BRIDGE BETWEEN SCALAR AND VECTOR COMPUTE NODES - A multiprocessor computer system includes a plurality of processor nodes coupled by a direct processor interconnect network, and a plurality of processor nodes coupled by an indirect processor interconnect network. A bridge directly couples the direct processor interconnect network and the indirect processor interconnect network. | 2011-01-13 |
20110010523 | RUNTIME CONFIGURABLE ARITHMETIC AND LOGIC CELL - A cascadable arithmetic and logic unit (ALU) which is configurable in function and interconnection. No decoding of commands is needed during execution of the algorithm. The ALU can be reconfigured at run time without any effect on surrounding ALUs, processing units or data streams. The volume of configuration data is very small, which has positive effects on the space required and the configuration speed. Broadcasting is supported through the internal bus systems in order to distribute large volumes of data rapidly and efficiently. The ALU is equipped with a power-saving mode to shut down power consumption completely. There is also a clock rate divider which makes it possible to operate the ALU at a slower clock rate. Special mechanisms are available for feedback on the internal states to the external controllers. | 2011-01-13 |
20110010524 | SIMD PROCESSOR ARRAY SYSTEM AND DATA TRANSFER METHOD THEREOF - There is provided an SIMD processor array system in which data can be efficiently transferred between processor elements located at different distances. The SIMD processor array system includes a control processor (CP) that is capable of issuing a plurality of instructions at the same time, and a PE array that includes a plurality of mutually-connected processing elements (PEs) to be controlled by the CP. The CP issues an inter-PE data shift instruction to each PE. According to the inter-PE data shift instruction, each PE performs a data sending operation of copying all the contents of a transfer data storing part of an adjoining PE to a transfer data storing part (MBF) of the own PE, and a data fetch operation of copying part or all of the contents of the MBF of the adjoining PE to a transfer data fetch and storing part (RBUF) of the own PE if part of the contents the MBF of the adjoining PE coincide with the contents of an ID storing part (IDB) of the own PE. | 2011-01-13 |
20110010525 | On-chip and Chip-to-chip Routing Using a Processor Element/Router Combination - A system and method is shown for on-chip and chip-to-chip routing. The system and method includes a processor element residing on a processor die to process a data packet received at the processor die. The system and method also include a router residing on the process die to route the data packet received at the processor die. Further, the system and method includes a switch core residing on the processor die to switch a communication channel along which the data packet is to be transmitted. Additionally, the system and method includes a switch core to identify a destination processing element and router (PE/R) module for a data packet, the switch core and the destination PE/R module residing on a common processor die. Moreover, the system and method includes a communication channel to operatively connect the switch core and the destination PE/R module on the common processor die. | 2011-01-13 |
20110010526 | CONTROL APPARATUS FOR FAST INTER PROCESSING UNIT DATA EXCHANGE IN AN ARCHITECTURE WITH PROCESSING UNITS OF DIFFERENT BANDWIDTH CONNECTION TO A PIPELINED RING BUS - Nowadays, many architectures have processing units with different bandwidth requirements which are connected over a pipelined ring bus. The proposed invention can optimize the data transfer for the case where processing units with lower bandwidth requirements can be grouped and controlled together for a data transfer, so that the available bus bandwidth can be optimally utilized. | 2011-01-13 |
20110010527 | PROCESSOR FOR EXECUTING INSTRUCTION STREAM AT LOW COST, METHOD FOR THE EXECUTION, AND PROGRAM FOR THE EXECUTION - A VLIW processor executes a very long instruction word containing a plurality of instructions, and executes a plurality of instruction streams at low cost. A processor executing a very long instruction word containing a plurality of instructions fetches concurrently the very long instruction words of up to M instruction streams, from N instruction caches including a plurality of memory banks to store the very long instruction words of the M instruction streams. The processor may set instruction priority order for each of the instruction streams, designate a memory bank to be used by each of the instruction streams from the memory banks based on bank number information, which indicates a number of memory banks each instruction stream uses, and an instruction address of each of the instruction streams, determine a memory bank to be used in descending priority order based on the instruction stream priority order when a plurality of instruction streams are to use a same memory bank, and supply an instruction | 2011-01-13 |
20110010528 | INFORMATION PROCESSING DEVICE AND VECTOR INFORMATION PROCESSING DEVICE - An information processing device implements a register renaming scheme for managing physical registers (e.g. hardware registers HR) coordinated with logical registers (e.g. software usable registers SUR) in conjunction with a renaming table. A first dedicated instruction is incorporated into an instruction set so that a free physical register is coordinated with a logical register designated by the first dedicated instruction. Alternatively, a second dedicated instruction is incorporated into the instruction set so that a physical register coordinated with a logical register designated by the second dedicated instruction is released to be free. In addition, the optimization is performed to change the number of software usable registers (SUR) and the number of renaming registers (RR) within the physical registers in conformity with the software executing the instruction set. Thus, it is possible to prevent the occurrence of an unwanted memory access instruction and dead time needed for releasing registers. | 2011-01-13 |
20110010529 | INSTRUCTION EXECUTION CONTROL METHOD, INSTRUCTION FORMAT, AND PROCESSOR - With conventional ordered data reference instructions, an instruction which is to be the subject of an execution order guarantee cannot be separately specified, and a resource which is to be the subject of an execution order guarantee likewise cannot be specified and thus instruction movement is restricted more than necessary in the out-of-order execution of instructions and so on and performance deterioration becomes significant particularly in the case of performing data transfer to a resource having high access latency. Consequently, the field of an ordered data reference instruction judged to include a predetermined field is decoded so as to identify a subject instruction which is specified by the ordered data reference instruction and is the subject of execution order guarantee, and guarantee the execution order of the subject instruction with respect to the execution of the identified ordered data reference instruction. | 2011-01-13 |
20110010530 | MICROPROCESSOR WITH INTEROPERABILITY BETWEEN SERVICE PROCESSOR AND MICROCODE-BASED DEBUGGER - A microprocessor integrated circuit includes first and second processors, an internal memory accessible by the first and second processors, and a bus interface unit configured to interface to a bus external to the microprocessor for providing access to a memory external to the microprocessor. The bus interface unit, external bus, and external memory are accessible by the second processor but are inaccessible by the first processor. The first processor writes debug information to the internal memory. The first processor detects an event and provides a notification of the event to the second processor. The second processor, coupled to the bus interface unit, executes microcode in response to the event notification received from the first processor. The microcode reads the debug information from the internal memory and writes the debug information to the external memory via the bus interface unit and external bus for use in debugging the second processor. | 2011-01-13 |
20110010531 | DEBUGGABLE MICROPROCESSOR - A microprocessor integrated circuit includes first and second processors. The first processor is configured to detect that the second processor has not retired an instruction for a predetermined amount of clock cycles and to responsively reset the second processor. The microprocessor integrated circuit also includes microcode. The second processor is configured to execute the microcode in response to a reset of the second processor. The microcode is configured to read debug information within the microprocessor integrated circuit and to output the debug information external to the microprocessor integrated circuit in response to determining that the reset was performed by the first processor. | 2011-01-13 |
20110010532 | BOOTING METHOD AND COMPUTER SYSTEM USING THE BOOTING METHOD - A booting method adaptable to a computer system having a processor, a memory and a bootable medium, wherein the bootable medium has an operating system, the booting method comprises the steps of activating a basic input/output system (BIOS); reserving a reserved area in the memory according to a setting of a setting space; copying the operating system from the bootable medium to the reserved area as an operating system copy; and activating the operating system copy from the reserved area. | 2011-01-13 |
20110010533 | System and Method for Component Trust Model in Peer-to-Peer Service Composition - A system is provided for composition trust binding in a peer-to-peer network environment. The system includes: a service requestor ( | 2011-01-13 |
20110010534 | SYSTEM AND METHOD OF SHARING WEB PAGE THAT REPRESENTS HEALTH INFORMATION - A method of displaying health information of a user, the method including: monitoring if a sharing request for a health information of a user is made by an external device, which provides a web page representing the health information of the user in the form of an image; downloading a captured image of the web page from the external device if the sharing request for the health information of the user is made; and displaying the downloaded captured image. | 2011-01-13 |
20110010535 | MULTI-MEDIA DIGITAL CARTRIDGE STORAGE AND PLAYBACK UNITS BACKGROUND OF THE INVENTION - A method and apparatus for playing back a digital media file. The invention comprises defining a plurality of predetermined media types based upon an advertising scheme associated therewith, and valuing each of the plurality of predetermined media types in accordance with the advertising scheme. Then, one of the plurality of media types is selected and played back, thus invoking the associated advertising scheme. | 2011-01-13 |
20110010536 | OPTIMIZING ENCRYPTED WIDE AREA NETWORK TRAFFIC - Optimization of encrypted traffic flowing over a WAN is provided by an arrangement in which WAN compression is distributed between endpoints (i.e., client machines or servers) in a subnet of a hub and branch network and a WAN compression server in the subnet. A client portion of the WAN compression running on each of one or more endpoints interfaces with a disposable local cache of data seen by endpoints in the subnet that is used for compressing and decompressing traffic using dictionary-based compression techniques. The local WAN compression server in a subnet stores a shared central database of all the WAN traffic in the subnet which is used to populate local disposable caches in the endpoints. | 2011-01-13 |
20110010537 | DATA RECORDING DEVICE, DATA RECORDING METHOD USING SAME, AND DATA RECORD CONTROLLING COMPUTER PROGRAM - A data recording device is provided to record and redistribute stream data such as TV programs without imposing loads proportional to the number of users. Stream data of a distributed program is collated by a recording range judging section | 2011-01-13 |
20110010538 | METHOD AND SYSTEM FOR PROVIDING AN ACCESS SPECIFIC KEY - An access specific key is provided for securing of a data transfer between a mobile terminal and a node of an access net. For authentication of the mobile terminal, a authentication server generates a session key, from which a basic key is derived and transferred to an interworking-proxy-server. The interworking-proxy-server derives the access specific key from the transferred basis key and provides the key to the node of the access net. | 2011-01-13 |
20110010539 | Methods And Apparatus For Maintaining Secure Connections In A Wireless Communication Network - In one illustrative example, a method in a mobile communication device operating in a wireless local area network (WLAN) involves performing, via a wireless AP of the WLAN, a first authentication procedure with an authentication server for obtaining a first session key and a key lifetime value associated with the first session key; establishing a first secure connection with the wireless AP based on the first session key; setting a timer with an initial value that is less than or equal to the key lifetime value, and running the timer; communicating in a media session over the first secure connection with the wireless AP; and in response to an expiration of the timer during the media session: performing, during the media session, a second authentication procedure with the authentication server for obtaining a second session key; and establishing, during the media session, a second secure connection with the wireless AP using the second session key; and communicating in the media session over the second secure connection with the wireless AP. In another illustrative example, the method involves performing the second authentication procedure with the authentication server in response to identifying a request for establishing the media session, just prior to establishing the media session. | 2011-01-13 |
20110010540 | Method for Providing Information Security for Wireless Transmissions - A wireless communication system includes a pager or similar device that communicates to a home terminal. The home terminal confirms the identity of the pager and attaches a certificate to the message for ongoing transmission. Where the recipient is also a pager, an associated home terminal verifies the transmission and forwards it in a trusted manner without the certificate to the recipient. | 2011-01-13 |
20110010541 | Interoperable keychest for use by service providers - There is provided a system and method for distributors to use an interoperable key chest. There is provided a method for use by a distributor to obtain content access authorizations from a key chest or central key repository (CKR), the method comprising receiving a user request from a user device for access to an encrypted content identified by a content identification, transmitting a key request to the CKR including the content identification, receiving an encrypted first key from the CKR, decrypting the encrypted first key using a second key to retrieve the first key, and providing a DRM license for the encrypted content to the user device using the first key for use by the user device to decrypt the encrypted content using the first key. By generating such DRM licenses, distributors can unlock protected content even sourced from distributors using different DRM schemas. | 2011-01-13 |
20110010542 | METHOD AND APPARATUS FOR COMMUNICATION, AND METHOD AND APPARATUS FOR CONTROLLING COMMUNICATION - Method and apparatus for communication between client and service provider using external server, and a method and apparatus for controlling communication between a client and a service provider are provided. The method includes: receiving from the service provider a first authentication token indicating that the service provider has authenticated communication with the client by logging on the service provider; storing, in the external server, authentication information containing the first authentication token and additional information relating to communication with the service provider; receiving, when there is a request to access the service provider, authentication information corresponding to the request from the external server; and communicating with the service provider using the received authentication information. It is possible to alleviate the burden on a user to enter his or her ID and password, and to remove necessity for a user to enter the ID and password after registration has been performed once. | 2011-01-13 |
20110010543 | PLATFORM VALIDATION AND MANAGEMENT OF WIRELESS DEVICES - Methods, components and apparatus for implementing platform validation and management (PVM) are disclosed. PVM provides the functionality and operations of a platform validation entity with remote management of devices by device management components and systems such as a home node-B management system or component. Example PVM operations bring devices into a secure target state before allowing connectivity and access to a core network. | 2011-01-13 |
20110010544 | PROCESS DISTRIBUTION SYSTEM, AUTHENTICATION SERVER, DISTRIBUTION SERVER, AND PROCESS DISTRIBUTION METHOD - In an authentication server performing an authentication process to authenticate a user using a terminal with the terminal by means of a TLS authentication in tunnel using a TLS parameter having preliminarily been acquired, user identification information and the TLS parameter are included in a transfer request signal, and transmitted to a distribution server, when user identification information transmitted from the terminal does not exist in an authentication database. A search is conducted in a distribution server database for authentication server identification information associated with the user identification information included in the transfer request signal. The user identification information and the TLS parameter are transmitted to the authentication server assigned with the authentication server identification information that has been searched for. | 2011-01-13 |
20110010545 | PROCESSING RECORDABLE CONTENT IN A STREAM - Methods and a systems are described for processing recordable content in a broadcast stream sent to a receiver, wherein said broadcast stream is protected in accordance with a conditional access system and wherein said receiver is configured for storing and consuming content in said broadcast stream in accordance with a digital rights management system. In this methods and systems recording information is sent in one or more entitlement control messages over a broadcast network to a receiver. Using the recording information in the entitlement control messages the receiver is able to store recordable events in a broadcast stream on a storage medium and to consume said recorded events in accordance with a digital rights management system. | 2011-01-13 |
20110010546 | INFORMATION PROCESSING APPARATUS AND METHOD, RECORDING MEDIUM AND PROGRAM - The present invention relates to an information processing apparatus allowing proper communication with a communication partner in accordance with a communication time of the communication partner. | 2011-01-13 |
20110010547 | SERVER AUTHENTICATION SYSTEM, SERVER AUTHENTICATION METHOD, AND PROGRAM FOR SERVER AUTHENTICATION - In order to complete an authentication process in shorter time in a case where there is a large number of clients which concurrently authenticate a server, the server in a server authentication system includes an address key allocation means for generating an identifier to identify each of the clients by a combination of addresses on a plurality of address spaces and allocating address keys to the respective addresses configuring the generated identifier, and a message authentication code generation means for generating message authentication codes corresponding to a message by using the address keys allocated by the address key allocation means. Each of the clients includes a server authentication means for authenticating the server based on the message authentication codes generated by the message authentication code generation means. | 2011-01-13 |
20110010548 | SECURE E-MAIL SYSTEM - An email system for securely sending an email message to a recipient comprising: one or more computers connected to the internet at least one of computer being suitable for receiving data identifying a recipient; a communicator for sending messages; an encryption engine configured to encrypt the email message using the encryption key to produce an encrypted email message; a computer of the one or more computers programmed to identifying an encryption key; a computer of the one or more computers programmed to identify a first contact identifier of the recipient based on data received by a computer of the one or more computers, and to determine a first address of the recipient from the first contact identifier; a computer of the one or more computers programmed to determine a second address of the recipient from data received by the input means or from the first contact identifier using a lookup table or database; wherein at least the first address is an email address and the email system is configured to send the encrypted email message to the email address of the recipient and create an encryption key message, containing the encryption key, and send to the second address of the recipient. | 2011-01-13 |
20110010549 | Efficient key management system and method - A system for providing cost effective, secure key exchange from at least one first device to at least one second device through at least one proxy server is provided. The system includes a first key exchange message from the at least one first device to the at least one second device via the at least one proxy server. A second key exchange message from the at least one second device to the at least one first device via a media stream of the Internet is required to complete the computation of the session key. A method of securing a communication system is also set forth. The method includes the steps of providing a routing device for identifying a subscriber, and providing a master key exchange session, the master key exchange session including a key k to find a subscriber and a nonce r to answer a query to the subscriber, wherein the master key exchange session includes both the key k and the nonce r. | 2011-01-13 |
20110010550 | METHOD FOR LOCKING AN APPLICATION PROGRAM - A method for locking the application program includes: when running a application program stored in a terminal, it judges whether a first unlocking key of the application program exists in the terminal; in the case that the first unlocking key does not exist, the terminal generates and stores the first unlocking key, and sends it to a device; judging whether the device has locked the application program, in the case that the result of judgment is no, proceeding to the first step, otherwise proceeding to the second step: the first step, the device locks the application program, generates a second unlocking key, and notifies the second unlocking key to a user, proceeding to the second step; the second step, performing the authentication process for the user; in the case that the first unlocking key exists in the terminal, the first unlocking key is sent to the device, judging whether the device has locked the application program or not, if not, proceeding to the third step, otherwise proceeding to the forth step; the third step, the device locks the application program, generates the second unlocking key and notifies the second unlocking key to the user, proceeding to the forth step; the forth step, performing the verification process. | 2011-01-13 |
20110010551 | SHARED ENCRYPTION KEY GENERATION VIA ACCELEROMETER DIGITIZATION - An apparatus and method for generating a shared secret between at least two wireless portable electronic devices. A shared secret is generated by holding together the at least two devices and shaking them. An acceleration of the at least two devices is measured at least during a time window beginning at a time corresponding to when a magnitude of the acceleration exceeds a predetermined threshold. The acceleration is sampled, resulting in a plurality of vectors, such that a first vector is an initial sample of the acceleration during the time window. In some embodiments, the acceleration is measured in three dimensions. Dot products are calculated between the first vector and each of a plurality of subsequent vectors, resulting in an array of scalars. At least a portion of this array is used to generate the shared secret between the at least two devices. | 2011-01-13 |
20110010552 | Authentication token with incremental key establishment capacity - The present invention relates to the field of strong authentication tokens and more specifically to methods and apparatus employing cryptographic key establishment protocols for such strong authentication tokens. | 2011-01-13 |
20110010553 | On-Line Membership Verification - A system and method of providing on-line verification of various credentials without requiring second site authentication utilizes protocols and cryptography to assure customers (generally referred to hereinafter as “users”) that they are dealing with a person (or organization) that can present multiple, non-repudiable proof of their identification. The system is launched directly from the user's browser such that certificate verification is performed “locally”, without needing to go out and obtain information from a second web site. The system is based upon the creation of a new MIME (i.e. Multipurpose Internet Mail Extensions) type that is employed by the user's browser and utilizes public keys associated with the credentialing organizations in combination with a public key of the verification organization. | 2011-01-13 |
20110010554 | METHOD AND APPARATUS FOR PROVIDING INTELLIGENT ERROR MESSAGING - A method and apparatus for providing intelligent error messaging is disclosed wherein a user of a mobile communications device is provided with descriptive error messaging information to assist the user in overcoming errors associated with the processing of electronic messages and data. For example, when the mobile device is being used to decrypt a cryptographically secured electronic message, and a problem is encountered, program logic of the device provides the user with (1) an indication of exactly what problem is preventing opening of the message, for example, a required cryptographic key is not available; (2) an indication of exactly what may be done to overcome the problem, for example, what utilities should be run on the device; and (3) exactly what data, if any, needs to be downloaded to the device, for example, what cryptographic keys should be downloaded. | 2011-01-13 |
20110010555 | Method and system for digital watermarking - A method for applying a digital watermark to a content signal is disclosed. In accordance with such a method, a watermarking key is identified. The watermarking key includes a binary sequence and information describing application of that binary sequence to the content signal. The digital watermark is then encoded within the content signal at one or more locations determined by the watermarking key. | 2011-01-13 |
20110010556 | System and Method of Secure Authentication Information Distribution - A system and method of distributing authentication information for remotely accessing a computer resource. A request for authentication information, including identity information, is received from a user of a remote device. When the user is authenticated based on the identity information, requested authentication information is retrieved and returned to the remote device. The authentication information, or information generated from the authentication information, is then used for remotely accessing the computer resource. | 2011-01-13 |
20110010557 | CONTROL MESSAGE SIGNATURE FOR DEVICE CONTROL - A method of controlling a peripheral device includes generating, in a host processor, a control message for transmission to the peripheral device, and calculating a signature for the control message. The control message and the signature are written to an address in a system memory of the host processor, and the peripheral device is notified of the address, so as to cause the device to read the control message and the signature from the system memory. | 2011-01-13 |
20110010558 | BIOMETRICS BASED IDENTIFICATION - A biometrics template matching method includes the steps of: providing a reference biometric template and a candidate biometric template, each including position data and orientation data of a respective plurality of minutiae; comparing the orientation data of each minutia from the candidate template with the orientation data of each minutia from the reference template; when the orientation data of a selected pair differ by no more than a first threshold, determining a displacement vector representative of the difference in position data of the selected pair of minutiae; determining the maximum number of displacement vectors that differ from each other by less than a second threshold; if the maximum number of displacement vectors is less than a third threshold, returning a mismatch, otherwise returning a match. | 2011-01-13 |
20110010559 | METHOD FOR ENCRYPTING DIGITAL FILE, METHOD FOR DECRYPTING DIGITAL FILE, APPARATUS FOR PROCESSING DIGITAL FILE AND APPARATUS FOR CONVERTING ENCRYPTION FORMAT - Disclosed herein are a digital file encryption method, a digital file decryption method, a digital file processing apparatus, and an encryption format conversion apparatus. The digital file encryption method includes encrypting a file using specific encryption information, storing the encrypted file in a file system, and storing the encryption information in a stream provided by the file system. Accordingly, since file lengths before and after encryption are identical to each other, an application needs not to consider a header length or perform offset correction when using an encrypted file. | 2011-01-13 |
20110010560 | Failover Procedure for Server System - A failover procedure for a computer system includes steps for routing traffic from a routing device to a first server, storing in the routing device data representing a fingerprint of the first server, receiving periodically at the routing device a status message from the first server, detecting at the routing device an invalid status message from the first server by absence of the fingerprint in a status message from the first server within a predetermined time period after last receiving a valid status message, and routing the traffic from the routing device to a second server in response to detecting the invalid status message from the first server. A redundant server system implementing the failover procedure may include servers each capable of generating its fingerprint by reading current system configuration data. | 2011-01-13 |
20110010561 | METHOD AND APPARATUS FOR CRYPTOGRAPHIC CONVERSION IN A DATA STORAGE SYSTEM - When data is encrypted and stored for a long time, encryption key(s) and/or algorithm(s) should be updated so as not to be compromised due to malicious attack. To that end, stored encrypted data is converted in the storage system with new set of cryptographic criteria. During this process, read and write requests can be serviced. | 2011-01-13 |
20110010562 | PROCESSING RECORDABLE CONTENT IN A STREAM - Methods and a systems are described for processing recordable content in a broadcast stream sent to a receiver, wherein said broadcast stream is protected in accordance with a conditional access system and wherein said receiver is configured for storing and consuming content in said broadcast stream in accordance with a digital rights management system. In this methods and systems recording information is sent in one or more entitlement control messages over a broadcast network to a receiver. Using the recording information in the entitlement control messages the receiver is able to store recordable events in a broadcast stream on a storage medium and to consume said recorded events in accordance with a digital rights management system. | 2011-01-13 |
20110010563 | METHOD AND APPARATUS FOR ANONYMOUS DATA PROCESSING - A system, a method and a computer readable medium for anonymizing collected data associated with one or more data owners is provided. An identifier is received and a hash process is performed using the identifier and a cryptographic salt to produce a hash output. The hash output is associated with an anonymous identifier. The anonymous identifier is then associated with the data. The anonymized data may then be provided to one or more third party processors for processing an analysis. | 2011-01-13 |
20110010564 | SERIALLY CONNECTED PROCESSING ELEMENTS HAVING FORWARD AND REVERSE PROCESSING TIME INTERVALS - Methods and apparatus provide a delayed clock signal to a plurality of serially connected processing elements, such as a bidirectional pipeline processor. The processing elements include forward and reverse processing paths and forward and reverse processing time intervals along the respective paths. The forward and reverse processing time intervals begin when a block of data, such as encryption data, is gated into an individual processing element for processing and terminate when the processed block of data is gated into a subsequent adjacent processing element along the respective forward or reverse processing path. A clock signal distribution circuit provides a clock signal to the plurality of processing elements such that the clock signal arrives at successive processing elements along the clock signal distribution circuit with an increasing amount of delay so that one of the forward or reverse processing time intervals is greater than the other. | 2011-01-13 |
20110010565 | APPARATUS AND METHOD FOR STORING KEY DATA, LIBRARY UNIT, AND STORAGE DEVICE - A key data recording device includes a key data recording medium section which stores key data of the encrypted data; and a reading/writing section which reads and writes the key data from and into the key data recording medium section, which sections are contained in a cartridge casing accommodatable in a library unit. When the cartridge casing is irregularly ejected from the library unit, the key data recorded in the key data recording medium section is deleted. This configuration can enhance the confidentiality of encrypted data because the key data is not leaked even when the recording medium in which key data of the encrypted data is recorded is carried away. | 2011-01-13 |
20110010566 | POWER MANAGEMENT BY SELECTIVE AUTHORIZATION OF ELEVATED POWER STATES OF COMPUTER SYSTEM HARDWARE DEVICES - Power in a computer system is managed by selectively authorizing requests by devices to operate at an elevated power state. One embodiment provides a computer system having a plurality of hardware devices interchangeably operable at mutually exclusive elevated and lower power states. The lower power states may be selected by default, and the devices independently request to operate at the elevated power state for a specified duration. A power management device, such as a baseboard management controller (BMC) or a chassis management module is configured for receiving and selectively authorizing the requests from the devices to operate at the elevated power state. The power management device subsequently revokes the authorization of the devices to operate at the elevated power state to enforce a system power limit. | 2011-01-13 |
20110010567 | AUTOMATICALLY DETERMINING OPERATING PARAMETERS OF A POWER MANAGEMENT DEVICE - Automatically determining operating parameters of a power management device is described. | 2011-01-13 |
20110010568 | Power supply apparatus and power supply control method - A main power supply and a backup power supply have the same set voltage. To prevent electrical power from being supplied from the backup power supply to a load circuit, during a normal operation, a power supply control unit gives a standby instruction to the backup power supply so that the backup power supply is on standby at a voltage lower than that of the main power supply. When an AC power supply is stopped, the backup power supply is operated at the set voltage and the main power supply is stopped. | 2011-01-13 |
20110010569 | Adaptive Flushing of Storage Data - Methods and a processing device are provided for monitoring a level of power in a power supply of a processing device and changing a data flushing policy, with respect to data to be written to a non-volatile storage device, based on a predicted amount of time until power loss. When the predicted amount of time until power loss is higher than a threshold, as defined by a flushing policy, requests from applications for data flushes of data to a non-volatile storage device may be discarded. When the predicted amount of time remaining until power loss drops below the threshold, the requests from the applications for data flushes of the data to the non-volatile storage device may be honored and the data may be flushed to the non-volatile storage device. In some embodiments, the flushing policy may define additional thresholds. | 2011-01-13 |
20110010570 | INFORMATION PROCESSING APPARATUS HAVING POWER SAVING MODE, AND CONTROL METHOD AND STORAGE MEDIUM THEREFOR - An information processing apparatus in which a first waiting time is set, if a job interval is longer than a reference time and a predetermined condition is not satisfied, and a second waiting time longer than the first waiting time is set, if a job interval is longer than the reference time and the predetermined condition is satisfied. In a case that the job interval is longer than the first reference time, a control unit causes a multi-function peripheral to shift from a normal mode to a power saving mode when the first waiting time has elapsed after a job having been processed, if the predetermined condition is not satisfied, and causes the multi-function peripheral to shift to the power saving mode when the second waiting time has elapsed after the job having been processed, if the predetermined condition is satisfied. | 2011-01-13 |
20110010571 | PRINTER TIME-OUT - A system and a method of providing a time-out for a device, such as a printer are provided. The time-out determines when the device is shifted from a higher energy to a lower energy mode, absent the arrival of another job to be processed by the device. The method includes acquiring data comprising a set of inter-arrival times for at least one device over a period of time, such as a week and, for each of a set of candidate time-outs, deriving a probability from the data that an inter-arrival time from the set of inter-arrival times is greater than the candidate time-out. A cost function is computed, based on the derived probability and a robustness term which allows adversarial action not predicted by the histogram to be taken into account. A time-out for the at least one device can then be identified for which the cost function is a minimum. | 2011-01-13 |
20110010572 | NOTEBOOK COMPUTER AND POWER-SAVING METHOD THEREOF - The infrared sensor detects whether presence of a human body within a predetermined range of a front of the notebook computer, and outputs a level signal according to the detecting result. The south bridge chip receives the level signal from the infrared sensor and outputs the level signal. The basic input/output system (BIOS) chip storages a sleep signal and a wake-up signal, and reads the level signal from the south bridge chip and selectively outputs the sleep signal or the wake-up signal according to the level signal. The memory receives the sleep signal or the wake-up signal from the BIOS chip and stores the sleep signal or the wake-up signal. The center processing unit (CPU) reads the sleep signal or the wake-up signal from the memory and controls the notebook computer to enter into a sleep state or a wake-up state. | 2011-01-13 |
20110010573 | ELECTRONIC DEVICE WITH SERIAL ATA INTERFACE AND POWER SAVING METHOD FOR SERIAL ATA BUSES - In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode. | 2011-01-13 |
20110010574 | Security device meant to be connected to a processing unit for audio/video signal and method using such a device - The invention relates to a security device intended to be connected to a processing unit for an audio/video signal. This device comprises means to decrypt an audio/video stream, an interface of the ISO 7816 type and at least one high speed serial communication interface. It is characterised in that it includes a clock frequency detection module connected to a clock input of the 7816 interface, this detection module comprising means to distinguish the input frequency according to at least two different frequency ranges, the different frequency ranges activating the different communication functions. | 2011-01-13 |