02nd week of 2011 patent applcation highlights part 19 |
Patent application number | Title | Published |
20110006770 | Method and device for measuring a sample in an NMR spectrometer using a coupling configuration with a press fit cell having a capillary envelope fastener - A method for measuring an sample in an NMR spectrometer uses a coupling configuration ( | 2011-01-13 |
20110006771 | MAGNETIC RESONANCE APPARATUS AND METHOD - Magnetic resonance apparatus, e.g. for magnetic resonance imaging, is described that includes a cooler unit and one or more radio-frequency (RF) coil assemblies. A separable thermal connection is provided between the cooler unit and the one or more RF coil assemblies. This separable thermal connection allows the one or more RF coil assemblies to be detached from the cooler unit after the one or more coil assemblies have been cooled to the required operating temperature. Each RF coil assembly can then be used for magnetic resonance imaging or the like. A plurality of different RF coil assemblies may thus be cooled by a single cooler unit. | 2011-01-13 |
20110006772 | Tri-Pod Buried Locator System - A portable self-standing electromagnetic (EM) field sensing locator system with attachments for finding and mapping buried objects such as utilities and with intuitive graphical user interface (GUI) displays. Accessories include a ground penetrating radar (GPR) system with a rotating Tx/Rx antenna assembly, a leak detection system, a multi-probe voltage mapping system, a man-portable laser-range finder system with embedded dipole beacon and other detachable accessory sensor systems are accepted for attachment to the locator system for simultaneous operation in cooperation with the basic locator system. The integration of the locator system with one or more additional devices, such as fault-finding, geophones and conductance sensors, facilitates the rapid detection and localization of many different types of buried objects. | 2011-01-13 |
20110006773 | EM-Guided Drilling Relative to an Existing Borehole - Parallel drilling systems and methods suitable for drilling wells for steam-assisted gravity drainage (SAGD). In some method embodiments, a tilted-antenna tool gathers azimuthally-sensitive electromagnetic signal measurements. Such measurements enable accurate measurement of inter-well distance and direction, thereby providing the necessary information for drilling accurately-spaced wells having reduced vulnerability to “short-circuits” that inhibit effective reservoir exploitation. In some other method embodiments, a tilted-antenna tool transmits azimuthally non-uniform signals as it rotates. The attenuation and azimuthal variation detected by one or more receivers enables accurate direction and distance determination. The transmitter and receiver antennas can in some cases be combined into a single tool, while in other cases the transmitters and receivers are placed in separate wells to increase detection range. | 2011-01-13 |
20110006774 | SUBSURFACE POSITIONING SYSTEM AND METHOD FOR MONITORING MOVEMENT UNDERGROUND - A system for monitoring movement in a subsurface environment, which may be used to determine flow dynamics within a fluid mass such as an ore body, or track subsurface persons or moving assets. A plurality of underground positioning system (UPS) elements in the subsurface environment transmit characteristic signals to a plurality of antennas, which transmit the signals to a data processing apparatus. The system thus determines changes in the positions of the UPS elements to derive an indication of the motion of the fluid mass or the locations and movement of subsurface persons or assets. | 2011-01-13 |
20110006775 | Apparatus and Method for Reducing Effects of Eccentricity in Induction Tools - In aspects, an apparatus for use in a wellbore for determining a property of an earth formation is provided. The apparatus, in one embodiment, may include a tool body including a transmitter configured to induce electromagnetic waves in an earth formation, a receiver configured to provide signals responsive to the induced electromagnetic waves, a conductive member between the transmitter and the receiver extending radially from the tool body and configured to reduce propagation of eddy currents between the transmitter and the receiver when the tool body is in a wellbore and a processor configured to process the signals provided by the receiver to determine the property of the earth formation. | 2011-01-13 |
20110006776 | METHOD OF ESTIMATING SOLID PHASE POTENTIAL - The present teachings are directed toward a machine implemented method for estimating the solid phase potentials of either positive or negative electrode of a battery. The machine implemented method includes providing battery voltage information and an estimated solid phase potential to a model coefficient updater to update a model coefficient. Battery current information is provided to a battery internal variable estimator along with the updated model coefficient so that the solid phase potentials can be determined. A multi-layer model can be utilized to determine the ion density of the electrodes. The method can be implemented on a processing device, and is particularly applicable to Li-ion batteries. | 2011-01-13 |
20110006777 | ELECTRICAL LEAK DETECTING APPARATUS FOR AN ELECTRIC VEHICLE - The present invention relates to an electrical leak detecting apparatus for an electric vehicle, which is capable of not only detecting an electrical leak generated when a vehicle body is connected to the maximum potential or minimum potential of a battery pack, but also detecting which portion of the battery pack the vehicle body is connected to when an electrical leak is generated through the connection of the vehicle body and an intermediate potential of the battery pack. The electrical leak detecting apparatus for an electric vehicle according to the present invention includes: first and second switches connected to each other in series between a maximum potential terminal and a minimum potential terminal; a detection resistor having one end connected to a common contact of the first and second switches; and first and second measured potential supply units which are connected to each other in parallel between the other end of the detection resistor and the vehicle body, and which selectively provide first and second measured potentials, of different potential, to the battery pack. | 2011-01-13 |
20110006778 | TESTER FOR TESTING OPERATIONAL RELIABILITY OF A COCKPIT OXYGEN DISTRIBUTION CIRCUIT - The present invention relates to a tester ( | 2011-01-13 |
20110006779 | FLUX-GATE LEAKAGE CURRENT SENSOR - A flux-gate leakage current sensor includes: an annular core; a coil wound around the core; a driving circuit which applies to the coil a voltage with a positive/negative symmetric rectangular wave so as to saturate a density of a magnetic flux of the coil while reversing a direction of the magnetic flux; a comparator circuit which compares a measured voltage changing according to a coil current flowing in the coil with a positive-side reference voltage and a negative-side reference voltage that are positive/negative symmetric to each other, and outputs a positive-side electric signal corresponding to a period in which the measured voltage is higher than the positive-side reference voltage and a negative-side electric signal corresponding to a period in which the measured voltage is lower than the negative-side reference voltage; and a determination circuit which compares the positive-side electric signal and the negative-side electric signal output from the comparator circuit. | 2011-01-13 |
20110006780 | ACTIVE MATRIX SUBSTRATE, DISPLAY DEVICE, METHOD FOR INSPECTING ACTIVE MATRIX SUBSTRATE, AND METHOD FOR INSPECTING DISPLAY DEVICE - Provided is an active matrix substrate having improved display quality without forming an inspection line in a terminal arrangement region for inspecting short circuit between connection lines. Scanning lines ( | 2011-01-13 |
20110006781 | INSULATION STATE DETECTOR - An insulation state detector includes a capacitor, a measurement section measuring a charging voltage of the capacitor, a measuring circuit that connects the capacitor, which is insulated from a DC power source after being charged by the DC power source, between the measurement section and a ground potential portion, a detector detecting an insulation state of a voltage boosting circuit, and a reversed-polarity measuring circuit that connects the capacitor to the measurement section and the ground potential portion with reversed polarity when a potential corresponding to a division ratio of a positive-side ground fault resistor and a negative-side ground fault resistor on a secondary side of the voltage boosting circuit exceeds a positive potential of the DC power source and the capacitor is charged with reversed polarity by a secondary-side positive potential at the time of charging of the capacitor using the positive potential of the DC power source. | 2011-01-13 |
20110006782 | INSULATION MONITORING OF SERVICING UNITS USED IN A POTROOM FOR THE PRODUCTION OF ALUMINUM BY IGNEOUS ELECTROLYSIS - A system permanently monitoring the insulation of a frame from its neighbors, comprising:
| 2011-01-13 |
20110006783 | CARD FOR SIMULATING PERIPHERAL COMPONENT INTERCONNECT LOADS - A card for simulating peripheral component interconnect (PCI) loads of a computer motherboard uses a PCI interface to be inserted into a PCI slot of the computer motherboard to receive first to third voltage signals from the computer. First to third load modules of the card receive voltage signals from the computer via the PCI interface to simulating first to third power consumption of the computer. | 2011-01-13 |
20110006784 | TEST METHOD OF MICROSTRUCTURE BODY AND MICROMACHINE - It is an object to provide a test method of a process, an electric characteristic, and a mechanical characteristic of a structure body in a micromachine without contact. A structure body including a first conductive layer, a second conductive layer provided in parallel to the first conductive layer, and a sacrifice layer or a space provided between the first conductive layer and the second conductive layer is provided; an antenna connected to the structure body is provided; electric power is supplied to the structure body wirelessly through the antenna; and an electromagnetic wave generated from the antenna is detected as a characteristic of the structure body. | 2011-01-13 |
20110006785 | ANALYZING METHOD USING A PROCESSING STRUCTURE AS A PROBE - The invention relates to a method of analyzing a material contained inside a process vessel. An electromagnetic signal is applied to an elongated processing structure inside the vessel. The propagated electromagnetic signal is detected and information about dielectric properties of the material is extracted based on the detected signal. The invention also relates to a device comprising an elongated processing structure and a use of a processing structure. | 2011-01-13 |
20110006786 | CABLE INSTALLATION USING INDUCTION - A device for use with a conduit having a first conduit end and a conduit second end, into which conduit a cable can be installed using a flow of air into the first conduit end, the device being suitable for confirming that the air is flowing out from the second conduit end. In an embodiment, the device includes a housing, means to enable connection of the device to the second conduit end, a detector arranged to detect an electrical property change, and an actuator for causing an electrical property change detectable by the detector, wherein in use, the air flowing into the device causes the detector and the actuator to move relative to each other, causing an electrical property change detectable by the detector. | 2011-01-13 |
20110006787 | DYNAMIC QUANTITY DETECTING MEMBER AND DYNAMIC QUANTITY DETECTING APPARATUS - A dynamic quantity detecting member includes: a base substrate of which a part or the whole including a contact portion is deformed in accordance with pressing of a contact object and of which an original shape is recovered when the pressing of the contact object disappears; electrodes serving as displacement electrodes of which the plurality of electrodes are fixed to a surface or inside of the base substrate and of which at least one electrode is disposed in a deformable portion (which is a region deformable and displaceable during the deformation) of the base substrate; and wirings which are connected to the electrodes. During deformation, the displacement electrodes are deformed and displaced with the deformation and displacement of the deformable portion without separation from the base substrate and without damaging conductivity. The deformation and displacement of the deformable portion are detected as a variation in capacitance between the electrodes. | 2011-01-13 |
20110006788 | OCCUPANT CLASSIFICATION SYSTEM FOR VEHICLE - The present invention features an occupant classification system for a vehicle. Preferably, the occupant classification system includes a heater located below a seat cover; and an occupant classification sensor provided above the heater to detect an occupant. Preferably, the occupant classification sensor includes two electrodes arranged in parallel to each other on one plane. | 2011-01-13 |
20110006789 | CAPACITIVE PROXIMITY DETECTION SYSTEM FOR AN APPLIANCE - A proximity detection system for an appliance is disclosed. The system includes an electrically conductive sensor for a capacitive proximity detection system, the sensor forming a part of an accessory device for the appliance; and an electrically conductive member disposed substantially opposite a location of the sensor and electrically connected to a ground potential to form a ground shield for the sensor. | 2011-01-13 |
20110006790 | APPARATUS AND METHOD FOR MEASURING WATER CONTENT AND SALT CONCENTRATION IN A MULTIPHASE FLUID FLOW - An apparatus and a method are described for measuring water content and salt concentration in a multiphase fluid flow. A capacitive sensor ( | 2011-01-13 |
20110006791 | PROBE FOR A CAPACITIVE SENSOR DEVICE AND GAP-MEASURING SYSTEM - A probe for a capacitive sensor device, and a gap measuring system using the probe, is disclosed. The probe has a probe head including a measuring element with at least one measuring and front face, a first electrically non-conductive isolator element, and a first partial element of a first shield. The measuring and front face, the first isolator element, and the first partial element of the first shield are adhesively connected to one another and configured as a multilayer, where the first isolator element is disposed between the measuring element with its measuring and front face and the first partial element. | 2011-01-13 |
20110006792 | METHOD OF ON-CHIP CURRENT MEASUREMENT AND SEMICONDUCTOR IC - A semiconductor integrated circuit is constituted to include a circuit block having a predetermined function, a power switch capable of supplying an operating power to the circuit block, and a current measuring circuit for obtaining a current flowing to the circuit block based on a voltage between terminals of the power switch in a state in which the power switch is turned on and an on-resistance of the power switch. The current flowing to the circuit block is obtained based on the voltage between terminals of the power switch in the state in which the power switch is turned on and the on-resistance of the power switch. Thus, it is possible to measure a current of the circuit block in a state in which a chip is normally operated. | 2011-01-13 |
20110006793 | OSCILLOSCOPE PROBE - Disclosed is a probe ( | 2011-01-13 |
20110006794 | METHOD AND APPARATUS FOR INTERROGATING ELECTRONIC EQUIPMENT COMPONENTS - An apparatus for interrogating an electronic circuit supported by a substrate includes a tester external to the substrate and comprising an tester transceiver. A testing circuit is supported by the substrate and connected to the electronic circuit. The testing circuit includes a processor and a testing circuit transceiver in communication with the tester transceiver for transmitting instructions from the tester to the processor and for transmitting results of an interrogation from the processor to the tester. The processor being programmed to process instructions from the tester to interrogate the electronic circuit with an interrogation corresponding to the instructions. | 2011-01-13 |
20110006795 | CONTACT PROBE DEVICE - To obtain a satisfactory contact state in an ultra high frequency range with a low loss, in a contact probe device with an electronic component connected to a mounting substrate. Insulating substrate | 2011-01-13 |
20110006796 | PROBE RETENTION ARRANGEMENT - A retention arrangement that includes one or more templates for securing and aligning probes for testing a device under test. | 2011-01-13 |
20110006797 | PROBE CARD AND TEST EQUIPMENT - Provided are a probe card including a first area group including a plurality of first areas, each including a plurality of probes for input pad and probes for output pad, the first areas being aligned in L rows by M columns (L, M: natural number); and a second area group including a plurality of second areas, each including a plurality of probes for input pad, the second areas being aligned in (L×N) rows by M columns (N: natural number); and the first area group and the second area group are continuously connected in a column direction according to the chip alignment, such that the first areas and the second areas are aligned in {L+(L×N)} rows by M columns. | 2011-01-13 |
20110006798 | PROBE CARD CASSETTE AND PROBE CARD - A holding section ( | 2011-01-13 |
20110006799 | METHOD FOR MANUFACTURING PROBE SUPPORTING PLATE, COMPUTER STORAGE MEDIUM AND PROBE SUPPORTING PLATE - A prescribed pattern is formed on a thin metal plate by photolithography. The thin metal plate is etched by using the pattern as a mask to form a plurality of through-holes having diameters greater than diameters of probes, in the thin metal plate. The etching is performed on a plurality of the thin metal plates. After the pattern is removed, the plurality of thin metal plates are laminated by conforming the through-holes of each of the thin metal plates to guide pins of a guide. The laminated plurality of thin metal plates are bonded by diffusion bonding. An insulating film is formed on surfaces of the thin metal plates and an inner surface of each of the through-holes. A film thickness of the insulating film is adjusted so that inner diameters of the through-holes whereupon the insulating film is formed match with the diameters of the probes. | 2011-01-13 |
20110006800 | SYSTEM FOR TESTING AN INTEGRATED CIRCUIT OF A DEVICE AND ITS METHOD OF USE - A cartridge, including a cartridge frame, formations on the cartridge frame for mounting the cartridge frame in a fixed position to an apparatus frame, a contactor support structure, a contactor interface on the contactor support structure, a plurality of terminals, held by the contactor support structure, for contacting contacts on a device, and a plurality of conductors, held by the contactor support structure, connecting the interface to the terminals. | 2011-01-13 |
20110006801 | Circuit Arrangement for Overtemperature Detection - A method and system is provided for retrieving information about operational data from a plurality of building systems and service and maintenance information for a plurality of building sites. A customer web portal is provided with a database for storing the operational data and the service information allowing users to more readily generate reports and obtain service related information for a plurality of sites without having to maintain separate database systems at remote locations. | 2011-01-13 |
20110006802 | HIGH SENSITIVITY DIFFERENTIAL CURRENT TRANSFORMER FOR INSULATION HEALTH MONITORING - A current transformer is provided. The current transformer comprises a magnetic core having a central opening, at least one pair of conductors extending through the central opening and positioned symmetrically with respect to a center point of the magnetic core, one or more coils disposed on the magnetic core along a magnetic neutral axis of the magnetic core and one or more coils disposed on the magnetic core along a reference axis, wherein the reference axis is substantially perpendicular to the magnetic neutral axis. | 2011-01-13 |
20110006803 | LATCH CIRCUIT - A latch circuit includes a feedback circuit having inverter circuits and at least two input terminals and an input circuit for inputting input signals or signals having the same phase as the input signals to the input terminals of the feedback circuit in synchronization with a clock signal. In the feedback circuit section, only when the input signals or the signals having the same phase as the input signals are input to the at least two input terminals at the same time, positive feedback using a predetermined number of amplification stages is applied to the input terminals. | 2011-01-13 |
20110006804 | CIRCUIT FOR CONTROLLING DATA COMMUNICATION WITH SYNCHRONOUS STORAGE CIRCUITRY AND METHOD OF OPERATION - A method and circuit includes providing at least one conductor for receiving an input signal. A termination circuit and a clamp circuit are coupled to the at least one conductor. The termination circuit is enabled while the clamp circuit remains enabled. The clamp circuit is disabled. After disabling the clamp circuit, while the termination circuit remains enabled, both a first differential comparator and a second differential comparator are enabled. The first differential comparator receives a first differential input signal at a first input and a second differential input signal at a second input. The second differential comparator detects when a difference between the first differential input signal and the second differential input signal is greater than a predetermined value and enables transfer of an output of the first differential comparator to a memory controller. | 2011-01-13 |
20110006805 | RECONFIGURABLE SEQUENCER STRUCTURE - A cell element field for data processing, having function cell means for execution of algebraic and/or logic functions and memory cell means for receiving, storing and/or outputting information is described. Function cell-memory cell combinations are formed in which a control connection leads from the function cell means to the memory cell means. | 2011-01-13 |
20110006806 | SEMICONDUCTOR DEVICE - An ePLX unit includes a logic unit having an SRAM and a MUX, and a switch unit having an SRAM and a TG for establishing wiring connection in the logic unit. When a composite module is set in the first mode, an Add/Flag control unit uses the SRAMs as a data field and a flag field, respectively, to autonomously control the read address of each of the data field and the flag field in accordance with a control flag stored in the flag field. Furthermore, when the composite module is set in the second mode, the Add/Flag control unit writes configuration information into each of the SRAMs to reconfigure a logic circuit. Consequently, the granularity of the circuit configuration can be rendered variable, which allows improvement in flexibility when configuring a function. | 2011-01-13 |
20110006807 | DYNAMICALLY CONFIGURABLE HIGH SPEED INTERCONNECT USING A NONLINEAR ELEMENT - A dynamically configurable logic gate includes an input summer for receiving a first input signal and a second input signal to generate a summed input signal. Further the dynamically configurable logic gate includes a nonlinear element that applies a nonlinear function to the summed input signal to produce a nonlinear output signal. The dynamically configurable logic gate output signal corresponds to one of a plurality of different logic gates responsive to adjusting the summed input signal and/or the nonlinear function. In another embodiment, the dynamically configurable logic gate includes feedback to one of the inputs. The dynamically configurable logic gate receives the two inputs and operates as one of a plurality of different logic gate types so as to produce an output signal that corresponds to a memory latch according to a selection of the control signal. An array structure of dynamically configurable logic elements is also disclosed. | 2011-01-13 |
20110006808 | METHODS, CIRCUITS, SYSTEMS AND ARRANGEMENTS FOR UNDRIVEN OR DRIVEN PINS - Input/Output (I/O) pin circuits, devices, methods and systems are implemented in various fashions. According to one such method, a valid signal level is provided for a pin of an integrated circuit (IC) die. Responsive to a reset signal, a first mode ( | 2011-01-13 |
20110006809 | LEVEL CONVERSION CIRCUIT AND SOLID-STATE IMAGING DEVICE USING THE SAME - According to one embodiment, a level conversion circuit includes an intermediate voltage generating portion to generate an intermediate voltage between a first voltage and a second voltage upon receiving the first voltage and the second voltage higher than the first voltage. A buffer portion operates on the intermediate voltage upon receiving a first signal and an inverted first signal of a first amplitude corresponding to the first voltage. The buffer portion outputs a second signal and an inverted second signal having a second amplitude corresponding to the intermediate voltage. A level shift portion operates on the second voltage upon receiving the second signal and the inverted second signal, and outputs a third signal and an inverted third signal having a third amplitude corresponding to the second voltage. | 2011-01-13 |
20110006810 | LOW-SWING CMOS INPUT CIRCUIT - The invention relates to a CMOS input circuit for receiving low-swing input signals, which is an alternative to the CMOS input circuits as known from the prior art. The CMOS input circuit according to the invention comprises a leveling circuit (LC) that is constructed for arranging, under control of a voltage associated with an output voltage of a CMOS input stage (Inv | 2011-01-13 |
20110006811 | FREQUENCY SYNTHESIZER FOR A LEVEL MEASURING DEVICE AND A LEVEL MEASURING DEVICE - A frequency synthesizer for a time base generator of a level measuring device which works according to the radar principle, with at least one first output for output of a first frequency signal, with at least one second output for output of a second frequency signal, and with a reference oscillator for producing a reference frequency signal, the first frequency signal and the second frequency signal having a small difference frequency relative to one another, the first frequency signal being producible by interaction of the reference oscillator with a direct digital synthesizer. The first frequency signal and second frequency signal can be generated with especially low noise by the second frequency signal being derived from the reference oscillator without interconnection of a direct digital synthesizer and the direct digital synthesizer being operated such that only a noise spectrum is produced which is at least partially minimized. | 2011-01-13 |
20110006812 | DRIVER CIRCUIT AND ADJUSTMENT METHOD THEREFOR - A driver circuit includes an output section; a voltage-dividing section configured to divide a first voltage at a coupling point between the output section and a termination resistor; a comparison section configured to compare a voltage difference with one of the first voltage and a second voltage, the voltage difference being a difference between the second voltage at a coupling point between the termination resistor and a transmission path and a third voltage output from the voltage-dividing section; and an adjustment section configured to adjust a voltage division ratio of the voltage-dividing section on the basis of the comparison result obtained in the comparison section. | 2011-01-13 |
20110006813 | Input circuit and semiconductor integrated circuit including the same - An input circuit, includes a first buffer circuit whose output is couple to an output signal terminal of the input circuit, and whose input is coupled to an input signal terminal of the input circuit, a second buffer circuit, a third buffer circuit, a first differential amplification circuit whose first input is coupled to a first external power source terminal, whose second input is coupled to an output of the second buffer circuit, and whose output is coupled to an input of the second buffer circuit, a second differential amplification circuit whose first input is coupled to a second external power source terminal, whose second input is coupled to an output of the third buffer circuit, and whose output is coupled to an input of the third buffer circuit, a first resistance whose one end is coupled to the output of the first differential amplification circuit, and whose another end is coupled between the input signal terminal of the input circuit and the input of the first buffer circuit, a second resistance whose one end is coupled to the output of the second differential amplification circuit, and whose another end is coupled between the input signal terminal of the input circuit and the input of the first buffer circuit. | 2011-01-13 |
20110006814 | POWER STAGE - An power stage has a differential output stage | 2011-01-13 |
20110006815 | HIGH PERFORMANCE VOLTAGE BUFFERS WITH DISTORTION CANCELLATION - A voltage buffer may include a first signal path extending from an input terminal to an output terminal in which the first signal path further may include a buffer transistor that may have a control terminal, and a first and second current terminals responsive to the control terminal. In the first signal path, the control terminal may be connected to the input terminal, the first current terminal may be connected to the output terminal, and the first signal path may supply a load current to a load device responsive to an input signal at the input terminal. The voltage buffer further may include a second signal path extending from the input terminal to a current source node. The second signal path may include a replica load device. The voltage buffer further may include a current source supplying substantially constant current and coupled to the current source node. The voltage buffer further may include a current buffer positioned between the current source node and the output node in which the current buffer may direct a replica current from the second signal path responsive to the input signal and the substantially constant current from the current source to the buffer transistor. | 2011-01-13 |
20110006816 | Method and Apparatus for Generating Frequency Divided Signals - In a method for dividing a frequency of a clock signal, a first frequency divided signal is generated based on a clock signal. Rising edges in the first frequency divided signal are detected. Alternatively, falling edges in the first frequency divided signal are detected. An edge detection signal that includes a pulse for each detected edge is generated. A second frequency divided signal is generated based on the edge detection signal. | 2011-01-13 |
20110006817 | TRIANGULAR WAVE GENERATOR, SSCG UTILIZING THE TRIANGULAR WAVE GENERATOR, AND RELATED METHOD THEREOF - A triangular wave generator, comprising: a first frequency divider, for utilizing a first positive integer to divide a first frequency of a first periodical signal to generate a first frequency-divided signal; a second frequency divider, for utilizing a second positive integer to divide a second frequency, which equals the first frequency multiplying a third positive integer, of a second periodical signal to generate a second frequency-divided signal; and an up/down counter, for generating a triangular wave first and second frequency-divided frequencies respectively belonging to first and second frequency divided signals; wherein a frequency of the triangular wave equals to the first frequency-divided frequency, and an amplitude of the triangular wave is determined according to a ratio of the first and second frequency-divided frequencies. | 2011-01-13 |
20110006818 | CLOCK SYNCHRONIZATION SYSTEM, NODE, CLOCK SYNCHRONIZATION METHOD, AND PROGRAM - The invention provides a clock synchronization system which synchronizes the clock of a slave node with the clock of a master node by use of a timestamp packet transmitted from the master node to the slave node on the packet network, wherein the slave node includes a phase comparison part | 2011-01-13 |
20110006819 | LEVEL-RESTORED SUPPLY-REGULATED PLL - The present disclosure provides for a processor that can include digital processing circuitry that receives a digital clock signal from a supply regulated phase locked loop. The supply regulated phase locked loop can include a voltage controlled oscillator that can output an analog signal and a level restorer that can receive the analog signal from the voltage controlled oscillator and can translate the analog output into a digital signal that corresponds to an analog output of the voltage controlled oscillator. The supply regulated phase locked loop can receive an analog input having an input voltage that is within a range of acceptable input voltages. The supply regulated phase locked loop can also be configured to generate the digital output signal, such that the range of acceptable input voltages includes voltage values that are greater than and less than the output voltage. | 2011-01-13 |
20110006820 | Dual Phase-Locked Loop Circuit and Method for Controlling the Same - A dual phase-locked loop (PLL) circuit includes a phase/frequency detector, a charge pump, a frequency tuning circuit and an N divider. The frequency tuning circuit includes a coarse-tuning circuit, for coarse-tuning an output frequency of the dual PLL circuit to approximate a target frequency; a fine-tuning circuit, for fine-tuning the output frequency of the dual PLL circuit to the target frequency; and a current control oscillator (CCO), for generating an output signal of the dual PLL circuit. The output frequency of the output signal is equal to the target frequency. | 2011-01-13 |
20110006821 | System and Method for Signal Adjustment - Embodiment of the present invention relate to a method for receiving a first signal, determining a first characteristic of the first signal, the characteristic being a time based characteristic, receiving a second signal and processing the second signal through a predetermined range of delay elements, an initial minimum number of delay elements in the predetermined range being adjustable, the processed second signal having a second characteristic substantially corresponding to the first characteristic of the first signal. | 2011-01-13 |
20110006822 | Open-Loop Line Driver Control Method and Apparatus - According to an embodiment, a circuit includes an amplifier and an open-loop control system. The amplifier has an output stage for amplifying a signal, a power supply for driving a supply voltage of the output stage to different voltage levels responsive to being modulated and a pulse width modulator for modulating the power supply responsive to a mask input. The open-loop control system includes a mask generator and a detector. The mask generator is configured to generate the mask input as a function of the envelope of the signal. The detector is configured to detect discontinuities in the mask input and compensate for the discontinuities. | 2011-01-13 |
20110006823 | SIGNAL DELAY CIRCUIT, CLOCK TRANSFER CONTROL CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME - A signal delay circuit including a clock transfer control circuit configured to transmit or block a clock signal, and a pulse signal generation circuit configured to delay a first pulse signal in response to the transmitted clock signal to generate a second pulse signal which has a longer active period than the first pulse signal. | 2011-01-13 |
20110006824 | WAKE-UP RECEIVER AND WAKE-UP METHOD USING DUTY CYCLING AND POWER OFF TECHNIQUE - Provided is a low-power wake-up receiver that is sensitive to electric waves, by which power consumed by a radio frequency (RF) transceiver of a sensor node in a ubiquitous sensor network (USN) is minimized. A wake-up receiver waking up a main transceiver includes a duty cycle signal generation unit controlling a duty cycle of a duty cycle signal; a burst signal detection unit receiving an input signal including a burst signal and a data signal based on the duty cycle signal, amplifying the input signal, and, if the amplified input signal is the burst signal, outputting a control signal; and a data signal detection unit re-amplifying the amplified input signal based on the control signal, and, if the re-amplified input signal is the data signal, outputting a wake-up signal. Power supplied to the duty cycle signal generation unit is interrupted based on the control signal and power is re-supplied to the duty cycle signal generation unit based on the wake-up signal. | 2011-01-13 |
20110006825 | Phase Control Circuit and Method for Optical Receivers - This invention relates to a phase control circuit for an optical receiver (1). The phase control circuit ( | 2011-01-13 |
20110006826 | PHASE SIGNAL GENERATING APPARATUSES - In at least one example embodiment, a phase signal generating apparatus includes a phase signal generator and phase controller. The phase signal generator is configured to receive a plurality of first phase signals and a plurality of second phase signals, adjust a phase difference between the plurality of first phase signals and the plurality of second phase signals and generate a plurality of adjusted first phase signals and a plurality of adjusted second phase signals, based on a switch control signal and a phase control signal, a phase difference between the plurality of adjusted first phase signals and the plurality of adjusted second phase signals being the adjusted phase difference. The phase controller is configured to generate the switch control signal and the phase control signal based on phase information for the plurality of first phase signals and the plurality of second phase signals. | 2011-01-13 |
20110006827 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes: a first flip-flop, a combined circuit and a second flip-flop that form a critical path; a first delay circuit and a third flip-flop that are provided in the post-stage of the combined circuit; a second delay circuit and a fourth flip-flop that are provided in the post-stage of the combined circuit; a first comparison circuit that compares the output of the second flip-flop with the output of the third flip-flop; a second comparison circuit that compares the output of the second flip-flop with the output of the fourth flip-flop: and a control circuit that controls a source voltage supplied to the combined circuit in accordance with the outputs of the comparison circuits. A delay time by the first delay circuit is different from a delay time by the second delay circuit. | 2011-01-13 |
20110006828 | DIFFERENTIAL TYPE LEVEL SHIFTER - This patent discloses a differential type level shifter, comprising: a differential pair of transistors, having a pair of gate terminals, a pair of drain terminals and a common source terminal, with the pair of gate terminals coupled to a first clock signal and a second clock signal; a current source, coupled between the common source terminal and a reference ground, used to provide a bias current; and a pair of loading resistors, having a common end and a pair of output ends, with the common end coupled to a power line, the pair of output ends coupled to the pair of drain terminals; wherein the pair of drain terminals are used to generate a set signal and a reset signal in response to the first clock signal and the second clock signal. | 2011-01-13 |
20110006829 | ISOLATION CIRCUIT - An isolation circuit is provided. The isolation circuit is coupled to an output and an input node and includes a first set, a second switch set, and a body bias voltage generator. The first switch set couples a switch control node to a second voltage when a first voltage is at a first voltage level, and couples the switch control node to the input node when the first voltage is at a second voltage level. The second switch set couples the output node to the input node when the first voltage is at the first voltage level, and isolates the output node from the input node when the first voltage is at the second voltage level. The body bias voltage generator selectively provides a higher one of the first voltage and a voltage on the input node to a body of the second switch set. | 2011-01-13 |
20110006830 | HIGH CURRENT CONTROL CIRCUIT INCLUDING METAL-INSULATOR TRANSITION DEVICE, AND SYSTEM INCLUDING THE HIGH CURRENT CONTROL CIRCUIT - Provided are a high current control circuit including a metal-insulator transition (MIT) device, and a system including the high current control circuit so that a high current can be controlled and switched by the small-size high current control circuit, and a heat generation problem can be solved. The high current control circuit includes the MIT device connected to a current driving device and undergoing an abrupt MIT at a predetermined transition voltage; and a switching control transistor connected between the current driving device and the MIT device and controlling on-off switching of the MIT device. By including the metal-insulator transition (MIT) device, the high current control circuit switches a high current that is input to or output from the current driving device. Also, the MIT device constitutes a MIT-TR composite device with a heat-preventing transistor which prevents heat generation and is connected to the MIT device. | 2011-01-13 |
20110006831 | DEVICES AND METHODS FOR REDUCING EFFECTS OF DEVICE MISMATCH IN TEMPERATURE SENSOR CIRCUITS - A temperature sensor having one or more mirror circuits output temperature dependent output signals is disclosed in one embodiment. The temperature sensor includes a sampling circuit coupled to receive a clock signal that samples the output signals for a duration of a predetermined number of clock cycles. The temperature sensor additionally includes a phase control circuit that receives the clock signal and generates a control signal that enables subsequent sampling operations. Each subsequent sampling operation has a duration of the predetermined number of clock cycles. The control signal from the phase control circuit further enables input and output terminals of respective circuit components in the mirror circuits to be switched for each subsequent sampling operation. | 2011-01-13 |
20110006832 | Negative Pixel Compensation - Negative pixel compensation in a touch sensitive device is disclosed. The device can compensate for a negative pixel effect in touch signal outputs due to poor grounding of an object touching the device. To do so, the device can switch to a configuration to measure the grounding condition of the touching object and use the measurement to compensate the touch output values from the device accordingly. In the switched configuration, a first set of lines of the device can be switched between a coupling to a stimulation signal input to drive the device, a coupling to a capacitance signal output to output a signal indicative of the object's grounding condition, and a coupling to ground. A second set of lines of the device can be coupled to a touch signal output to output a signal indicative of the object's touch at the device. In addition or alternatively, in the switched configuration, the first set of lines of the device can be switched to function as the second set of lines and vice versa. The grounding signal can be applied to the touch signal to compensate for the negative pixel effect. | 2011-01-13 |
20110006833 | Micro-Controller-Based Electronic Switch Using a Proximity Detector to Facilitate Hands-Free Control of an AC Device - This system is a no touch single pole single throw (spst) two wire electronic light switch that uses an Infrared Proximity Detector to create a working system designed to replace existing mechanical switches common in households. The use of a Micro Controller enables the system to adapt to different loads and load types while requiring a minimum number of parts to perform the necessary tasks. | 2011-01-13 |
20110006834 | SEMICONDUCTOR DEVICE AND METHOD OF MONITORING BLOWING OF FUSE IN SEMICONDUCTOR DEVICE - In some embodiments, a semiconductor device includes a fuse having a conductive portion configured to be blown when a current exceeding a rated value flows through the conductive portion, a first monitor wiring configured to monitor blowing of the conductive portion of the fuse, and a second monitor wiring configured to monitor blowing of the conductive portion of the fuse. The first monitor wiring and the second monitor wiring are connected to the conductive portion of the fuse so as to be away from a longitudinal center of the conductive portion. | 2011-01-13 |
20110006835 | MULTI-CHIP SYSTEM - Provided is a multi-chip system. The multi-chip system includes a plurality of chips and a power sequence controller. The power sequence controller supplies a plurality of external power voltages to the plurality of chips according to a predetermined sequence. | 2011-01-13 |
20110006836 | CHARGE PUMP AND CHARGING/DISCHARGING METHOD CAPABLE OF REDUCING LEAKAGE CURRENT - A charge pump includes a first transistor, a second transistor, a first, a second and a third selectors. The first transistor includes a gate electrode, a first electrode, and a second electrode which serves as an output port of the charge pump. The second transistor includes a gate electrode, a first electrode and a second electrode, where the gate electrode of the first transistor is coupled to the gate electrode of the second transistor, and the gate electrode of the second transistor is coupled to the second electrode of the second transistor. The first selector is utilized for selectively connecting the first transistor to a first supply voltage. The second selector is utilized for selectively connecting the first transistor to a second supply voltage. The third selector is utilized for selectively connecting the second transistor to the second supply voltage. | 2011-01-13 |
20110006837 | Graphene Device, Method of Investigating Graphene, and Method of Operating Graphene Device - The present invention provides for a graphene device comprising: a first gate structure, a second gate structure that is transparent or semi-transparent, and a bilayer graphene coupled to the first and second gate structures, the bilayer graphene situated at least partially between the first and second gate structures. The present invention also provides for a method of investigating semiconductor properties of bilayer graphene and a method of operating the graphene device by producing a bandgap of at least 50 mV within the bilayer graphene by using the graphene device. | 2011-01-13 |
20110006838 | DEVICE FOR CONTROLLING A POWER TRANSISTOR - The invention relates to a gate control device for a JFET-type transistor comprising a gate, a drain and a source, said device comprising:
| 2011-01-13 |
20110006839 | CIRCUIT PROVIDING COMPENSATED POWER FOR SENSE AMPLIFIER AND DRIVING METHOD THEREOF - The present invention discloses a circuit providing a power for a sense amplifier that stabilizes a power voltage supplied to the sense amplifier by compensating a noise generated in the power voltage when the sense amplifier operates with an selectively generated decoupling noise. The circuit providing a power for a sense amplifier includes a sense amplifying circuit sensing and amplifying data loaded on a bit line with a first power. A power supplying unit provides the first power to the sense amplifying circuit. A decoupling unit generates a decoupling noise with a second power and provides the decoupling noise to the first power voltage. The decoupling noise is maintained for a period including a time point of an operation of the sense amplifying circuit and a predetermined time thereafter. | 2011-01-13 |
20110006840 | Fixing Full-Chip Violations Using Flip-Flops - A method of forming an integrated circuit includes providing a first design of the integrated circuit; analyzing the first design to identify a first flip-flop having setup/hold violations and a second flip-flop not having setup/hold violations; and replacing the first flip-flop with a third flip-flop having a substantially same cell delay as the first flip-flop to form a second design of the integrated circuit. The first flip-flop and the third flip-flop have different setup and hold windows. | 2011-01-13 |
20110006841 | SWITCHABLE BALANCED AMPLIFIER - A switchable balanced amplifier having multiple, configurable independent input/output paths. Switching networks coupled to the input and/or output quadrature couplers of the balanced amplifier are used to configurably direct any of one or more input signals to any of one or more output ports. In one example, each output port is coupled to circuitry tailored to a specific type of input signal, operating protocol and/or operating frequency band. | 2011-01-13 |
20110006842 | SYSTEM AND A METHOD FOR SIGNAL PROCESSING - A system for processing an input signal, the system including: (a) a hardware memory module configured to store a lookup table; and (b) a signal processing module, configured to process the input signal to provide a second signal, and to transmit the second signal to a power amplifier that is characterized by non-linearity and which is adapted to amplify the second signal to provide an amplified signal; wherein the signal processing module is configured to process the input signal in response to at least one filtering parameter to provide the second signal so as to at least partly compensate for the non-linearity of the amplifier; wherein the at least one filtering parameter is retrieved from the lookup table using a first, a second, and a third lookup table indexes, wherein the first index is responsive to a magnitude of the input signal at a first moment, the second index is responsive to a magnitude of the input signal at a second moment, and the third index is responsive to phases of the input signal at the first and the second moments. | 2011-01-13 |
20110006843 | Offset voltage correction circuit and class D amplifier - A class D amplifier includes an input unit that inputs an input signal and an integrator which includes a differential operational amplifier having an offset voltage correction function. The integrator integrates the input signal input. A pulse-width modulator modulates the integration result of the integrator to generate a pulse signal having a pulse width reflective of the integration result. An output unit outputs the pulse signal. A feedback unit superimposes a signal output from the output unit on the input signal and feeds back the superimposed signal to the integrator. An input controller selectively set the input unit to a state where no signal is input. An output controller sets a voltage of an output from the feedback unit to a constant voltage. | 2011-01-13 |
20110006844 | Class D Amplifier Control Circuit and Method - Circuit and method for a Class D amplifier. In one exemplary embodiment, an audio amplifier is disclosed. A closed loop configuration for driving high and low side driver transistors is provided, each circuit is compatible with advanced sub micron semiconductor processes. The analog time varying input is coupled to one input of a sigma delta analog to digital converter. A feedback signal from the output is also input to the analog to digital converter. A bit stream is output by the analog to digital converter. A decimator receives this bit stream and downconverts the samples to digital values at a lower frequency. A digital filter with adaptable coefficients is used to filter that signal and a digital pulse width modulator then develops an analog differential PWM signal. A predriver inputs the PWM signal and derives the output gating signals to control the high and low side drivers of a Class D amplifier. | 2011-01-13 |
20110006845 | AMPLIFIER STAGE - An amplifier stage for generating an amplified output signal from an input signal, a mobile device comprising an audio amplifier, and an amplification method for generating an amplified output signal from an input signal using an amplifier stage are described. | 2011-01-13 |
20110006846 | HIGH-FREQUENCY AMPLIFIER - A high-frequency amplifier is configured in such a manner that a detecting diode | 2011-01-13 |
20110006847 | HIGH-VOLTAGE IMPULSE AMPLIFIER - A circuit includes a first transistor in a common-collector configuration and a heterojunction bipolar transistor (HBT) in a common-emitter configuration. The first transistor has a base coupled to an input node for receiving a pulsed signal. A collector of the first transistor is coupled to a first voltage source node. A base of the HBT is coupled to an emitter of the first transistor. A collector of the HBT is coupled to a second voltage source node configured to bias the HBT normally off. The HBT operating isothermally when the pulsed signal has a short-pulse width and a low duty cycle. The first transistor drives the HBT when the pulsed signal is received at the base of the first transistor to output an amplified pulsed signal at the collector of the HBT. | 2011-01-13 |
20110006848 | AMPLIFIER CIRCUIT - An amplifier circuit includes three amplifier units connected in series. The first amplifier unit includes an input connector for inputting signals and a first transistor amplifier module connected to the input connector. The second amplifier unit includes a notch-filter circuit, a main filter circuit and a second transistor amplifier module. The notch-filter circuit allows only signals in a predetermined frequency to be transmitted from the first transistor amplifier module to the second transistor amplifier module and amplified. The main filter circuit filters signals in frequencies different from the predetermined frequency. The third amplifier unit includes a third transistor amplifier module and an output connector for outputting amplified signals. | 2011-01-13 |
20110006849 | HARMONIC REJECTION MIXER AND HARMONIC REJECTION MIXING METHOD - Provided are a harmonic rejection mixer and a harmonic rejection mixing method. A plurality of oscillator signals having a ⅓ duty cycle and uniform phase differences may be generated and a differential or quadrature mixer with harmonic rejection may be realized by using the oscillator signals. | 2011-01-13 |
20110006850 | CLOCK SIGNAL DISTRIBUTING DEVICE - A clock signal distributing device includes a plurality of LC resonant oscillators, each resonating at a frequency conforming to values of a first inductor and a first capacitor to oscillate a signal, an injection locked LC resonant oscillator that resonates at a frequency conforming to values of a second inductor and a second capacitor to oscillate a signal which is synchronous with an input clock signal, and transmission lines that connect oscillation nodes of the plurality of LC resonant oscillators and the injection locked LC resonant oscillator with one another. | 2011-01-13 |
20110006851 | Unit inverter having linearly varying delay response characteristic and digitally controlled oscillator including the unit inverter - A Digitally Controlled Oscillator (DCO) including a unit inverter cell whose output frequency linearly varies according to a digital control signal, the unit inverter cell linearly varying a delay response characteristic of an output signal with respect to an input signal supplied from an input terminal, in response to a reference signal and a zero | 2011-01-13 |
20110006852 | PLL CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME - A PLL circuit includes a phase detector, a loop filter (LF), a voltage-controlled oscillator (VCO), and a frequency divider. The phase detector compares a phase of a signal Fs which is input from outside with a phase of a signal Fo/N which is input from the frequency divider. The loop filter generates a signal Vin by removing alternating current components from a signal input from the phase detector. The voltage-controlled oscillator outputs a signal Fo based on the signal Vin input from the loop filter. The frequency divider converts the signal Fo output from the voltage-controlled oscillator into Fo/N (frequency division by N), and outputs it to the phase detector. | 2011-01-13 |
20110006853 | MULTI MODE MODULATOR AND METHOD WITH IMPROVED DYNAMIC LOAD REGULATION - A dual mode modulator is proposed for driving a power output stage having a serial connection of high-side power FET and low-side power FET. The dual mode modulator includes a PWM modulator operating under a PWM-frequency and a PFM modulator for controlling the power output stage. To improve the dynamic load regulation of the dual mode modulator, a dynamic frequency booster can be added to the dual mode modulator to boost up the PWM-frequency from its normal operating frequency during a PFM-to-PWM mode transition period. Secondly, a dynamic slew rate booster can be added to boost up an error amplifier slew rate of the PWM modulator from its normal operating slew rate during the mode transition period. Thirdly, a dynamic turn-off logic circuit can be added to turn off the low-side power FET during the mode transition period. | 2011-01-13 |
20110006854 | WAVEGUIDE COUPLER - Provided is a short-slot type waveguide coupler which can be applied to a transmission line that transmits broadband signals. | 2011-01-13 |
20110006855 | ELASTIC WAVE FILTER, AND DUPLEXER AND ELECTRONIC DEVICE USING SAME - An elastic wave filter has first, second, and third IDT electrodes whose wiring electrodes are connected to unbalanced signal terminal; fourth IDT electrode disposed between the first and second IDT electrodes; fifth IDT electrode disposed between the second and third IDT electrodes; and first and second balanced signal terminals connected to the wiring electrodes of fourth and fifth IDT electrodes, respectively. The ground electrodes of the first through fifth IDT electrodes are connected to the ground. Signals in opposite phase and in phase with a signal input to unbalanced signal terminal are output from first and second balanced signal terminals, respectively. The wiring electrodes of second and third IDT electrodes are adjacent to the ground electrode of fifth IDT electrode. The wiring electrode of one of first and second IDT electrodes is adjacent to the wiring electrode of fourth IDT electrode. The ground electrode of the other is adjacent to the ground electrode of fourth IDT electrode. This configuration can suppress spuriousness in the bandpass. | 2011-01-13 |
20110006856 | MULTI-MODE RESONANT FILTER - Various multi-mode resonant filters including a housing having a cavity, are provided. The multi-mode resonant filters include a Dielectric Resonant (DR) element received in the cavity of the housing, and a plurality of transmission lines for connecting a point on one of a first axis, a second axis, and a third axis with a point on another axis. The first axis, the second axis, and the third axis are orthogonal to each other with respect to a center of the DR element. | 2011-01-13 |
20110006857 | COMPLEX RESONATOR, BANDPASS FILTER, AND DIPLEXER, AND WIRELESS COMMUNICATION MODULE AND WIRELESS COMMUNICATION DEVICE USING SAME - Provided is a composite resonator wherein two resonance frequencies can be set discretionarily to a certain extent. The composite resonator is provided with a grounding electrode ( | 2011-01-13 |
20110006858 | Multi-Source Spatial Power Amplifier - An amplification device combining a number of amplifier modules operating in the microwave range includes: a power divider, having an input and at least two outputs, dividing an input microwave signal into a number of microwave signals; connecting waveguides used to propagate the microwave signals supplied by the power divider; at least one input transition element placed at the output of each connecting waveguide for receiving the microwave signal; an amplifier module connected to each of the input transitions with which to amplify the signal received by each of the input transitions; and an output transition element in planar technology connected to each of the amplifier modules with which to combine the amplified signals obtained from the amplifier modules. | 2011-01-13 |
20110006859 | TUNABLE COMPACT TIME DELAY CIRCUIT ASSEMBLY - A tunable compact time delay circuit assembly is provided. In one embodiment, the invention relates to a tunable delay circuit assembly for controllably delaying signals that propagate along a transmission line, the circuit assembly including an elongated conductor extending in a first direction, the elongated conductor configured to carry the signals, at least one floating strip, each floating strip including a first elongated conductive segment having a first centerline, wherein the first centerline is not parallel to the first direction, and a second elongated conductive segment having a second centerline, wherein the second centerline is not parallel to the first direction, and a first switch coupled between the first segment and the second segment, wherein the first switch, in a first position, is configured to connect the first segment to the second segment, wherein the first switch, in a second position, is configured to electrically isolate the first segment from the second segment, and wherein the at least one floating strip is electrically isolated from other components of the circuit assembly. | 2011-01-13 |
20110006860 | FILM BULK ACOUSTIC RESONATOR, FILTER, COMMUNICATION MODULE AND COMMUNICATION APPARATUS - A piezoelectric thin film resonator of the present has a substrate | 2011-01-13 |
20110006861 | Liquid Crystalline Polymer and Multilayer Polymer-Based Passive Signal Processing Components for RF/Wireless Multi-Band Applications - The present invention provides all organic fully-packaged miniature bandpass filters, baluns, diplexers, multiplexers, couplers and a combination of the above manufactured using liquid crystalline polymer (LCP) and other multilayer polymer based substrates. These devices are manufactured using one or more LCP layers having integrated passive components formed thereon to provide the density and performance necessary for multi-band wireless devices. In the designs involving multiple LCP layers, the LCP layers are separated by prepeg layers. In accordance with an aspect of the present invention, coplanar waveguide, hybrid stripline/coplanar waveguide and/or microstrip topologies are utilized to form the integrated passive components, and the devices can be mass produced on large area panels at least 18 inches by 12 inches with line widths smaller than 10 um. | 2011-01-13 |
20110006862 | MULTILAYER DIELECTRIC SUBSTRATE AND SEMICONDUCTOR PACKAGE - A multilayer dielectric substrate includes a first cavity-resonance suppressing circuit that suppresses cavity resonance of a first signal wave and a second cavity-resonance suppressing circuit that suppresses cavity resonance of a second signal wave, a frequency thereof being different from that of the first signal wave. These cavity-resonance suppressing circuits respectively include openings formed in a surface-layer ground conductor, an impedance transformer with a length of an odd multiple of about ¼ of in-substrate effective wavelength of a signal wave, a tip-short-circuited dielectric transmission line with a length of an odd multiple of about ¼, of in-substrate effective wavelength of a signal wave, a coupling aperture formed in an inner-layer ground conductor, and a resistor formed in the coupling aperture. The multilayer dielectric substrate that suppresses cavity resonance of signal waves of a plurality of frequencies. | 2011-01-13 |
20110006863 | Applications of Universal Frequency Translation - Frequency translation and applications of same are described herein. Such applications include, but are not limited to, frequency down-conversion, frequency up-conversion, enhanced signal reception, unified down-conversion and filtering, and combinations and applications of same. | 2011-01-13 |
20110006864 | HIGH FREQUENCY COUPLER AND COMMUNICATION DEVICE - A high frequency coupler includes a ground, a first coupling electrode connected via a first resonator unit to an input and output terminal of a communication circuit, and one or more second coupling electrodes connected via a second resonator unit designed utilizing a ground to a ground terminal of the communication circuit. | 2011-01-13 |
20110006865 | IN-SITU MAGNETIZER - A magnetizer including at least one reconfigurable magnetic flux guide coil is disclosed. A method of magnetizing a permanent magnet in-situ a mechanical member is also disclosed. | 2011-01-13 |
20110006866 | MAGNETIC YOKE, MICROMECHANICAL COMPONENT AND METHOD FOR PRODUCING A MAGNETIC YOKE AND A MICROMECHANICAL COMPONENT - The present invention relates to a magnetic yoke ( | 2011-01-13 |
20110006867 | MAGNETIC COMPONENT - Provided is a magnetic component capable of omitting a process of binding both ends of a lead wire to terminals and having stable connection between the lead wire and the terminals. The magnetic component is provided with a core including a spool portion around which a lead wire is wound, and external terminals to which the both ends of the lead wire are connected. Each of the external terminals includes a protruding portion (terminal end fixing portion) which is capable of receiving movement of the lead wire in a direction opposite to a winding direction, and the external terminals and the lead wire are connected to each other. | 2011-01-13 |
20110006868 | ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME - An electronic component includes a multilayer composite including first insulating layers, second insulating layers, and a helical coil. The helical coil is disposed within the multilayer composite and includes a plurality of coil conductors connected to each other with a plurality of via hole conductors. The coil is located corresponding to the region defined by the second insulating layers when viewed in a stacking direction of the first and second insulating layers. The second insulating layers are located in the region coinciding with the locus of the coil without covering the via hole conductors when viewed in the stacking direction. | 2011-01-13 |
20110006869 | Inverter Transformer - An embodiment provides an inverter transformer comprising: a first bobbin around which a first coil is wound, the first bobbin comprising a first through hole; a second bobbin around which a second coil is wound, the second bobbin comprising a second through hole; a spacer between the first and the second bobbins; and a core inserted into the first and the second through holes. | 2011-01-13 |