Class / Patent application number | Description | Number of patent applications / Date published |
714760000 | Threshold decoding (e.g., majority logic) | 22 |
20080301524 | DECODER DEVICE AND METHOD FOR DECODING DATA STORED IN STORAGE MEDIUM - A decoder device includes: a decoder that decodes data stored in a storage medium by performing error correction on the data, the error correction being capable of correcting code error and code erasure included in the data; a memory that stores a history of an address in the storage medium of a code included in the data, the code being detected to have the code error by the decoding unit; and a controller that controls the decoder to change a detail of the error correction based on the history stored in the memory. | 12-04-2008 |
20100218070 | LENGTHENING LIFE OF A LIMITED LIFE MEMORY - A phase-change memory (PCM) includes a matrix of storage cells, including at least a first group with at least one cell. Each cell includes a phase change material having at least a first resistance value and a second resistance value, such that the first group can have an identical message encoded therein in at least a first way and a second way. The memory also includes a controller configured to encode the identical message in the at least first group the first or second way, based on which way causes the least amount of writing cost, given current levels of the group. Another embodiment of memory includes a matrix of storage cells, including at least a first group with at least one cell. Each of the storage cells has at least two levels, such that each of the storage cells can have an identical message encoded therein in at least a first way and a second way (the cells can be PCM or another technology). Each one of the storage cells is arbitrarily individually changeable among the at least two levels, and each of the cells is cost-asymmetric. A controller encodes the identical message in the at least first group using the first way or the second way, based on which way incurs a least cost when writing the message into the at least one cell of the at least first group, given current levels of the at least first group. | 08-26-2010 |
20100241927 | Apparatus and method for data processing - A data processing apparatus includes a non-volatile semiconductor memory configured to store a storage data and an additional data control circuit configured to generate an additional data and add the additional data to a main storage data, and the additional data is different between a first mode and a second mode. The additional data control circuit includes a first mode circuit configured to generate the additional data in the first mode; and a second mode circuit configured to generate the additional data in the second mode. The storage data contains a target data or an inversion data of the target data, as the main storage data and the additional data. | 09-23-2010 |
20110161781 | DIGITAL CONTENT DISTRIBUTION UTILIZING DISPERSED STORAGE - A method begins by a processing module determining whether to error encode broadcast data. The method continues with the processing module encoding a portion of the broadcast data using an error coding storage dispersal function to produce a set of encoded broadcast data slices, determining whether to compress the set of encoded broadcast data slices for the set of encoded broadcast data slices, and when the set of encoded broadcast data slices is to be compressed, selecting a subset of encoded broadcast data slices of the set of encoded broadcast data slices, when the broadcast data is to be error encoded. | 06-30-2011 |
20110231731 | METHOD AND SYSTEM FOR DECODING - Low-Density Parity-Check (LDPC) codes offer error correction at rates approaching the link channel capacity and reliable and efficient information transfer over bandwidth or return-channel constrained links with data-corrupting noise present. LDPC codes also offer error correction performance approaching channel capacity exponentially fast in terms of the code length, linear processing complexity, and parallelism that scales with the code length. They also offer challenges relating to the decoding complexity of the binary error-correction codes themselves and error floors limiting achievable bit-error rates. A new Relaxed Half-Stochastic (RHS) decoding algorithm is presented that reduces decoding complexity for high decoding throughput applications. The RHS algorithm uses an approach based on stochastic decoding algorithms but differs significantly from the conventional approaches of LDPC decoder implementation. The RHS algorithm also leads to a randomized decoding technique called redecoding that addresses the error floor limitation. | 09-22-2011 |
20110258513 | SNR-Based Variable-Threshold Majority-Logic Decoder - Apparatus having corresponding methods and tangible computer-readable medium embodying instructions executable by a computer to perform the methods comprise: a receiver adapted to receive a signal representing an input code block, wherein the input code block represents information encoded with a (N, K) difference-set cyclic code, wherein the input code block includes N symbols, and wherein the N symbols represent K bits of the information; an estimator adapted to estimate a signal-to-noise ratio of the signal; a raised-threshold majority-logic decoder adapted to decode the input code block according to a raised-threshold majority-logic decoding algorithm when the signal-to-noise ratio does not exceed a first predetermined threshold; and a variable-threshold majority-logic decoder adapted to decode the input code block according to a variable-threshold majority-logic decoding algorithm when the signal-to-noise ratio exceeds the first predetermined threshold. | 10-20-2011 |
20110289378 | ACCESSING DATA IN MULTIPLE DISPERSED STORAGE NETWORKS - A method begins by a processing module identifying sets of dispersed storage (DS) units for each of a plurality of dispersed storage networks (DSNs) in a computing system network, wherein a set of the sets of DS unit stores an error coded data file. The method continues with the processing module identifying a reference entity within the computing system network. The method continues with the processing module determining first data access performance information between the reference entity and a first one of the sets of DS units and determining second data access performance information between the reference entity and a second one of the sets of DS units for each of the plurality of DSNs. The method continues with the processing module storing the first and second data access performance information for each of the plurality of DSNs to produce system data access performance information. | 11-24-2011 |
20110314354 | APPARATUS, SYSTEM, AND METHOD FOR PROVIDING ERROR CORRECTION - An apparatus, system, and method are disclosed for providing error correction for a data storage device. A determination module determines an error-correcting code (“ECC”) characteristic of the data storage device. An ECC module validates requested data read from the data storage device using a hardware ECC decoder. In response to the requested data satisfying a correction threshold, a software ECC decoder module validates the data using a software ECC decoder. The software ECC decoder is configured according to the ECC characteristic of the data storage device. | 12-22-2011 |
20120131416 | Facilitating User Support of Electronic Devices Using Matrix Codes - An electronic device detects occurrence of an error condition and selects a matrix code to include in an error message to transmit to a display device based on the error condition. A reader device decodes the displayed matrix code to present information regarding resolution of the error condition. The electronic device may select the matrix code by looking up the error condition in a table or by dynamically generate the matrix code. In various implementations, the electronic device may determine that the information regarding resolution of the error condition has been utilized to unsuccessfully resolve the error condition. If so, the electronic device may select and transmit and additional matrix code that may be decoded by the reader device to access and present an additional set of information regarding resolution of the error condition or to initiate an electronic device support request. | 05-24-2012 |
20120173954 | DECODING DEVICE, DECODING METHOD, AND PROGRAM - A decoding device includes: a determination unit that determines whether or not a decoding ending condition is satisfied at an interval shorter than an interval of one decoding process in repeated decoding and ends the process in the middle of the one decoding process in a case where the decoding ending condition is satisfied. | 07-05-2012 |
20120192034 | Lengthening Life of a Limited Life Memory - A phase-change memory (PCM) includes a matrix of storage cells, including at least a first group with at least one cell. Each cell includes a phase change material having at least a first resistance value and a second resistance value, such that the first group can have an identical message encoded therein in at least a first way and a second way. The memory also includes a controller configured to encode the identical message in the at least first group the first or second way, based on which way causes the least amount of writing cost, given current levels of the group. Another embodiment of memory includes a matrix of storage cells. Each of the storage cells has at least two levels, such that each of the storage cells can have an identical message encoded therein in at least a first way and a second way. | 07-26-2012 |
20120198308 | METHODS AND SYSTEMS FOR EFFICIENT DECODING OF CONCATENATED ERROR CORRECTION CODES - Decoding data received includes decoding the received data using a first error correcting circuitry that decodes data in accordance with a first decoding process, terminating execution of the first decoding process used to correct the data before the first error correcting circuitry completes executing the first, decoding process and outputting partially decoded data, determining whether partially decoded data requires further decoding, and in response to determining whether partially decoded data requires further decoding, decoding the partially decoded data using a second error correcting circuitry that decodes data in accordance with a second decoding process. A system decodes data in accordance with the method. | 08-02-2012 |
20130151923 | Systems and Methods for Scalable Data Processing Shut Down - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for power governance in a data processing system. | 06-13-2013 |
20140032990 | Decoder and Method for Physically Unclonable Functions Using Threshold Decoding - A decoder comprises a feedback shift register having a plurality of register elements that implement a simplex code and take a register vector for determining an appropriate syndrome fed into the feedback shift register and stored in the plurality of register elements. A combination device algebraically combines a subset of the register elements and provides a combination result vector. A majority decision-making unit ascertains a most frequently occurring value within the combination result vector and provides it as a decision result. An input selector connects an input of the feedback shift register to an input interface arrangement or to an output of the majority decision-making unit, and provides an input vector by the input interface arrangement and corresponds to the ascertained form of the physical unclonable properties as a register vector and, and provides a decision vector comprising the decision result and further decision results as a register vector. | 01-30-2014 |
20140325306 | REED-SOLOMON ERASURE DECODING WITH ERROR DETECTION FOR RETRANSMISSION - By utilizing Reed-Solomon erasure decoding algorithms and techniques, the system is able to perform error detection for the case where the number of bytes received in error exceeds a correcting capability of a decoder. The error detection can be used, for example, to determine whether a codeword is decodable, and whether the retransmission of data is necessary. The retransmission can be accomplished by assembling a message that is sent to another modem requesting retransmission of one or more portions of data, such as one or more codewords. | 10-30-2014 |
20150317257 | FLASH MEMORY DEVICE, FLASH MEMORY SYSTEM, AND METHODS OF OPERATING THE SAME - Provided are a flash memory device, a flash memory system, and methods of operating the same. A method of operating a flash memory system includes selecting memory cells of a flash memory in response to an authentication challenge, programming pieces of input data into the selected memory cells, respectively, reading the selected memory cells and generating and storing control information, dividing the selected memory cells into at least one first region memory cell and at least one second region memory cell based on the control information, and setting read values of the at least one first region memory cell and the at least one second region memory cell as a first value and a second value, respectively, and generating an authentication response in the response to the authentication challenge. | 11-05-2015 |
20150339186 | ERROR CORRECTION USING MULTIPLE DATA SOURCES - A data storage device includes a memory and a controller. A method includes accessing data stored at the memory to generate a first logical page. The method further includes generating a second logical page. Generating the second logical page includes accessing parity information from the memory. The parity information is associated with the first logical page. The method further includes generating a third logical page. Generating the third logical page includes modifying a first value of the first logical page based on a second bit value of the second logical page. | 11-26-2015 |
20160006458 | DECODING TECHNIQUES FOR LOW-DENSITY PARITY CHECK CODES - A data storage device includes a memory. A method includes initiating a decoding process at the data storage device to decode data sensed from the memory. The method further includes accessing a mapping table to determine a variable node message value during a variable node processing operation of the decoding process. | 01-07-2016 |
20160006543 | Low Complexity Error Correction - For low complexity error correction, a decoder modifies each reliability metric of an input data stream with a random perturbation value. The reliability metric comprises a weighted sum of a channel measurement for the input data stream and parity check results for the input data stream. In addition, the decoder may generate an output data stream as a function of the reliability metrics. | 01-07-2016 |
20160013807 | RELIABLE DATA READING WITH DATA SET SCREENING BY ERROR INJECTION | 01-14-2016 |
20160071607 | MEMORY SYSTEM - According to one embodiment, a memory system includes a memory and a setting unit. The memory includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory cells, each of which holds an electrical charge. The peripheral circuit is configured to read a value from each memory cell by comparing a quantity of an electrical charge held in the memory cell with a determination threshold. The memory stores first data in the memory cell array. The first data include a plurality of values. The setting unit is configured to change the determination threshold according to the number of values which are different in second data and third data among the plurality of values. The second data are first data before being written to the memory. The third data are first data that have been read from the memory. | 03-10-2016 |
20160162353 | STORAGE PARAMETERS FOR A DATA STORAGE DEVICE - A method of operating a data storage device having a memory includes reading error location data associated with a first region of the memory. The memory includes the first region and a second region. The method also includes generating one or more parameters based on the error location data. The method includes receiving data to be written to the memory and encoding the data to produce a codeword. The method also includes partitioning the codeword based on the one or more parameters to generate a first portion and a second portion. The method further includes performing a write operation to store the first portion at the first region and to store the second portion at the second region. | 06-09-2016 |