Class / Patent application number | Description | Number of patent applications / Date published |
438602000 | To compound semiconductor | 36 |
20080227283 | SELF-ALIGNED METAL TO FORM CONTACTS TO Ge CONTAINING SUBSTRATES AND STRUCTURE FORMED THEREBY - A method for forming gennano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step. The method of the present invention provides a structure having a germano-silicide contact layer atop a Ge-containing substrate, wherein the germano-silicide contact layer contains more Si than the underlying Ge-containing substrate. | 09-18-2008 |
20080311736 | METHODS OF FORMING OHMIC LAYERS THROUGH ABLATION CAPPING LAYERS - A method of forming an ohmic layer for a semiconductor device includes forming a metal layer on a Silicon Carbide (SiC) layer and forming an ablation capping layer on the metal layer. Laser light is impinged through the ablation capping layer to form a metal-SiC material. | 12-18-2008 |
20090075468 | System and Process for Producing Nanowire Composites and Electronic Substrates Therefrom - The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength. | 03-19-2009 |
20090130837 | IN SITU DEPOSITION OF A LOW K DIELECTRIC LAYER, BARRIER LAYER, ETCH STOP, AND ANTI-REFLECTIVE COATING FOR DAMASCENE APPLICATION - The present invention provides a SiC material, formed according to certain process regimes, useful as a barrier layer, etch stop, and/or an ARC, in multiple levels, including the pre-metal dielectric (PMD) level, in IC applications and provides a dielectric layer deposited in situ with the SiC material for the barrier layers, and etch stops, and ARCs. The invention may also utilize a plasma containing a reducing agent, such as ammonia, to reduce any oxides that may occur, particularly on metal surfaces such as copper filled features. This particular SiC material is useful in complex structures, such as a damascene structure and is conducive to in situ deposition, especially when used in multiple capacities for the different layers, such as the barrier layer, the etch stop, and the ARC and can include in situ deposition of the associated dielectric layer(s). | 05-21-2009 |
20090233435 | SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD THEREOF - A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form Al | 09-17-2009 |
20090280635 | METHOD OF FORMING AN ELECTRONIC DEVICE USING A SEPARATION-ENHANCING SPECIES - A method of forming an electronic device can include forming a metallic layer by an electrochemical process over a side of a substrate that includes a semiconductor material. The method can also include introducing a separation-enhancing species into the substrate at a distance from the side, and separating a semiconductor layer and the metallic layer from the substrate, wherein the semiconductor layer is a portion of the substrate. In a particular embodiment, the separation-enhancing species can be incorporated into a metallic layer and moved into the substrate, and in particular embodiment, the separation-enhancing species can be implanted into the substrate. In still another embodiment, both the techniques can be used. In a further embodiment, a dual-sided process can be performed. | 11-12-2009 |
20110092063 | Method of manufacturing silicon carbide semiconductor device - In a method of manufacturing a silicon carbide semiconductor device, a semiconductor substrate made of silicon carbide and having first and second opposing surfaces is prepared. The second surface of the semiconductor substrate is processed so that a surface roughness of the second surface is less than or equal to 10 nm and a value of (100%-reflectance-transmittance) at a wavelength of a laser light is greater than or equal to 80%. A metal layer is formed on the second surface of the semiconductor substrate after the processing the second surface. The metal layer is irradiated with the laser light and thereby an ohmic electrode is formed on the second surface. | 04-21-2011 |
20110287626 | OHMIC ELECTRODE AND METHOD OF FORMING THE SAME - The invention provides an ohmic electrode of a p-type SiC semiconductor element, which includes an ohmic electrode layer that is made of Ti | 11-24-2011 |
20120238090 | PRODUCTION METHOD FOR THICK FILM METAL ELECTRODE AND PRODUCTION METHOD FOR THICK FILM RESIST - One object of the present invention is to provide a method for producing a thick film metal electrode that is able to form a positive-negative reverse type resist, which has a thickness of 7 μm or more and excellent in-plane uniformity, on the circuit element formed on the silicon carbide substrate, and a method for producing a thick film resist, and the present invention provides a method for producing a thick film resist wherein a first positive-negative reverse type resist having a first viscosity is formed on an upper surface of a circuit element layer which is treated with HMDS, and a second positive-negative reverse type resist having a second viscosity, which is larger than the first viscosity, on the first positive-negative reverse type resist such that a total thickness of the first and second positive-negative reverse type resists constituting a thick film resist be 7 μm or more. | 09-20-2012 |
20130072010 | NITRIDE SEMICONDUCTOR DEVICE - A nitride semiconductor device includes a silicon substrate, a nitride semiconductor layer formed on the silicon substrate, and metal electrodes formed in contact with the silicon substrate. The metal electrodes has first metal layers which are formed in a shape of discrete islands and in contact with the silicon substrate, and second metal layers which are in contact with the silicon substrate exposed among the islands of the first metal layers and are formed to cover the first metal layers. Further, the second metal layers are made of a metal capable of forming ohmic contact with silicon, and the first metal layers are made of an alloy containing a metal and silicon, in which the metal is different than that in the second metal layer. | 03-21-2013 |
20130143398 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300° C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes. | 06-06-2013 |
20140051241 | METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE - A surface of a silicon carbide substrate on which a graphite layer is formed is covered with a metal layer which can form carbide. Then, the silicon carbide substrate is annealed to cause reaction between a metal in the metal layer which can form carbide and carbon in the graphite layer so as to change the graphite layer between the metal layer which can form carbide and the silicon carbide substrate to a metal carbide layer. Thus, the graphite layer is removed. The adhesion between the metal layer which can form carbide and the silicon carbide substrate can be improved so that separation of the metal layer which can form carbide can be suppressed. Graphite deposits can be suppressed due to the removal of the graphite layer so that separation of a wiring metal film formed on a surface of the metal layer which can form carbide can be suppressed. | 02-20-2014 |
20150024586 | METHOD FOR PRODUCING A MONOCRYSTALLINE METAL/SEMICONDUCTOR COMPOUND - In the method for producing a monocrystalline metal-semiconductor compound on the surface of a semiconducting functional layer, initially a supply layer comprising the metal is applied to the functional layer. Thereafter, the reaction between the metal and the functional layer is triggered by way of annealing. The supply layer ends at no greater than a layer thickness of 5 nm from the surface of the functional layer, or it transitions at no greater than this layer thickness into a region in which the metal diffuses more slowly than in the region that directly adjoins the functional layer. This measure advantageously allows diffusion flow of the metal into the functional layer to be prevented. This depends precisely on whether the metal-semiconductor compound is monocrystalline. The supply layer can comprise at least two layers made of the metal or an alloy of the metal, which are separated from each other by a diffusion barrier, but can also comprise a layer that is made of the metal and that directly adjoins the functional layer and at least one layer made of an alloy of the metal. | 01-22-2015 |
20150064898 | FABRICATION METHOD OF SILICON CARBIDE SEMICONDUCTOR DEVICE - A first metal layer ( | 03-05-2015 |
20150079781 | SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In a manufacturing method of a silicon carbide semiconductor device, a semiconductor substrate made of single crystal silicon carbide is prepared. At a portion of the semiconductor substrate where a first electrode is to be formed, a metal thin film made of electrode material including an impurity is formed. After the metal thin film is formed, the first electrode including a metal reaction layer in which the impurity is introduced is formed by irradiating the metal thin film with a laser light. | 03-19-2015 |
20150093890 | COBALT METAL PRECURSORS - A metal precursor and a method comprising decomposing a metal precursor on an integrated circuit device; and forming a metal from the metal precursor, wherein the metal precursor is selected from the group consisting of (i) a Co | 04-02-2015 |
20150132939 | METHOD FOR DEPOSITING METAL LAYERS ON GERMANIUM-CONTAINING FILMS USING METAL CHLORIDE PRECURSORS - A method is provided for forming a semiconductor device. According to one embodiment, the method includes providing a substrate having a Ge-containing film thereon, identifying a first plasma processing recipe that uses a metal chloride precursor to deposit a first metal layer on the Ge-containing film at a higher rate than the Ge-containing film is etched by the metal chloride precursor, identifying a second plasma processing recipe that uses the metal chloride precursor to etch the Ge-containing film at a higher rate than a second metal layer is deposited on the Ge-containing film by the metal chloride precursor, performing the first plasma processing recipe to deposit the first metal layer on the Ge-containing film, and performing the second plasma processing recipe to deposit the second metal layer on the first metal layer, and where the second metal layer is deposited at a higher rate than the first metal layer. | 05-14-2015 |
20150371856 | METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE - A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface is prepared. A surface electrode is formed in contact with the first main surface of the silicon carbide substrate. An adhesive tape is adhered to the surface electrode so as to cover the surface electrode. The silicon carbide substrate is heated at a first pressure lower than atmospheric pressure, with the adhesive tape being adhered to the surface electrode. After the silicon carbide substrate is heated, the second main surface of the silicon carbide substrate is ground. After the second main surface is ground, the second main surface of the silicon carbide substrate is processed at a second pressure lower than atmospheric pressure, with the adhesive tape being adhered to the surface electrode. | 12-24-2015 |
20160056040 | METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE - A silicon carbide layer having a main surface and including a p-type region and an n-type region in contact with the p-type region is prepared. A metal layer in contact with the p-type region and the n-type region at the main surface is formed. The p-type region, the n-type region, and the metal layer are annealed. The step of forming a metal layer includes the steps of forming a first region in contact with the p-type region and the n-type region at the main surface and forming a second region arranged to be in contact with a surface of the first region opposite to a surface in contact with the main surface. The first region has an aluminum element and a silicon element. The second region has a titanium element. | 02-25-2016 |
20160056041 | METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE - A method of manufacturing a silicon carbide semiconductor device includes the steps of preparing a silicon carbide substrate, forming a first electrode on the silicon carbide substrate, establishing ohmic contact between the silicon carbide substrate and the first electrode by irradiating the first electrode with laser beams, and forming a second electrode on the first electrode. In the step of establishing ohmic contact, a surface of the first electrode is irradiated with laser beams such that arithmetic mean roughness of a surface of the second electrode is not greater than 0.2 μm. | 02-25-2016 |
20160155640 | MANUFACTURING METHOD OF SILICON CARBIDE SEMICONDUCTOR DEVICE | 06-02-2016 |
20220139784 | METHOD OF SIMULTANEOUS SILICIDATION ON SOURCE AND DRAIN OF NMOS AND PMOS TRANSISTORS - A method and apparatus for the formation of a metal-oxide semiconductor FET (MOSFET) device is disclosed herein. The method of formation includes the utilization of a silicon-germanium seed layer deposited over an n-channel metal-oxide semiconductor (NMOS) device and a p-channel metal-oxide semiconductor (PMOS) device. The seed layer may be one seed layer deposited over both the NMOS source/drain regions and the PMOS source/drain regions or two doped seed layers wherein a first doped seed layer is deposited over the PMOS source/drain regions and a second doped seed layer is deposited over the NMOS source/drain regions. The seed layer enables simultaneous formation of a silicide over both the PMOS source/drain regions and the NMOS source/drain regions. The silicide formation consumes the seed layer and forms a silicide layer which varies in composition depending upon the composition of the absorbed seed layer. | 05-05-2022 |
438604000 | III-V compound semiconductor | 14 |
20100048016 | Semiconductor device manufacturing method - A semiconductor device manufacturing method includes: providing a laminated member in which at least a first GaAs layer, an InAlGaAs layer and a second GaAs layer are laminated on or above a substrate in this order; and etching the second GaAs layer using the InAlGaAs layer as an etching stopper layer. A ratio of In:Al of the InAlGaAs layer is in a range of approximately 4:6 to approximately 6:4 and a ratio of (In+Al):Ga of the InAlGaAs layer is in a range of approximately 1.5:8.5 to approximately 5:5. | 02-25-2010 |
20100216301 | FABRICATING A DEVICE WITH A DIAMOND LAYER - In one aspect, a method includes forming a silicon dioxide layer on a surface of a diamond layer disposed on a gallium nitride (GaN)-type layer. The method also includes etching the silicon dioxide layer to form a pattern. The method further includes etching portions of the diamond exposed by the pattern. | 08-26-2010 |
20110201191 | METHOD FOR NONDESTRUCTIVE LIFT-OFF OF GaN FROM SAPPHIRE SUBSTRATE UTILIZING A SOLID-STATE LASER - A method for nondestructive laser lift-off of GaN from sapphire substrates utilizing a solid-state laser is disclosed in the present invention, wherein, a solid-state laser is used as the laser source, and a small laser-spot with a circumference of 3 to 1000 micrometers and a distance of two farthest corners or a longest diameter of no more than 400 micrometers is used for laser scanning point-by-point and line-by-line, wherein the energy in the small laser-spot is distributed such that the energy in the center of the laser-spot is the strongest and is gradually reduced toward the periphery. According to the present invention, a nondestructive laser lift-off with a small laser-spot is achieved, and a scanning mode of the laser lift-off is improved, thereby a lift-off method without the need of aiming is achieved. As a result, the laser lift-off process is simplified, and the efficiency is improved while the rejection rate is reduced, such that the obstacles of the industrialization of the laser lift-off process are removed. | 08-18-2011 |
20120015513 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes forming a recess to an AlGaN layer by etching, the AlGaN layer having an Al composition ratio of 0.2 or greater, the recess having a bottom having an RMS roughness less than 0.3 nm, forming a first Ta layer having a thickness of 4 nm to 8 nm on the bottom of the recess, and annealing the first Ta layer to make an ohmic contact in the AlGaN layer. | 01-19-2012 |
20160118240 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes: forming a first film on a nitride semiconductor layer so as to contact the nitride semiconductor layer and have a thickness equal to or larger than 1 nm and equal to or smaller than 5 nm, the first film being made of silicon nitride having a composition ratio of silicon to nitrogen larger than 0.75, silicon oxide having a composition ratio of silicon to oxygen larger than 0.5, or aluminum; and forming a source electrode, a gate electrode and a drain electrode on the nitride semiconductor layer. | 04-28-2016 |
438605000 | Multilayer electrode | 5 |
20080293231 | Method for forming electrode for Group-III nitride compound semiconductor light-emitting devices - A method for forming an electrode for Group-III nitride compound semiconductor light-emitting devices includes a step of forming a first electrode layer having an average thickness of less than 1 nm on a Group-III nitride compound semiconductor layer, the first electrode layer being made of a material having high adhesion to the Group-III nitride compound semiconductor layer or low contact resistance with the Group-III nitride compound semiconductor layer and also includes a step of forming a second electrode layer made of a highly reflective metal material on the first electrode layer. | 11-27-2008 |
20130052816 | METHOD OF PRODUCING SEMICONDUCTOR TRANSISTOR - A method of producing a semiconductor transistor involving formation of an ohmic electrode on an active layer composed of a GaN-based semiconductor includes a process of forming a first layer | 02-28-2013 |
20130109168 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 05-02-2013 |
20140235048 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes forming ohmic electrodes on a source region and a drain region of a nitride semiconductor layer, forming a low-resistance layer between an uppermost surface of the nitride semiconductor layer and the ohmic electrodes by annealing the nitride semiconductor layer, removing the ohmic electrodes from at least one of the source region and the drain region. after forming the low-resistance layer, and forming at least one of a source electrode and a drain electrode on the low-resistance layer, the at least one of a source electrode and a drain electrode having an edge, a distance between the edge and a gate electrode is longer than a distance between an edge of the low-resistance layer and the gate electrode. | 08-21-2014 |
20160118542 | Method for Fabricating CMOS Compatible Contact Layers in Semiconductor Devices - A method for fabricating Complementary Metal Oxide Semiconductor (CMOS) compatible contact layers in semiconductor devices is disclosed. In one embodiment, a nickel (Ni) layer is deposited on a p-type gallium nitride (GaN) layer of a GaN based structure. Further, the GaN based structure is thermally treated at a temperature range of 350° C. to 500° C. Furthermore, the Ni layer is removed using an etchant. Additionally, a CMOS compatible contact layer is deposited on the p-type GaN layer, upon removal of the Ni layer. | 04-28-2016 |
438606000 | Ga and As containing semiconductor | 4 |
20080220606 | SELF-ALIGNED METAL TO FORM CONTACTS TO Ge CONTAINING SUBSTRATES AND STRUCTURE FORMED THEREBY - A method for forming germano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step. The method of the present invention provides a structure having a germano-silicide contact layer atop a Ge-containing substrate, wherein the germano-silicide contact layer contains more Si than the underlying Ge-containing substrate. | 09-11-2008 |
20110201192 | METHOD OF PROCESSING BACKSIDE COPPER LAYER FOR SEMICONDUCTOR CHIPS - A method of processing copper backside metal layer for semiconductor chips is disclosed. The backside of a semiconductor wafer, with electronic devices already fabricated on the front side, is first coated with a thin metal seed layer by either electroless plating or sputtering. Then, the copper backside metal layer is coated on the metal seed layer. The metal seed layer not only increases the adhesion between the front side metal layer and the copper backside metal layer through backside via holes, but also prevents metal peeling from semiconductor's substrate after subsequent fabrication processes, which is helpful for increasing the reliability of device performances. Suitable materials for the metal seed layer includes Pd, Au, Ni, Ag, Co, Cr, Pt, or their alloys, such as NiP, NiB, AuSn, Pt—Rh and the likes. The use of Pd as seed layer is particularly useful for the copper backside metal layer, because the Pd layer also acts as a diffusion barrier to prevent Cu atoms entering the semiconductor wafer. | 08-18-2011 |
20110312176 | FORMING AN ELECTRODE HAVING REDUCED CORROSION AND WATER DECOMPOSITION ON SURFACE USING AN ORGANIC PROTECTIVE LAYER - Accordingly, the present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A substrate which has a conductive layer disposed thereon is provided and the conductive layer has an oxide layer with an exposed surface. The exposed surface of the oxide layer contacts a solution of an organic surface active compound in an organic solvent to form a protective layer of the organic surface active compound over the oxide layer. The protective layer has a thickness of from about 0.5 nm to about 5 nm and ranges therebetween depending on a chemical structure of the surface active compound. | 12-22-2011 |
20120021597 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device including: forming a silicon layer on an upper face of a nitride semiconductor layer including a channel layer of a FET; thermally treating the nitride semiconductor layer in the process of forming the silicon layer or after the process of forming the silicon layer; and forming an insulating layer on an upper face of the silicon layer after the process of forming the silicon layer. | 01-26-2012 |