Entries |
Document | Title | Date |
20080224777 | RAIL-TO-RAIL AMPLIFIER CIRCUIT AND SEMICONDUCTOR DEVICE - A rail-to-rail amplifier for amplifying an analog signal from a DAC includes a first differential input section, which includes an n-channel transistor pair, a second differential input section, which includes a p-channel transistor pair, a first current supply provided between the second differential input section and a high voltage side supply, and a current controller for the second input section provided between the first current supply and the second differential input section for controlling the current supply to the second differential input section in accordance with data of a predetermined bit position in input digital data to the DAC. A second current supply is provided between a low voltage side supply and the first differential input section and a current controller for the first input section is provided between the second current supply and the first differential input section for controlling the current supply to the first differential input section in accordance with data of a predetermined bit position in input digital data to the DAC. | 09-18-2008 |
20080231366 | Method and System for a Low Noise Amplifier with Tolerance to Large Inputs - Methods and systems for a low noise amplifier with tolerance to large inputs are disclosed. Aspects of one method may include providing an individual current source for each input transistor to a low noise amplifier (LNA), wherein the individual current sources may be isolated from each other when the LNA is turned off. The individual current sources may also form a common current source for the input transistors when the LNA is turned on. Accordingly, the input transistors to the LNA may float when the LNA is turned off, thereby coupling the input signal voltage to the source and drain terminals. The individual current sources may be isolated from each other by a coupling transistor that is turned off. When the LNA is turned on, the coupling transistor may be turned on to couple the individual current sources to each other to form the common current source for the input transistors. | 09-25-2008 |
20080238549 | AMPLIFIER ELECTRONIC CIRCUIT COMPRISING A DIFFERENTIAL PAIR AND A FEEDBACK SYSTEM - An amplifier electronic circuit with at least one amplifier stage, including a differential pair that includes two input transistors controlled by respective input signals and means for measuring the common mode output voltage of the amplifier, includes at least one first electronic component and one second electronic component, each electronic component comprising a first gate and a second gate, a source and a drain, the first gates of the first and second electronic components being interconnected and connected to the drain of the first electronic component, one of the second gates of the electronic components receiving the measured common mode output voltage, the other of the second gates receiving a reference voltage. The amplifier electronic circuit may be used in applications using differential pairs, for example, an amplifier, an oscillator, or active filters. | 10-02-2008 |
20080272846 | Adaptive biasing input stage and amplifiers including the same - An adaptive biasing input stage includes pairs of differentially coupled amplifying and sensing field effect transistors having gates with differential inputs applied thereon. In addition, a static current source is coupled to sources of the amplifying and sensing field effect transistors at a predetermined node. Also, current mirrors are coupled to the sensing field effect transistors for forming loop mechanisms for increasing the current through the predetermined node when the differential inputs have a non-zero difference. | 11-06-2008 |
20080278233 | BUFFER DRIVE - The present invention relates to a CMOS buffer circuit for liquid crystal display (LCD) drivers, which includes a single stage operational transconductance amplifier (OTA) with a differential of transistors for receiving a differential input voltage, a bias current source coupled to the differential pair and a single-ended output, the first bias current generating stage with a differential pair of transistors coupled to receive the differential input voltage to produce an output current in an output current path in response to a positive differential input voltage, a second bias current generating stage with a differential pair of transistors coupled to receive the inverted differential input voltage to produce an output current in an output current path in response to a negative input voltage, wherein the output current paths of both bias current generating stages are combined in a common current path and the current in the common current path is mirrored to the bias current source of the single stage OTA, so as to increase the bias current through the bias current source in response to an increasing magnitude of the differential input voltage. | 11-13-2008 |
20080284514 | DIFFERENTIAL AMPLIFIER WITH MULTIPLE SIGNAL GAINS AND WIDE DYNAMIC RANGE - A circuit and method for amplifying a differential input signal over a wide dynamic range using multiple signal gains such that, over a predetermined range of values of the differential input signal, a ratio of the differential output signal to the differential input signal varies in relation to a continuous combination of the multiple signal gains. | 11-20-2008 |
20080290944 | MICROPOWER NEURAL AMPLIFIER WITH ADAPTIVE INPUT-REFERRED NOISE - A micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays is provided. The micropower neural amplifier includes a low noise gain stage. The low noise gain stage is implemented using an amplifier and pseudoresistor elements. | 11-27-2008 |
20090015332 | STARTUP CIRCUIT FOR SUBREGULATED AMPLIFIER - A multi-stage circuit has a first stage powered by the output voltage of a next stage. A current source within the first stage provides a tail current for a differential amplifier within the first stage. When the first stage has an operating voltage high enough for proper operation, this tail current is at a nominal level; if the voltage is too low for proper operation of the first stage, the tail current is below this nominal level. A comparator, which has one input coupled to a node within this current source, a second input coupled to a threshold voltage, and an output coupled to a control node within the next stage, provides an output indicative of whether or not the tail current is substantially at its nominal level. If tail current is too low, the comparator provides a forcing signal to the control node of the next stage which causes the output of the next stage to be at a substantially nominal level regardless of the voltage at its input, thus providing a suitably high voltage for the first stage to begin normal operation. When the tail current reaches its nominal level, the comparator output changes state to one which has little or no effect on the output voltage of the second stage, and normal operation of the overall circuit begins. | 01-15-2009 |
20090027126 | METHOD FOR ADAPTIVE BIASING OF FULLY DIFFERENTIAL GAIN BOOSTED OPERATIONAL AMPLIFIERS - An adaptive biasing technique improves fully differential gain boosted operational amplifiers transient characteristics and reduces power consumption. An adaptive biasing module includes a bias generation module and a bias replication module. The bias generation module generates a first control signal (VCMNB) and the first control signal is applied as an output common mode of a differential booster (inside the bias replication module). The bias replication module is coupled to the bias generation module for equalizing a common mode of the differential booster with the first control signal (VCMNB). | 01-29-2009 |
20090033422 | Multi-level slew and swing control buffer - A buffer amplifier and an associated method have been provided for slew rate and swing level control in the buffering of a signal. The method accepts an input signal having a voltage swing, a swing control signal, and a slew rate control signal. The voltage swing for each output in a set of serially-connected buffer stages is selected in response to the swing control signal. The selected voltage swing for a subset of buffer stages is modified in response to the slew rate control signal. Selecting the voltage swing for each output entails selecting a source current for each buffer stage. A bias current is generated and mirrored through a current source connected to each buffer stage. Modifying the selected voltage swing for each of the subset of buffer stages includes modifying the bias current to the subset of buffer stages. | 02-05-2009 |
20090058529 | Resistively Loaded Single Stage Differential Amplifier Having Zero Volt Common Mode Input - A resistively folded single stage differential amplifier capable of accommodating a low input common mode without impacting the performance of a bias current source, while also providing a high input impedance to allow for the use of the linear termination resistors. The differential amplifier provides an amplified output signal with a common mode referenced to an upper bound of an input power supply. The differential amplifier includes an input sub-stage and a transistor sub-stage resistively folding the input sub-stage. | 03-05-2009 |
20090079503 | Overload recovery circuit for folded cascode amplifiers - In a method and apparatus for rapidly recovering an improved amplifier from an overload condition, a cascode amplifier (CASA) having a pair of inputs and an output is coupled to an overload recovery circuit (ORC). The pair of inputs is coupled to receive a differential input signal. A deviation in the differential input signal that is greater than a threshold causes a deviation in a current provided to at least one transistor included in the CASA. The deviation in the current causes the CASA to operate in an overload condition (OC). The ORC includes a makeup current circuit operable to generate an overload current in response to the OC and a controller operable to control a voltage at the output during the OC. The controller coupled to the makeup current circuit provides the overload current to the CASA to enable the rapid recovery from the OC. | 03-26-2009 |
20090108938 | CIRCUIT AND METHOD FOR DYNAMIC CURRENT COMPENSATION - An operational amplifier includes a first stage and a second stage, the first stage for receiving two input signals and the second stage being coupled to the first stage, wherein the second stage includes a first part with a first output of the operational amplifier, and a second part with a second output of the operational amplifier. A method includes providing a first current to the first part of the second stage, and providing a second current to the second part of the second stage. The method further includes adjusting the first current based on a current consumption of the first part of the second stage, and adjusting the second current based on a current consumption of the second part of the second stage, wherein the sum of the first current and the second current is substantially constant. | 04-30-2009 |
20090115524 | OUTPUT STAGE CIRCUIT AND OPERATIONAL AMPLIFIER THEREOF - The present invention relates to an output stage circuit and an operational amplifier thereof. In the output stage circuit, one of a gate of a transistor is coupled to a gate of a bias transistor and a level shifter in response to a small signal outputted from an amplifying circuit in the operational amplifier. In addition, a gate voltage of the bias transistor is controlled by a voltage generating circuit to control a DC bias of the transistor of the output stage circuit. Therefore, extra frequency compensating components for compensating the transistor of the output stage circuit is no longer necessary, and saving circuit layout area and cost can be achieved by the present invention. | 05-07-2009 |
20090179701 | FAST SWITCH FOR CONTROLLING A DIFFERENTIAL-PAIR AMPLIFIER - A differential-pair amplifier comprising a transistor pair. The differential-pair amplifier includes a current source coupled to the transistor pair for providing a bias current to the transistor pair. The differential-pair amplifier also includes a switching mechanism coupled to the transistor pair for steering the bias current away from the transistor pair when disabling the amplifier operation. A system and method in accordance with the present invention allows fast enabling and disabling of a differential-pair amplifier. This fast switching technique can be used in the signal paths where the switching time is critical. | 07-16-2009 |
20090195313 | BOOSTED TAIL-CURRENT CIRCUIT - A circuit includes a pair of input transistors configured as a differential pair and having input terminals configured to receive an input voltage. The circuit also includes a first current source connected to and configured to provide a first tail current to the pair of input transistors, the first tail current being a class-A current having a non-zero quiescent value. The circuit also includes a second current source connected to and configured to provide a second tail current to the pair of input transistors, the second tail current being a class-B current having a zero quiescent value and a non-zero non-quiescent value. The second current source is configured to provide the second tail current as a function of the input voltage. | 08-06-2009 |
20090219096 | OPEN LOOP DC CONTROL FOR A TRANSIMPEDANCE FEEDBACK AMPLIFIER - A transimpedance amplifier having open-loop DC control is provided. The open-loop feedback control may provide a DC bias that is configurable based on the characteristics of an input device, such as, a photodiode or a magnetoresistor. The open-loop feedback control may provide quick recovery from voltage level variations and may provide stability for the amplifier. | 09-03-2009 |
20090267694 | APPARATUS FOR RECEIVING INPUT AND BIAS SIGNALS AT COMMON NODE - An apparatus includes an input-bias node and an internal load. The input-bias node is configured to simultaneously receive an input signal and a bias signal through an input-bias port. The internal load is connected between the input-bias node and multiple output ports, at least one of the output ports outputting an output signal based on the input signal received at the input-bias node. | 10-29-2009 |
20090267695 | Class AB output stage with programmable bias point control - A class AB output stage includes a driver to generate a first drive signal and a second drive signal, and two bias voltage sources to provide two bias voltages to level shift the first and second drive signals, in order to drive a pair of high side and low side transistors, respectively. A control circuit provides a control signal to adjust the first and second bias voltages, so as to shift the bias point of the class AB output stage. The control signal is determined according to the currents in the high side and low side transistors and a programmable parameter. By adjusting the parameter, the bias point deviation can be removed to obtain both low quiescent current and best THD performance. | 10-29-2009 |
20090278604 | Operational Amplifier and Related Method of Enhancing Slew Rate - An operational amplifier capable of enhancing slew rate is disclosed. The operational amplifier includes a first current generator for generating a first bias current, a second current generator for generating a second bias current, an amplification stage, coupled to the first current generator, for generating a amplification signal according to an input signal, an output stage, coupled to the second current generator and the amplification stage, for generating an output signal according to the amplification signal, and a bias current allocation unit, coupled to the first current generator, the second current generator, the amplification stage and the output stage, for reallocating current intensities of the first bias current and the second bias current according to a control signal. | 11-12-2009 |
20090289715 | AMPLIFIER WITH IMPROVED LINEARIZATION - According to some embodiments, an amplifier may include a transconductance stage, a tail current source stage, and an adaptive biasing stage. The transconductance stage may be configured to receive an input voltage. The tail current source stage may be configured to provide current to the transconductance stage. The adaptive biasing stage may capacitively couple the transconductance stage to the tail current source stage. | 11-26-2009 |
20090289716 | Amplifier circuit having dynamically biased configuration - Methods and corresponding systems for amplifying an input signal include inputting first and second differential input signals into first and second circuit legs, respectively, wherein the first circuit leg includes a first transistor coupled in series with a first variable current source, and wherein the second circuit leg includes a second transistor coupled in series with a second variable current source. The first and second variable current sources are dynamically set to provide first and second bias currents in response to the first and second differential input signals, wherein the first bias current is set inversely proportional to the second bias current. The first and second bias currents are sunk in the first and second circuit legs, respectively. First and second differential output signals are output from the first and second circuit legs, respectively. | 11-26-2009 |
20100013558 | Driving Circuit Capable of Enhancing Response Speed and Related Method - A driving circuit of enhancing response speed is disclosed. The driving circuit includes an operational amplifier and a slew rate enhancement unit. The operational amplifier is utilized for generating a driving voltage according to an input voltage. The slew rate enhancement unit is coupled to the operational amplifier, and is utilized for generating a compensation current to the operational amplifier to enlarge a bias current of the operational amplifier according to voltage difference between the input voltage and the driving voltage when variation of the input voltage occurs. | 01-21-2010 |
20100045382 | BIAS CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE BIAS CIRCUIT - A plurality of analog signals are input to input terminals of an analog signal processing circuit ANA | 02-25-2010 |
20100066450 | High-Speed Low-Power Differential Receiver - A low-voltage differential communication system includes a low- and programmable-swing voltage-mode transmitter that delivers a low-voltage differential signal to a receiver via differential channel. The receiver employs two input transistors, each in a common-gate configuration, to recover the low-voltage differential signal. A current source in the receiver biases the input transistors such that their source voltages are nominally biased at the common-mode voltage of the differential signal, and their gate-source voltages remain essentially constant with common-mode-voltage fluctuations. | 03-18-2010 |
20100141342 | AMPLIFICATION CIRCUIT AND METHOD THEREFOR - In one embodiment, an amplification circuit charges a filter capacitor ( | 06-10-2010 |
20100148871 | SYSTEMS AND METHODS FOR AN ADAPTIVE BIAS CIRCUIT FOR A DIFFERENTIAL POWER AMPLIFIER - Systems and methods for providing an adaptive bias circuit that may include a differential amplifier, low-pass filter, and common source amplifier or common emitter amplifier. The adaptive bias circuit may generate an adaptive bias output signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit may increase the bias voltage or bias current of the adaptive bias output signal. A power amplifier (e.g., a differential amplifier) may be biased according to the adaptive bias output signal in order to reduce current consumption at low power operation levels. | 06-17-2010 |
20100156536 | SYSTEMS AND METHODS FOR SELF-MIXING ADAPTIVE BIAS CIRCUIT FOR POWER AMPLIFIER - Systems and methods for providing a self-mixing adaptive bias circuit that may include a mixer, low-pass filter or a phase shifter, and a bias feeding block. The self-mixing adaptive bias circuit may generate an adaptive bias signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit increases the bias voltage or bias current such that the amplifier will save current consumption at low power operation levels and obtain better linearity at high power operation levels compared to conventional biasing techniques. Moreover, the adaptive bias output signal can be used to cancel the third-order intermodulation terms (IM3) to further enhance the linearity as a secondary effect. | 06-24-2010 |
20100164627 | COMPARATOR CIRCUIT FOR COMPARING THREE INPUTS - A comparator circuit. A comparator circuit may include a differential amplifying unit to amplify a difference between a voltage at a first node and a voltage at a second node and/or output a resultant voltage, and/or a current source to supply a first bias current to a first node and/or supply a second bias current to a second node. A comparator may include a first bias switch to bias a current flowing from a first node to a ground voltage source, a second bias switch to bias a part of a current flowing from a second node to a ground voltage source, a third bias switch to bias a remaining part of a current flowing from a second node to a ground voltage source, and/or a bias converting unit to supply a third bias current to a second node. | 07-01-2010 |
20100237944 | Amplifier System With Digital Adaptive Power Boost - An amplifier system with digital adaptive power boost includes a charge pump for providing a power supply to an amplifier. The charge pump may switch between a fixed input DC voltage and a boosted value for a certain period of time in response to an increase in an input signal to the amplifier. The charge pump may use a switching transistor which is switched on only when the input signal to the amplifier exceeds a threshold. The amplifier system may be used for envelope tracking, especially for envelope tracking of low duty cycle signals, e.g., xDSL or vDSL. | 09-23-2010 |
20100308914 | LOW NOISE AMPLIFIER - A low noise amplifier including an amplifier kernel circuit and a DC bias unit is provided. The amplifier kernel circuit is used for receiving a single input signal or a differential input signal so as to output a differential output signal. The DC bias unit is coupled to the amplifier kernel circuit, and is used for processing a signal source to generate the single input signal or the differential input signal according to its circuit configuration. | 12-09-2010 |
20110050343 | BIAS CIRCUIT AND AMPLIFIER PROVIDING CONSTANT OUTPUT CURRENT FOR A RANGE OF COMMON MODE INPUTS - Bias circuits, amplifiers and methods are provided, such as those for providing bias signals over a range of common mode inputs for an amplifier to output a constant current. One example of a bias circuit is configured to generate a bias signal having a voltage magnitude according to a reference signal. The reference signal is indicative of a common mode input level of an input signal of the amplifier circuit and the bias circuit is further configured to adjust the bias signal over a range of common mode input levels. An amplifier receiving the bias signal is configured to generate an output signal in response to an input signal and drive an output current based on the voltage magnitude of the bias signal provided by the bias circuit. | 03-03-2011 |
20110109390 | TRANSCONDUCTOR CIRCUIT - A transconductor circuit, particularly according to the multi-tanh principle, having a first input node and a second input node, a first differential amplifier coupled to the first and second input nodes, and having a first offset voltage, and a second differential amplifier coupled to the first and second input nodes, and having a second offset voltage different from the first offset voltage. A first resistance circuit is coupled between the first differential amplifier and at least one current source, and a second resistance circuit is coupled between the second differential amplifier and the at least one current source. Varying of the current sources enables control of the transconductance without degrading linearity. | 05-12-2011 |
20110156816 | Biasing Circuit for Differential Amplifier - The invention concerns a biasing circuit for controlling the current flowing through a differential pair ( | 06-30-2011 |
20110181359 | APPARATUS AND METHOD FOR PROVIDING LINEAR TRANSCONDUCTANCE AMPLIFICATION - Apparatus and methods are disclosed, such as those involving a transconductance amplifier. One such apparatus includes a transconductance amplifier comprising an input to receive an input voltage signal, and an output to provide an output current signal at least partly in response to the input voltage signal. The apparatus also includes a linearizer configured to remove non-linearity in the output current signal such that the output current signal is substantially linear when the input voltage signal is within a range; and a current booster configured to add a current to the output current signal such that the output current signal is substantially linear when the input voltage signal is outside the range. The current booster allows the amplifier to have a linear response to a larger voltage swing without adding noise. | 07-28-2011 |
20110199157 | DIFFERENTIAL AMPLIFIER, METHOD FOR INVERTING OUTPUT POLARITY OF THE SAME, AND SOURCE DRIVER - A differential amplifier includes: an output amplifier circuit; a bias circuit; and a pulse applying circuit. The output amplifier circuit receives a positive gradation voltage and a negative gradation voltage alternately by an input stage circuit and supplies a drive voltage generated based on the gradation voltage to a display panel. The bias circuit generates a bias voltage in synchronization with a strobe signal which is a trigger for a polarity inverting operation of the gradation voltage and applies the bias voltage to a constant current source controlling a current of the input stage circuit. The pulse applying circuit generates a pulse voltage having a voltage level higher than a voltage level of the bias voltage and couples the pulse voltage to the bias voltage. | 08-18-2011 |
20110254626 | AMPLIFICATION CIRCUIT - An amplification circuit may include an input differential pair including a first transistor receiving a positive input voltage and a second transistor receiving a negative input voltage, a first resistor that generates a difference current corresponding to a difference voltage between the positive input voltage and the negative input voltage, an output differential pair including a third transistor supplying a negative output voltage and a fourth transistor supplying a positive output voltage, a second resistor connected to a reference voltage to receive the difference current generated by the first resistor, and a bias circuit that supplies a bias current to the first transistor, the second transistor, the third transistor, and the fourth transistor. The first transistor, the second transistor, the third transistor, and the fourth transistor may have the same polarity. | 10-20-2011 |
20110267145 | COMPARISON APPARATUS AND SPEED-UP METHOD FOR COMPARATOR - A comparison apparatus and a speed-up method for comparator are provided. The comparison apparatus consists of a comparator and a bias modulator. The bias modulator receives input signals of the comparator to provide a set of output signals modulated according to the input signals. The set of output signals dynamically adjust body voltages of transistors in a positive feedback network of the comparator to increase a switching speed of the transistors. Therefore, an operation speed of the comparator can also be increased. | 11-03-2011 |
20110298541 | RAIL-TO-RAIL INPUT STAGE CIRCUIT WITH DYNAMIC BIAS CONTROL - An improved rail-to-rail (R-R) input stage circuit with dynamic bias control is described. Input stage circuit includes a differential pair circuit, a level shifted differential pair and a bias control circuit. The differential pair circuit and the level shifted differential pair are of same type, non-complementary MOS devices. In exemplary embodiments, a first and a second bias control circuits dynamically control the bias current of the level shifted differential pair and the bias current of the differential pair circuit, respectively, in response to the input common mode voltage of the rail-to-rail input stage circuit. First and second bias control circuits maintain the output impedance of the R-R input stage circuit at a desired level, as the R-R input stage circuit operates outside the input common mode voltage range supported by the level shifted differential pair and the differential pair circuit, respectively. Further exemplary embodiments include a first and a second gm control circuits. Gm control circuits maintain the transconductance of the R-R input stage circuit substantially constant over the entire input common mode voltage range of the R-R input stage circuit. | 12-08-2011 |
20120007677 | Class AB Operational Amplifier and Output Stage Quiescent Current Control Method - A class AB operational amplifier includes: a first transistor, for generating a first current; a second transistor, where a second source voltage of the second transistor is equal to a first source voltage of the first transistor, for generating an output stage quiescent current; and an output stage quiescent current controller, coupled to a gate and a source of the first transistor, for controlling a first drain-to-source voltage of the first transistor to be equal to a second drain-to-source voltage of the second transistor. A ratio of the output stage quiescent current to the first current is equal to a ratio of a second W/L ratio of the second transistor to a first W/L ratio of the first transistor. | 01-12-2012 |
20120019324 | Amplifier With Improved Input Resistance and Controlled Common Mode - An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair having a gate coupled to a second input terminal; a first capacitor coupled to the second output terminal and to the gate of a first transistor of the first pair; a second capacitor coupled to the second output terminal and to the gate of a second transistor of the first pair; a third capacitor coupled to the first output terminal and to the gate of a third transistor of the second pair; and a fourth capacitor coupled to the first output terminal and to the gate of a fourth transistor of the second pair. | 01-26-2012 |
20120092071 | CLASS-AB OUTPUT STAGE - An output stage of a class-AB amplifier, including: a first transistor of a first channel type between a first terminal of application of a first voltage and an output terminal of the stage, having its gate connected to a first input terminal of the stage; a first transistor of a second channel type between this output terminal and a second terminal of application of the first voltage, having its gate connected to a second input terminal of the stage; and second and third transistors of the second channel type between the output terminal and the first transistor of the second channel type, the gate of the second transistor being connected to the midpoint of a resistive dividing bridge between said output terminal and the gate of the third transistor of the second channel type, and the gate of the third transistor being biased to a fixed voltage. | 04-19-2012 |
20120146727 | FAST POWER UP COMPARATOR - A circuit method includes periodically increasing a tail current of a differential stage of a comparator to periodically power on the differential stage to a power-on state, and periodically decreasing the tail current of the differential stage to periodically power down the differential stage to a low-power state. The periodically increasing of the tail current and the periodically decreasing of the tail current are asynchronous operations for powering on the differential stage to the power-on state and powering down the differential stage to the low-power state. Periodically increasing the tail current and the periodically decreasing the tail current asynchronously for powering on the differential stage to the power-on state and powering down the differential stage to the low-power state provide for low noise and high speed during signal comparison. | 06-14-2012 |
20120161873 | DIFFERENTIAL PAIR WITH CONSTANT OFFSET - A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage). | 06-28-2012 |
20120235746 | Amplifier - An amplifier comprising at least one amplifying element ( | 09-20-2012 |
20120249245 | OUTPUT BUFFER OF SOURCE DRIVER - An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a ground voltage (AGND). The comparator compares an input voltage and an output voltage and outputs a control signal to the bias current source according to the compared result to control a bias current outputted by the bias current source to enhance the slew rate of the output buffer. | 10-04-2012 |
20120268209 | PULSE ELECTRIC POWER AMPLIFICATION APPARATUS - An embodiment includes a first amplification device receiving a high frequency signal in an upstream stage in an initial stage unit and having a predetermined thermal time constant, a second amplification device in a downstream stage cascade-connected to the first amplification device and having a thermal time constant different from that of the first amplification device, and a final stage amplification device cascade-connected in a final stage downstream of the second amplification device. | 10-25-2012 |
20120286871 | SEMICONDUCTOR DEVICE - To provide a semiconductor device with low power consumption, in a semiconductor device including a differential amplifier to which an input potential and a reference potential are input, a gain stage, and an output stage from which an output potential is output, a potential supplied from the gain stage can be held constant by providing the output stage with a transistor with low leakage current in an off state. As the transistor with low leakage current in an off state, a transistor including an oxide semiconductor layer and a channel formation region included in the oxide semiconductor layer is used. | 11-15-2012 |
20120293264 | Power Control for Linear and Class AB Power Amplifiers - Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level. | 11-22-2012 |
20130002356 | OPERATIONAL AMPLIFIER - An operational amplifier including a primary differential input pair, a primary tail current source module, N auxiliary differential input pairs, and N auxiliary tail current source modules is disclosed. A first and a second input terminal of the primary differential input pair respectively receive a first and a second input signal, wherein first input signal and the second input signal are differential to each other. The primary tail current source module supplies a tail current to the primary differential input pair during a first time interval. A first and a second input terminal of each of the auxiliary differential input pairs respectively receive the first and the second input signal. Each of the auxiliary tail current source modules supplies an auxiliary tail current to the corresponding auxiliary differential input pair during a second time interval. The first time interval and the second time interval partially overlap each other. | 01-03-2013 |
20130009705 | SENSE AMPLIFIER HAVING LOOP GAIN CONTROL - Memories, sense amplifiers, and methods for amplifying a current input are disclosed, including a sense amplifier including a bias circuit configured to provide a bias voltage having a magnitude responsive to maintaining a substantially constant loop gain, and further including an amplifier stage coupled to the bias circuit to receive the bias voltage and configured to amplify a input current at an input-output node, a loop gain of the current amplifier stage is controlled at least in part to the bias voltage. | 01-10-2013 |
20130027135 | SYSTEMS AND METHODS FOR ADAPTIVE BIAS CIRCUITS FOR A POWER AMPLIFIER - Systems and methods may include an amplifier having at least a first input port, where the amplifier includes a first capacitance associated with the first input port; a first bias circuit, where the first bias circuit comprises a series connection of a first charging circuit and a first discharging circuit, wherein a first node between the first charging circuit and the first discharging circuit is connected to the first input port, wherein responsive to an RF input signal having at least a first predetermined level being received at the first input port, the first charging circuit charges the first capacitance associated with the first input port during a first portion of a cycle of the RF input signal, and discharges the first capacitance associated with the first input port during a second portion of the cycle, thereby controlling a DC bias voltage level available at the first input port. | 01-31-2013 |
20130043950 | COMMON MODE INPUT CONTROL FOR SWITCH CAPACITOR AMPLIFIER IN PIPELINE ANALOG-TO-DIGITAL CONVERTER - A common mode bias circuit may include a weak common mode bias generator and a common mode bias capacitance. During a first state of the common mode bias circuit, the weak common mode bias generator may be coupled to the common mode bias capacitance and may impart to them a predefined common mode signal level. During a second state of the common mode bias circuit, the common mode bias capacitance may be coupled to differential inputs of an amplifier in a manner that establishes an input common mode level for the amplifier. | 02-21-2013 |
20130113567 | SEMICONDUCTOR INTEGRATED CIRCUIT, AND RECEPTION APPARATUS AND RADIO COMMUNICATION TERMINAL INCLUDING SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes: a first capacitance element and a second capacitance element; a first amplification circuit that amplifies a potential difference of a first voltage signal and a second voltage signal supplied via the first capacitance element and the second capacitance element, respectively, to output a first amplification signal and a second amplification signal; a first resistance element that feeds back the first amplification signal to one input terminal of the first amplification circuit; a second resistance element that feeds back the second amplification signal to another input terminal of the first amplification circuit; a voltage generator that generates a predetermined voltage; and a third resistance element that transmits the predetermined voltage generated by the voltage generator to each input terminal of the first amplification circuit. | 05-09-2013 |
20130127537 | OUTPUT COMMON MODE VOLTAGE STABILIZER OVER LARGE COMMON MODE INPUT RANGE IN A HIGH SPEED DIFFERENTIAL AMPLIFIER - A circuit includes a differential amplifier having a folded cascode architecture with a pair of cascode transistors. A sensing circuit senses a common mode input voltage of a differential input signal applied to the differential amplifier. A bias generator circuit generates a bias voltage for application to the pair of cascode transistors in the folded cascode architecture. The bias generator circuit is connected to an output of the sensing circuit such that the generated bias voltage has a value which is dependent on the sensed common mode input voltage. This dependence stabilizes a common mode output voltage from the differential amplifier in response to changes in the common mode input voltage. | 05-23-2013 |
20130169363 | Body Biasing Device and Operational Amplifier thereof - A body biasing device for an amplifier which has a P-type differential pair and outputs an output signal at an output node according to a differential input signal pair is disclosed. The body biasing device includes a detection unit coupled to the operational amplifier for detecting a detected voltage related to the differential input signals and accordingly outputting a control signal; and a selection unit coupled to the detection unit and the operational amplifier for outputting a body bias to the P-type differential pair according to the control signal. | 07-04-2013 |
20130169364 | Amplifier and Transceiver Including the Amplifier - An amplifier and a transceiver including the amplifier are provided. The amplifier includes an input terminal; a first transistor of a first conductivity and a second transistor of a second conductivity, each transistor comprising a source terminal, a gate terminal and a drain terminal respectively, the source terminal of the first transistor being coupled to the source terminal of the second transistor, and the gate terminal of the first transistor and the gate terminal of the second transistor being coupled to the input terminal; and an output terminal coupled to the drain terminal of the first transistor and the drain terminal of the second transistor. | 07-04-2013 |
20130214865 | CAPACITIVE LEVEL-SHIFTING CIRCUITS AND METHODS FOR ADDING DC OFFSETS TO OUTPUT OF CURRENT-INTEGRATING AMPLIFIER - Capacitive level-shifting circuits and methods are provided for adding DC offsets to the output of a current-integrating amplifier. For example, a current-integrating amplifier includes an input amplifier stage and an output offset circuit. The input amplifier stage includes an input node, a first output node, and a first switch connected between the first output node and a power supply node. The output offset circuit is connected to the first output node of the input amplifier stage and to a second output node of the current-integrating amplifier. The output offset circuit includes a first series capacitor coupled between the first output node of the input amplifier stage and the second output node of the current-integrating amplifier. The output offset circuit switchably connects a bias voltage to the second output node and charges the first series capacitor to add a DC offset to the second output node of the current-integrating amplifier. | 08-22-2013 |
20130249635 | AMPLIFIER FOR OUTPUT BUFFER AND SIGNAL PROCESSING APPARATUS USING THE SAME - An amplifier for an output buffer includes an operational amplifier including a first input terminal, a second input terminal, and an output terminal, the operational amplifier is configured to generate an input bias current and amplify a voltage difference between signals applied to the first input terminal and the second input terminal, and to output the amplified voltage difference; and a self-bias circuit connected to the first input terminal and the second input terminal, the self-bias circuit is configured to generate first and second current paths when the voltage difference is equal to or greater than a predetermined voltage, to generate a tail current on the first or second current path, and to add the generated tail current to the input bias current of the operational amplifier, wherein the second input terminal is connected to the output terminal. | 09-26-2013 |
20130257538 | COMMON MODE INPUT CONTROL FOR SWITCHED CAPACITOR AMPLIFIER IN PIPELINE ANALOG-TO-DIGITAL CONVERTER - A common mode bias circuit may include a weak common mode bias generator and a common mode bias capacitance. During a first state of the common mode bias circuit, the weak common mode bias generator may be coupled to the common mode bias capacitance and may impart to them a predefined common mode signal level. During a second state of the common mode bias circuit, the common mode bias capacitance may be coupled to differential inputs of an amplifier in a manner that establishes an input common mode level for the amplifier. | 10-03-2013 |
20130278339 | Power Control for Power Amplifiers - Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level. | 10-24-2013 |
20130278340 | Power Amplifiers with Improved Power Control - Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level. | 10-24-2013 |
20130307623 | Amplifier Circuits with Reduced Power Consumption - Various embodiments of an amplifier circuit are provided. In one embodiment, the amplifier circuit includes an input differential circuitry configured to convert a pair of input differential voltage signals to a pair of differential current signals. The amplifier circuit includes a cascode circuitry operable to mirror the pair of differential current signals received from the first output terminal and the second output terminal to an output terminal of the first cascode transistor and an output terminal of the second cascode transistor. The amplifier circuit includes a current control circuit operable to divert an amount of bias current to reduce a current through the cascode circuitry, to thereby reduce a load of the amplifier circuit, the reduction in the load of the amplifier circuit allowing a reduction in current through the input differential circuitry for maintaining a predetermined bandwidth of the amplifier circuit. | 11-21-2013 |
20130328631 | ADAPTIVE AMPLIFICATION CIRCUIT - An adaptive amplification circuit is provided, which includes an operational amplifier comprising a variable bias current source for providing a variable bias current for the operational amplifier, an equivalent circuit of the operational amplifier for receiving an input voltage and generating an output voltage according to the input voltage, and a bias control unit for generating a bias control signal to the variable bias current source according to the output voltage so as to adjust the variable bias current. | 12-12-2013 |
20140002195 | OPERATIONAL AMPLIFIER WITH LATCHING STATE SUPPRESSION | 01-02-2014 |
20140022016 | Amplifiers and Related Biasing Methods and Devices - Biasing methods and devices for amplifiers are described. The described methods generate bias voltages proportional to the amplifier output voltage to control stress voltages across transistors used within the amplifier. | 01-23-2014 |
20140028397 | LOW VOLTAGE MULTI-STAGE AMPLIFIER - A low voltage multi-stage amplifier is described. The low voltage multi-stage amplifier includes one or more prior stages. The low voltage multi-stage amplifier also includes a supply stage. The low voltage multi-stage amplifier further includes an output stage that operates with a supply voltage as low as a sum of a threshold voltage of a first transistor in the output stage and a saturation voltage of a second transistor of the supply stage. The supply stage supplies the output stage. | 01-30-2014 |
20140035673 | MULTIMODE DIFFERENTIAL AMPLIFIER BIASING SYSTEM - Differential power amplifier circuitry includes a differential transistor pair, an input transformer, and biasing circuitry. The base contact of each transistor in the differential transistor pair may be coupled to the input transformer through a coupling capacitor. The coupling capacitors may be designed to resonate with the input transformer about a desired frequency range, thereby passing desirable signals to the differential transistor pair while blocking undesirable signals. The biasing circuitry may include a pair of emitter follower transistors, each coupled at the emitter to the base contact of each one of the transistors in the differential transistor pair and adapted to bias the differential transistor pair to maximize efficiency and stability. | 02-06-2014 |
20140070887 | IMPEDANCE COMPENSATION FOR OPERATIONAL AMPLIFIERS USED IN VARIABLE ENVIRONMENTS - A dual compensation operational amplifier is suitable for use in an environment that experiences fluctuations in ambient energy levels. A dual compensation impedance can be determined to nullify or compensate for effects of an input offset voltage or an input bias current or both. Adjustments to the dual compensation impedance can be made based on calibration data for various environmental conditions so that the dual compensation impedance can be either pre-set for anticipated conditions in different target operational environments, or automatically adjusted in-situ. Target operational environments that may benefit from such a dual compensation impedance include remote areas that experience extreme or variable temperatures, high altitudes, space, or high radiation environments. | 03-13-2014 |
20140104002 | CIRCUIT AND METHOD FOR ADJUSTING THE ELECTRIC POWER SUPPLY OF AN ENERGY-SCAVENGING SYSTEM - A differentiator generates a time derivative signal from a time-variable signal. A transconductance amplifier generates a biasing control signal as a function of the time derivative signal. A supply network functions to supply the differentiator and transconductance amplifier. The supply network is driven by the biasing control signal output from the transconductance amplifier. With this configuration, speed of operation of the differentiator and transconductance amplifier vary with the supply provided by the supply network, and the supply is modulated as a function of the received time-variable signal. | 04-17-2014 |
20140125414 | OPERATIONAL AMPLIFIER CIRCUIT - An operational amplifier circuit includes an output stage circuit. The output stage circuit includes a first and a second output transistors, a capacitor unit, and a switch unit. A drain of the first output transistor is coupled to a drain of the second output transistor via an output terminal of the output stage circuit. The switch unit is coupled between gates of the first and the second output transistors and coupled to a first terminal of the capacitor unit. A second terminal of the capacitor unit is coupled to the output terminal of the output stage circuit. The switch unit determines to conduct a signal transmission path between the gate of the first output transistor and the first terminal of the capacitor unit or conduct a signal transmission path between the gate of the second output transistor and the first terminal of the capacitor unit according to a control signal. | 05-08-2014 |
20140132348 | Differential Amplifier - A differential amplifier with cascade transistors connected in series to switching transistors is disclosed. The base bias of the cascade transistors is set higher than the output LOW level of the cascade transistor by a preset amount of 0.1 to 0.2V, or lower than the input HIGH level of the switching transistor by the preset amount adding to a forward voltage of a junction diode, to provide a discharge current of the base-emitter junction Cbe from the bias control, or from the upstream stage to drive the differential circuit. | 05-15-2014 |
20140152386 | ERROR AMPLIFIER HAVING CASCODE CURRENT SOURCE USING BODY BIASING - Provided is an error amplifier. The error amplifier includes: an amplifying unit receiving first and second input signals and amplifying a voltage difference between the received first and second input signals; a first voltage generating unit generating first and second driving voltages for driving the amplifying unit; a second voltage generating unit generating first and second body voltages to implement a body biasing method; a cascode current source including first to fourth PMOS transistors to provide a bias current to the amplifying unit and the first voltage generating unit; and an output unit outputting a signal of the voltage difference amplified by the amplifying unit, wherein the first and third PMOS transistors receive the first body voltage through a body terminal and the second and fourth PMOS transistors receive the second body voltage through a body terminal. | 06-05-2014 |
20140152387 | SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS USING THE SAME - The transistor suffers the variation caused in threshold voltage or mobility due to gathering of the factors of the variation in gate insulator film resulting from a difference in manufacture process or substrate used and of the variation in channel-region crystal state. The present invention provides an electric circuit having an arrangement such that both electrodes of a capacitance element can hold a gate-to-source voltage of a particular transistor. The invention provides an electric circuit having a function capable of setting a potential difference at between the both electrodes of the capacitance element by the use of a constant-current source. | 06-05-2014 |
20140167852 | SEMICONDUCTOR DEVICE AND OFFSET VOLTAGE CORRECTING METHOD - A semiconductor device includes: an amplifier circuit that has an inverting input terminal, a non-inverting input terminal, and an output terminal; a first variable voltage source that generates a first bias voltage having a voltage value corresponding to a first set value; a second variable voltage source that generates a second bias voltage having a voltage value corresponding to a second set value; a first resistor whose one end is connected to the inverting input terminal; a second resistor that is connected between the output terminal and the inverting input terminal; a third resistor whose one end is connected to the non-inverting input terminal; and a fourth resistor that is connected between the second variable voltage source and the non-inverting input terminal. The first bias voltage is provided to the other end of the first resistor. An input signal is provided to the other end of the third resistor. | 06-19-2014 |
20140197888 | HYBRID AMPLIFIER - Exemplary embodiments are directed to systems, devices, and methods for enhancing a telescopic amplifier. An amplifier may include a differential pair of input transistors including at least one transistor configured to receive a first input and at least one other transistor configured to receive a second input. The amplifier may further include a cascode circuit including a first pair of transistors coupled to the at least one transistor of the differential pair to form a first plurality of current paths configured to generate a first output. The cascode circuit may also include a second pair of transistors coupled to the at least one other transistor of the differential pair to form a second plurality of currents paths configured to generate a second output. | 07-17-2014 |
20140218115 | CURRENT COMPENSATION CIRCUIT, METHOD AND OPERATIONAL AMPLIFIER - Disclosed is a current compensation circuit. During calibration of a compensation current, a digital control circuit delivers a digital signal with values varying over time to a current compensation array, the current compensation array outputs different amounts of compensation current based on the digital signal with values varying over time, the digital control circuit latches a value of the digital signal, which results in a best compensation current, based on influences of the different amounts of compensation current on a parameter to be calibrated, to complete the calibration. Upon and after completion of the calibration, the digital control circuit continuously delivers the digital signal with the latched value to the current compensation array, and the current compensation array outputs the best compensation current based on the digital signal with the latched value. | 08-07-2014 |
20140240045 | AMPLIFIER STAGE - A differential amplifier stage may include: a first transistor having a gate terminal; a second transistor having a gate terminal; and a voltage limiting circuit coupled to the gate terminals of the first and second transistors, wherein the voltage limiting circuit limits a gate voltage supplied to at least one of the gate terminals of the first and second transistors. | 08-28-2014 |
20140247091 | ADAPTIVE BIASING TECHNIQUE FOR AUDIO CIRCUITRY - A circuit comprising a peak detector configured to receive a positive voltage input, a negative voltage input and a reference current source input and to output a peak signal data value. A fast attack current source control coupled to the peak detector and configured to generate a current source control signal as a function of the peak signal data value. A slow decay control coupled to the fast attack current source control and configured to reduce the current source control signal based on a predetermined or user-selected decay rate. A variable current source coupled to the fast attack current source control and configured to generate a variable current as a function of the current source control signal. Amplifier circuitry coupled to the variable current source, the amplifier circuitry configured to receive the variable current. | 09-04-2014 |
20140266448 | ADAPATIVE POWER AMPLIFIER - Exemplary embodiments are related to an envelope-tracking power amplifier. A device may include a first transistor of a plurality of transistors in a stacked configuration configured to receive a supply voltage varying with an envelope of a radio-frequency (RF) input signal. The device may further include a second transistor of the plurality in the stacked configuration coupled to a reference voltage and configured to receive a dynamic bias voltage varying inversely proportional to the supply voltage. | 09-18-2014 |
20140266449 | METHODS AND APPARATUSES FOR SLEW RATE ENHANCEMENT OF AMPLIFIERS - A circuit is disclosed to enhance slew rate of an amplifier. An amplifier includes an output, a first input, and a second input in a differential pair configuration. A slew rate enhancer includes a first slew rate enhancer and a second slew rate enhancer. The first slew direction enhancer is configured to detect a first slew rate condition in a first direction responsive to the first input and the second input and provide additional current for a first side of the differential pair of the amplifier during the first slew rate condition. The second slew direction enhancer is configured to detect a second slew rate condition in a second direction responsive to the first input and the second input and provide additional current for a second side of the differential pair of the amplifier during the second slew rate condition. | 09-18-2014 |
20140285265 | Electronic Biasing Circuit for Constant Transconductance - An electronic biasing circuit provides a DC bias voltage to a circuit to be biased. The biasing circuit has a first transistor and a second transistor. A gate of the first transistor is connected to a gate of the second transistor and supplies the DC bias voltage. A source of the first transistor is connected to a supply reference voltage. A source of the second transistor is connected to the supply reference voltage via a resistor element. The currents flowing through the first and second transistor are forced to be equal. A third transistor is connected in series with the first transistor and a fourth transistor is connected in series with the second transistor. Currents flowing through the third and fourth transistors are forced to be equal. | 09-25-2014 |
20140300416 | OPERATIONAL AMPLIFIER CIRCUIT - Aspects of the invention include an operational amplifier circuit having a construction of a rail-to rail input folded circuit and includes an N-MOS differential pair composed of a pair of N-channel type MOS-FETs connected to a pair of voltage input terminals, and a P-MOS differential pair composed of a pair of P-channel type MOS-FETs connected to the pair of voltage input terminals. In some aspects, a comparator determines whether an common mode input voltage to the N-MOS differential pair and the P-MOS differential pair is higher than a half of a power supply voltage or not, and either one of the N-MOS differential pair and the P-MOS differential pair is selectively operated according to the comparison result. Active loads are provided separately for the N-MOS differential pair and for the P-MOS differential pair. | 10-09-2014 |
20140306760 | APPARATUS AND METHOD FOR TRANSIMPEDANCE AMPLIFIERS WITH WIDE INPUT CURRENT RANGES - Improved preamplifier circuits for converting single-ended input current signals to differential output voltage signals, including first and second transimpedance amplifiers with input transistors operating according to bias currents from a biasing circuit, output transistors and adjustable feedback impedances modified using an automatic gain control circuit, as well as a reference circuit controlling the bias currents according to an on-board reference current and the single-ended input or the differential output voltage signals from the transimpedance amplifiers. | 10-16-2014 |
20140320208 | ADAPTIVE OPERATIONAL AMPLIFIER BIAS CURRENT - An operation amplifier (op amp) having a bias current detection circuit that monitors the bias current flowing in an output stage of the op amp. When the bias current detection circuit detects that too much current is being wasted, e.g., sunk to ground, then the amount of bias current is reduced. Similarly, when the bias current detection circuit detects that insufficient bias current is being supplied to the output stage of the op amp, the amount of bias current is increased. In one implementation, the output of the bias current detection circuit may be signals indicative of, respectively, too much bias current and too little bias current, wherein those outputs are supplied to a state machine which is configured to control the amount of bias current being supplied in a stepwise fashion. | 10-30-2014 |
20140354360 | HIGH FREQUENCY MODULE AND PORTABLE TERMINAL USING SAME - When the frequency bandwidth of a high frequency signal to be amplified is changed, the linearity of a high frequency module deteriorates. A high frequency module has an amplifier circuit including an amplification transistor and a variable impedance circuit, and an output matching network. Based on an amplifying operation, the amplified high frequency signal will contain unwanted signals of secondary distortion components. In a frequency band that generates such unwanted signals of secondary distortion components, the output impedance of the amplifier circuit is changed so that the impedance will not match between the amplifier circuit and the output matching network. The output impedance of the amplifier circuit is changed by controlling the variable impedance circuit. | 12-04-2014 |
20140354361 | SENSE AMPLIFIERS INCLUDING BIAS CIRCUITS - Sense amplifiers including bias circuits axe described. Examples include bias circuits having an adjustable width transistor. A loop gain of the bias circuit may be determined in part by the adjustable width of the transistor. Examples of sense amplifiers including amplifier stages configured to bias an input/output node to a reference voltage. | 12-04-2014 |
20140368273 | ELECTRIC CIRCUIT - A transistor has variation in a threshold voltage or mobility due to accumulation of factors such as variation in a gate insulating film which is caused by a difference of a manufacturing process or a substrate to be used and variation in a crystal state of a channel formation region. The present invention provides an electric circuit which is arranged such that both electrodes of a capacitance device can hold a voltage between the gate and the source of a specific transistor. Further, the present invention provides an electric circuit which has a function capable of setting a potential difference between both electrodes of a capacitance device so as to be a threshold voltage of a specific transistor. | 12-18-2014 |
20150130540 | AMPLIFIER - An amplifier includes a first transformer configured to output first differential signals, a first differential amplifier coupled to the first transformer, a second transformer coupled to the first differential amplifier, a second differential amplifier coupled to the second transformer, a third transformer configured to transform second differential signals output from the second differential amplifier to a single-ended output signal, and a first bias circuit configured to supply a first bias voltage to a first secondary coil of the first transformer, wherein the first bias circuit sets the first bias voltage to a voltage greater than or equal to a first voltage based on the input signal in a first operating area where power of the output signal is greater than or equal to a first power so that power-gain characteristics of the output signal become closer to characteristics where gain of the output signal becomes constant. | 05-14-2015 |
20150137888 | INPUT CLAMPING STRUCTURE FOR SOUND QUALITY IMPROVEMENT IN CAR-RADIO CLASS-AB POWER AMPLIFIER DESIGN - A clamping circuit for a class AB amplifier includes a reference voltage circuit, four NPN Darlington transistors having inputs coupled to the reference voltage circuit, and outputs for providing four clamped voltages and a split NPN Darlington transistor having an input coupled to the reference voltage circuit, and four separate outputs for providing four AC ground voltages. | 05-21-2015 |
20150311876 | Amplifiers and Related Biasing Methods and Devices - Biasing methods and devices for amplifiers are described. The described methods generate bias voltages proportional to the amplifier output voltage to control stress voltages across transistors used within the amplifier. | 10-29-2015 |
20150333714 | Operational Amplifier - An operational amplifier comprises a first metal-oxide-semiconductor field effect transistor (MOSFET), comprising a first drain, a first gate and a first source; a second MOSFET, comprising a second drain, a second gate and a second source, the second source coupled to the first source of the first MOSFET; and a bias source, coupled between a first specific level and the first source of the first MOSFET and the second source of the second MOSFET; wherein the first MOSFET and the second MOSFET are depletion-type. | 11-19-2015 |
20150349716 | Differential Output Stage of an Amplification Device, for Driving a Load - Differential output stage ( | 12-03-2015 |
20150381125 | POWER AMPLIFIER - A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the bias voltage of the output of the amplifier pair varies proportionally to a change of the power supply. | 12-31-2015 |
20160006395 | BUFFER AMPLIFIER AND TRANS-IMPEDANCE AMPLIFIER INCLUDING THE SAME - Provided is a buffer amplifier. The buffer amplifier includes: a replica bias unit dividing an internal power voltage received from an internal power node to generate a bias voltage; an input unit including a first differential amplifier comparing a first differential input signal with the bias voltage to output a first internal signal and a second differential amplifier comparing a second differential input signal with the bias voltage to output a second internal signal; and an output unit including a third differential amplifier comparing the first internal signal with the second internal signal to output a first differential output signal and a second differential output signal. | 01-07-2016 |
20160020740 | WIDEBAND LOW-POWER AMPLIFIER - An amplifier is provided that includes a differential pair of transistors configured to steer a tail current responsive to a differential input voltage. The amplifier also includes a transconductor that tranconducts high-frequency changes in the differential output voltage into a differential bias current conducted through the differential pair of transistors. | 01-21-2016 |
20160056766 | FAST RECOVERY SCHEME OF TRANSCONDUCTANCE GAIN FOR FOLDED CASCODE AMPLIFIER - A folded cascode amplifier (FCA) including cascode stages coupled in a stacked cascode configuration, an input stage, and a switch circuit. The stages may include first and second P-type stages and first and second N-type stages, in which the first N-type stage and the input stage receive first and second bias voltages, respectively. The switch circuit couples a first cascode bias voltage to the second P-type stage and couples a second cascode bias voltage to the first N-type stage in a high power state, and decouples the first and second cascode bias voltages in a low power state. A non-switched low current bias generator provides the first and second bias and cascode bias voltages, which remain substantially stable in the low and high power states. Only low parasitic capacitance nodes are switched between power states so that the gain of the FCA recovers very quickly for the high power state. | 02-25-2016 |
20160056780 | OPERATIONAL AMPLIFIER INPUT OFFSET CORRECTION WITH TRANSISTOR THRESHOLD VOLTAGE ADJUSTMENT - A device can include an operational amplifier (op amp) circuit having a differential transistor pair, a first transistor of the differential transistor pair being formed in a first well of a substrate and a second transistor of the differential transistor pair being formed in a second well of the substrate; a body bias generator configured to generate at least a first body bias voltage for the first well, and not the second well, that varies in response to a first body bias control value; and a control circuit configured to selectively generate the first body bias control value in response to an input offset voltage of the op amp. | 02-25-2016 |
20160065149 | Low Noise Amplifier Method and Apparatus - A low noise amplifier circuit including: at least a first input and first output; at least a first stage of transistor amplification having a transistor input terminal; the circuit further comprising: an input driving circuit interconnecting the first input to the transistor input terminal, the input driving circuit including a parallel resonant circuit interconnected between the transistor input terminal and ground and a series resonant circuit interconnected between the input terminal and the transistor input terminal, the input driving circuit functioning as an input matching network for the circuit in conjunction with an input bias and decoupling network. | 03-03-2016 |
20160072460 | DIFFERENTIAL AMPLIFIER - An differential amplifier is disclosed. The differential amplifier includes: a pair of input terminals externally receiving an input signal; a first differential pair including a first transistor, a second transistor, a first resistor, and a second resistor and configured to generate a first signal; a second differential pair including a third transistor, a fourth transistor, a third resistor, and a fourth resistor and configured to generate a second signal; a current source connected to the first, second, third, and fourth resistors and configured to provide a current to the first and second differential pairs; a pair of level shifters configured to generate a shifted signal from the input signal; and a pair of output terminals externally outputting an output signal containing the first and second signals, wherein the first and second transistors receive the input signal and the third and fourth transistors receive the shifted signal. | 03-10-2016 |
20160079923 | Power Amplifier - A power amplifier includes an input circuit configured to receive an input signal. At least two transistors connected in series. A first transistor of the at least two transistors is located at a first end of the at least two transistors. A second transistor of the at least two transistors is located at a second end of the at least two transistors. The first transistor is coupled to a low voltage power supply node. The first gate of the first transistor is coupled to a first bias voltage. The input signal is coupled to a first gate of the first transistor. At least one capacitor is coupled between a second gate of the second transistor and the low voltage power supply node. An output circuit coupled to a second gate of the second transistor. | 03-17-2016 |
20160079944 | PRECISION, HIGH VOLTAGE, LOW POWER DIFFERENTIAL INPUT STAGE WITH STATIC AND DYNAMIC GATE PROTECTION - A precision, high voltage, low power differential input stage including static and dynamic gate protection is disclosed herein. The differential input stage incorporates the performance of low voltage transistors with the high voltage capability of high voltage transistors. The transistors may be MOSFETs or the like. In addition, gate protection is provided to protect against large DC voltages and AC voltage transitions. The differential input stage includes a pair of input circuits, such as positive and negative input circuits, each including a cascode combination of low and high voltage transistors. In each cascode stage, the low voltage transistor is fabricated with a gate threshold voltage that is as high or higher than that of the high voltage transistors. The low voltage, high threshold transistors in the cascode stages may be configured to match each other. Resistors and capacitors may be provided to protect against excessive input current and voltage. | 03-17-2016 |
20160087594 | ELECTRONIC DEVICE FOR A RADIOFREQUENCY SIGNAL RECEPTION CHAIN, COMPRISING A LOW-NOISE TRANSIMPEDANCE AMPLIFIER STAGE - An electronic device includes a transimpedance amplifier stage having an amplifier end stage of the class AB type and a preamplifier stage coupled between an output of a frequency transposition stage and an input of the amplifier end stage. A self-biased common-mode control stage is configured to bias the preamplifier stage. The preamplifier stage is formed by a differential amplifier with an active load that is biased in response to the self-biased common-mode control stage. | 03-24-2016 |
20160112008 | BIAS CIRCUITRY FOR POWER AMPLIFIERS - Circuits and methods related to power amplifiers. In some implementations, a bias circuit includes a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to an amplifier device connectable to a second electrical supply level. The bias circuit also includes a differential amplifier connectable to receive the first electrical supply level, the differential amplifier having a first input connectable to a first node of the reference device and a second input connectable to receive a reference electrical level, the differential amplifier arranged to maintain a first electrical level on the first node of the reference device as a function of the reference electrical level. | 04-21-2016 |
20160164468 | Amplifier Dynamic Bias Adjustment for Envelope Tracking - An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor. | 06-09-2016 |
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