Entries |
Document | Title | Date |
20080237840 | Flexible circuit electronic package with standoffs - A flexible circuit electronic package including a heat sink, a flexible circuit having a semiconductor chip positioned thereon and electrically coupled thereto, and a quantity of heat shrunk adhesive securing the flexible circuit to the heat sink such that the flexible circuit is planar. This package is then adapted for being positioned on and electrically coupled to a circuitized substrate such as a printed circuit board. A method of making this package is also provided. | 10-02-2008 |
20080251909 | Power Semiconductor Module for Inverter Circuit System - A double-face-cooled semiconductor module with an upper arm and a lower arm of an inverter circuit includes first and second heat dissipation members, each having a heat dissipation surface on one side and a conducting member formed on another side through an insulation member. On the conducting member on the first dissipation plate is provided with a fixing portion that fixes a collector surface of the semiconductor chip and a gate conductor connected to a gate terminal of the semiconductor module. The gate electrode terminal and the gate conductor are wire bonded. The conducting member on the second heat dissipation member is connected to an emitter surface of the semiconductor chip connected to the first heat dissipation member. The productivity and reliability are improved by most of formation operations for the upper and lower arms series circuit on one of the heat dissipation member. | 10-16-2008 |
20080265403 | Hybrid Metal Matrix Composite Packages with High Thermal Conductivity Inserts - A hybrid package for heat sinking a device is formed of a graphitic material that defines a plurality of cavities for cast-in-rivets and that defines at least one cavity for a cast-in-rivet via. The graphitic material is pressure infiltrated with a molten metal alloy so as to form a composite material with a plurality of cast-in rivets that increases at least one of the through-plane conductivity and the strength of the hybrid package and that forms at least one cast-in-rivet that increases an in-plane thermal conductivity of the hybrid package. | 10-30-2008 |
20080265404 | Structure and Methods of Processing for Solder Thermal Interface Materials for Chip Cooling - Assemblies for dissipating heat from integrated circuits and circuit chips are disclosed. The assemblies include a low melt solder as a thermal interface material (TIM) for the transfer of heat from a chip to a heat sink (HS), wherein the low melt solder has a melting point below the maximum operating temperature of the chip. Methods for making the assemblies are also disclosed. | 10-30-2008 |
20080308925 | FABRICATING PROCESS AND STRUCTURE OF THERMAL ENHANCED SUBSTRATE - A fabricating process of a thermal enhanced substrate is provided for fabricating thermal conduction blocks to increase the heat dissipation area. First, a metallic substrate having a first surface and a second surface opposite to the first surface is provided. A first shallow trench with a first depth is then formed on the first surface. A second shallow trench with a second depth is formed on the second surface, and a deep trench penetrating the first shallow trench and the second shallow trench is formed, where the metallic substrate is separated into many thermal conduction blocks by the deep trench. At least one metallic layer and at least one insulating material are laminated on the thermal conduction blocks, and the insulating material is filled into the deep trench and covers the thermal conduction blocks. | 12-18-2008 |
20080308926 | Heat dissipation package structure and method for fabricating the same - A heat dissipation package structure and method for fabricating the same are disclosed, which includes mounting and electrically connecting a semiconductor chip to a chip carrier through its active surface; mounting a heat dissipation member having a heat dissipation section and a supporting section on the chip carrier such that the semiconductor chip can be received in the space formed by the heat dissipation section and the supporting section, wherein the heat dissipation section has an opening formed corresponding to the semiconductor chip; forming an encapsulant to encapsulate the semiconductor chip and the heat dissipation member; and thinning the encapsulant to remove the encapsulant formed on the semiconductor chip to expose inactive surface of the semiconductor chip and the top surface of the heat dissipation section from the encapsulant. Therefore, the heat dissipation package structure is fabricated through simplified fabrication steps at low cost, and also the problem that the chip is easily damaged in a package molding process of the prior art is overcome. | 12-18-2008 |
20090014862 | Subassembly that includes a power semiconductor die and a heat sink having an exposed surface portion thereof - The semiconductor assembly includes a first subassembly having a heat sink. Solder material is disposed on the exposed portion of a first surface of heat sink. A power semiconductor die is located on the first surface of the heat sink and is thermally coupled thereto by the solder material. A packaging patterned polymer layer is disposed on a second surface of the heat sink opposing the first surface and defines an interior surface portion of the heat sink. A semiconductor package is provided in which the first subassembly, solder material and die are located such that the interior surface portion of the second surface of the heat sink is not enclosed by the semiconductor package. | 01-15-2009 |
20090014863 | Subassembly that includes a power semiconductor die and a heat sink and method of forming same - A semiconductor assembly includes a first subassembly comprising a heat sink and a first patterned polymer layer disposed on a surface of the heat sink to define an exposed portion of the first surface. The exposed portion of the first surface extends radially inward along the heat sink surface from the first layer. The subassembly also includes a second patterned polymer layer disposed on a radially outer portion of the first patterned polymer layer. The first and second layers define a cell for accommodating a power semiconductor die. Solder material is disposed on the exposed portion of the heat sink surface and in the cell. A power semiconductor die is located within the cell on a radially inward portion of the first layer and thermally coupled to the heat sink by the solder material. | 01-15-2009 |
20090014864 | THERMAL INTERFACE MATERIAL HAVING CARBON NANOTUBES, COMPONENT PACKAGE HAVING THE SAME AND METHOD FOR MAKING THE COMPONENT PACKAGE - A thermal interface material includes a carbon nanotube array, a transition structure, and a matrix. The carbon nanotube array includes a plurality of carbon nanotubes. The transition structure covers at least a part of the surfaces of carbon nanotubes. The matrix encompasses the carbon nanotubes. A component package using the thermal interface material includes a die, a heat spreader, and a thermal interface material. The thermal interface material is disposed between the die and the heater spreader. | 01-15-2009 |
20090039499 | Heat Sink with Thermally Compliant Beams - A heat dissipating structure includes: a heat spreader; and a plurality of compliant beams attached to the heat spreader. The beams are formed of a high-conductive material such that a maximum stress of each beam is less than a fatigue stress of the high-conductive material; said beams are placed at an angle relative to a chip surface such that the beams are able to exert bending compliance in response to x, y, and z forces exerted upon them. The structure also includes a thermal material interface for bonding said structure to the chip surface. Both the heat spreader and the compliant beams can be machined from a copper block. An alternative heat dissipating structure includes compliant beams soldered to the chip surface. | 02-12-2009 |
20090045505 | Electronic device with package module - A package module is provided. The package module comprises a substrate having a surface comprising a die region. A die is disposed in the die region of the surface on the substrate. A flexible heat spreader conformally covers the surface of the substrate and the die. The invention also discloses an electronic device with the package module. | 02-19-2009 |
20090057877 | Semiconductor Device with Gel-Type Thermal Interface Material - Various methods and apparatus for establishing a thermal pathway for a semiconductor device are disclosed. In one aspect, a method of manufacturing is provided that includes forming a metal layer on a semiconductor chip and forming a gel-type thermal interface material layer on the metal layer. A solvent and a catalyst material are applied to the metal layer prior to forming the gel-type thermal interface material layer to facilitate bonding between the gel-type thermal interface material layer and the metal layer. | 03-05-2009 |
20090057878 | SEMICONDUCTOR DIE PACKAGE INCLUDING HEAT SINKS - A semiconductor die package including at least two heat sinks. The semiconductor die package includes a first heat sink, a second heat sink coupled to the first heat sink, and a semiconductor die between the first heat sink and the second heat sink. The semiconductor die is electrically coupled to the first heat sink and the second heat sink. The semiconductor die may also be attached to a lead. | 03-05-2009 |
20090115052 | HYBRID SILICON/NON-SILICON ELECTRONIC DEVICE WITH HEAT SPREADER - A hybrid electronic device incorporating both Si and non-Si semiconductor components, utilizing SiC, diamond, or another highly thermally conductive material as an underlying heat spreader. The hybrid electronic device is comprised of some combination of components fabricated in: (1) the underlying heat spreader itself; (2) a thin Si layer attached to the heat spreader via wafer bonding; and/or (3) a discrete semiconductor electronics die soldered to the heat spreader. | 05-07-2009 |
20090166850 | High-Power Semiconductor Die Packages With Integrated Heat-Sink Capability and Methods of Manufacturing the Same - An exemplary semiconductor die package of the invention has a metal-oxide substrate disposed between a first surface of a semiconductor die and a heat-sinking component, with a conductive die clip or one or more electrical interconnect traces disposed between the metal-oxide substrate and the first surface of the semiconductor die. The heat-sinking component may comprise a heat sink, or an adaptor plate to which a heat sink may be coupled. The conductive die clip or electrical trace(s) provides electrical connection(s) to the first surface of the semiconductor die, while the metal-oxide substrate electrically insulates the die from the heat-sinking component, and provides a path of high thermal conductivity between the die and the heat-sinking component. The second surface of the semiconductor die may be left free to connect to a circuit board, or a leadframe or interconnect substrate may be attached to it. | 07-02-2009 |
20090166851 | Power semiconductor module - A power semiconductor module has a circuit assembly body, which includes a metal base, a ceramic substrate, and a power semiconductor chip, and is combined with a package having terminals formed integrally. The ceramic substrate of the module has a structure such that an upper circuit plate and a lower plate are joined to both sides of a ceramic plate, respectively, and the metal base and the ceramic substrate are fixed to one another using solder, thereby improving reliability and lengthening a life of a power semiconductor module by optimizing a ceramic substrate and a metal base thereof, the dimensions thereof, and material and method used for a join formed between the ceramic substrate and metal base. | 07-02-2009 |
20090250805 | Heat Dissipation For Integrated Circuit - A packaged integrated circuit having a thermal pathway to exhaust heat from the integrated circuit. The integrated circuit is disposed on a package substrate, with an encapsulant disposed around the integrated circuit. A heat sink is disposed at least partially within the encapsulant, with at least a portion of one surface of the heat sink exposed outside of the encapsulant. The integrated circuit has an uppermost passivation layer, where the passivation layer is not electrically conductive, with a port disposed in the passivation layer. The port extends completely through the passivation layer to expose an underlying layer. A thermal pathway is disposed at least partially within the port, and makes thermal contact to both the underlying layer and the heat sink. The thermal transfer rate of the thermal pathway is greater than the thermal transfer rate either the passivation layer or the encapsulant. | 10-08-2009 |
20090302458 | Heat Sink For Power Module - A heat sink ( | 12-10-2009 |
20090302459 | Heat Sink with Thermally Compliant Beams - A heat dissipating structure includes: a heat spreader; and a plurality of compliant beams attached to the heat spreader. The beams are formed of a high-conductive material such that a maximum stress of each beam is less than a fatigue stress of the high-conductive material; said beams are placed at an angle relative to a chip surface such that the beams are able to exert bending compliance in response to x, y, and z forces exerted upon them. The structure also includes a thermal material interface for bonding said structure to the chip surface. Both the heat spreader and the compliant beams can be machined from a copper block. An alternative heat dissipating structure includes compliant beams soldered to the chip surface. | 12-10-2009 |
20090321922 | SELF-HEALING THERMAL INTERFACE MATERIALS FOR SEMICONDUCTOR PACKAGES - A semiconductor package is described. The semiconductor package includes an internal housing and a semiconductor die coupled with the internal housing by a layer of self-healing thermal interface material. | 12-31-2009 |
20100001395 | SEMICONDUCTOR CHIP ASSEMBLY WITH POST/BASE HEAT SPREADER AND VERTICAL SIGNAL ROUTING - A semiconductor chip assembly includes a semiconductor device, a heat spreader, a substrate and an adhesive. The semiconductor device is electrically connected to the substrate and thermally connected to the heat spreader. The heat spreader includes a post and a base. The post extends upwardly through an opening in the adhesive into an aperture in the substrate, and the base extends laterally and supports the substrate. The adhesive extends between the post and the substrate and between the base and the substrate. The substrate includes first and second conductive layers and a dielectric layer therebetween, and the assembly provides vertical signal routing between a pad at the first conductive layer and a terminal below the adhesive. | 01-07-2010 |
20100084761 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF THE SAME - A semiconductor device includes a mounting substrate, a plurality of semiconductor chips mounted on the mounting substrate, and a heat-dissipation area formed above the plurality of semiconductor chips. A distance between one of the plurality of semiconductor chips which generates a greatest amount of heat and the heat-dissipation area is smaller than a distance between the other semiconductor chips and the heat-dissipation area. | 04-08-2010 |
20100096746 | PACKAGE MODULE STRUCTURE OF COMPOUND SEMICONDUCTOR DEVICES AND FABRICATING METHOD THEREOF - A compound semiconductor device package module structure includes a heat dissipation film, a dielectric layer, a plurality of compound semiconductor dies, means for mounting the compound semiconductor dies on the heat dissipation film, and a transparent encapsulation material. The dielectric layer includes a plurality of openings formed on the heat dissipation film. The compound semiconductor dies are placed on the heat dissipation film in the openings, and adjacent two compound semiconductor dies are separated by the dielectric layer. The transparent encapsulation material covers the compound semiconductor dies. | 04-22-2010 |
20100096747 | Semiconductor device and method of manufacturing the same - A semiconductor device includes: a substrate; a semiconductor chip with a surface facing down mounted on the substrate; a reinforcement material provided on the substrate in a peripheral region of a region on which the semiconductor chip is mounted; and a heat sink coupled to the semiconductor chip via a highly thermally conductive material. The heat sink is disposed on the semiconductor chip and the reinforcement material by being coupled to the reinforcement material via an adhesive material, and is provided with an uneven area on a side coupled to the reinforcement material. | 04-22-2010 |
20100127387 | POWER SEMICONDUCTOR MODULE | 05-27-2010 |
20100164093 | HEAT DISSIPATION IN TEMPERATURE CRITICAL DEVICE AREAS OF SEMICONDUCTOR DEVICES BY HEAT PIPES CONNECTING TO THE SUBSTRATE BACKSIDE - By providing heat dissipation elements or heat pipes in temperature critical areas of a semiconductor device, enhanced performance, reliability and packing density may be achieved. The heat dissipation elements may be formed on the basis of standard manufacturing techniques and may be positioned in close proximity to individual transistor elements and/or may be used for shielding particular circuit portions. | 07-01-2010 |
20100187680 | Heat radiator - A radiator includes: an insulating substrate, a heating element or a semiconductor chip is mounted; and a heat sink that is provided the insulating substrate through a stress relaxation member that has a stress absorbing space, in which the heat sink dissipates heat from the semiconductor chip. The insulating substrate, the stress relaxation member, and the heat sink are braze-bonded to each other. The heat sink has: a top plate that is bonded to the stress relaxation member; and a bottom plate that is bonded to the top plate, and the top plate and the bottom plate forms a passage of coolant therebetween. A thickness proportion between the top plate and the bottom plate falls within a range of 1:3 to 1:5. | 07-29-2010 |
20110012254 | Air Cavity Package with Copper Heat Sink and Ceramic Window Frame - An air cavity package is manufactured by attaching a die to a surface of a copper heat sink, dispensing a bead of epoxy around a periphery of the heat sink surface after the die is attached to the copper heat sink so that the bead of epoxy generally surrounds the die and placing a ceramic window frame on the bead of epoxy. The epoxy is cured to attach a bottom surface of the ceramic window frame to the copper heat sink. | 01-20-2011 |
20110018125 | SEMICONDUCTOR PACKAGE WITH A STIFFENING MEMBER SUPPORTING A THERMAL HEAT SPREADER - A semiconductor package includes a substrate board and a semiconductor die attached to a top surface of that substrate board. A heat spreader is provided over the semiconductor die. A stiffening ring is positioned surrounding the semiconductor die, the stiffening ring being attached to the top surface of the substrate board and attached to a bottom surface of the plate portion of the heat spreader. Space is left on the board outside of the stiffening ring to support the installation of passive components to the substrate board. An external ring may be included, with that external ring being interconnected to the stiffening ring by a set of tie bars. Alternatively, the heat spreader includes an integrally formed peripheral sidewall portion. | 01-27-2011 |
20110024895 | Semiconductor Package Thermal Performance Enhancement and Method - A semiconductor device package and related method are disclosed for providing a semiconductor device encapsulated in a protective package body. The device has an exposed surface to which a thermal compound is applied for improving a thermal path for the egress of heat from the device. Preferred embodiments are disclosed in which a removable cover is attached to the thermal compound for further improved protection during handling. | 02-03-2011 |
20110049700 | SEMICONDUCTOR ASSEMBLY THAT INCLUDES A POWER SEMICONDUCTOR DIE LOCATED ON A CELL DEFINED BY FIRST AND SECOND PATTERNED POLYMER LAYERS - A semiconductor assembly includes a first subassembly comprising a heat sink and a first patterned polymer layer disposed on a surface of the heat sink to define an exposed portion of the first surface. The exposed portion of the first surface extends radially inward along the heat sink surface from the first layer. The subassembly also includes a second patterned polymer layer disposed on a radially outer portion of the first patterned polymer layer. The first and second layers define a cell for accommodating a power semiconductor die. Solder material is disposed on the exposed portion of the heat sink surface and in the cell. A power semiconductor die is located within the cell on a radially inward portion of the first layer and thermally coupled to the heat sink by the solder material. | 03-03-2011 |
20110057306 | EDGE MOUNTED INTEGRATED CIRCUITS WITH HEAT SINK - A module has a substrate, first and second integrated circuits, and a heat sink. The integrated circuits each have a first major surface, a second major surface, a first edge, a second edge, and a third edge and have optical circuits having ports on the first edge and electronic circuits having ports on the second edge. The second edges are connected to the substrate. The first major surface of the second integrated circuit is parallel with the second major surface of the first integrated circuit. The heat sink has a backplane adjacent to the third edge, a first portion along the first major surface of the first integrated circuit, a second portion along the second major surface of the second integrated circuit extending from the backplane, and an insert between the first major surface of the second integrated circuit and the second major surface of the first integrated circuit. | 03-10-2011 |
20110147919 | WINDOW BALL GRID ARRAY (BGA) SEMICONDUCTOR PACKAGES - Embodiments of the present disclosure provide window ball grid array semiconductor packages. A semiconductor package includes a substrate having (i) a first surface, (ii) a second surface that is opposite to the first surface, and (iii) an opening formed between the first surface of the substrate and the second surface of the substrate. The semiconductor package further includes a semiconductor die having (i) a first surface and (ii) a second surface that is opposite to the first surface, the first surface of the semiconductor die being electrically coupled to the second surface of the substrate by one or more interconnect bumps; one or more bonding wires that electrically couple the first surface of the semiconductor die to the first surface of the substrate through the opening of the substrate; and a first electrically insulative structure disposed to substantially fill an area between the first surface of the semiconductor die, the second surface of the substrate, and the one or more interconnect bumps. The first electrically insulative structure substantially encapsulates the one or more bonding wires and substantially fills the opening of the substrate. | 06-23-2011 |
20110241199 | PROGRAMMABLE SYSTEM IN PACKAGE - Some embodiments of the invention provide a programmable system in package (“PSiP”). The PSiP includes a single IC housing, a substrate and several IC's that are arranged within the single IC housing. At least one of the IC's is a configurable IC. In some embodiments, the configurable IC is a reconfigurable IC that can reconfigure more than once during run time. In some of these embodiments, the reconfigurable IC can be reconfigured at a first clock rate that is faster (i.e., larger) than the clock rates of one or more of the other IC's in the PSiP. The first clock rate is faster than the clock rate of all of the other IC's in the PSiP in some embodiments. | 10-06-2011 |
20110254148 | SEMICONDUCTOR APPARATUS - The invention is to provide a semiconductor apparatus configured to position a semiconductor device reliably and easily without having a protruding portion formed in the bottom surface of the semiconductor device in the semiconductor apparatus. A semiconductor apparatus is fabricated by attaching a semiconductor device of a surface mount package type and a wiring member to a heat sink. A fitting portion in which the semiconductor device is fit is provided to the wiring member, so that the semiconductor device is positioned by fitting the semiconductor device into the fitting portion provided to the wiring member. According to the semiconductor apparatus of the invention, it becomes possible to position the semiconductor device at a high degree of accuracy. | 10-20-2011 |
20110285010 | Electric power converter - An electric power converter includes: a heat sink having a heat receiving surface; a semiconductor module including a metal plate having a heat radiation surface, a switching element on the metal plate opposite to the heat radiation surface, and a resin member covering a part of the metal plate and the switching element; a heat radiation member between the heat receiving surface and the semiconductor module for transmitting heat of the switching element to the heat receiving surface via the metal plate. The heat receiving surface includes a concavity, and the heat radiation surface includes a convexity. The heat radiation member has a predetermined area sandwiched between the concavity and the convexity. | 11-24-2011 |
20120086117 | PACKAGE WITH EMBEDDED CHIP AND METHOD OF FABRICATING THE SAME - A package embedded with a chip and a method of fabricating the package of embedded chip. The package of embedded chip includes a dielectric layer having a first surface and a second surface opposing the first surface; a plurality of conductive pillars formed in the dielectric layer and exposed from the second surface of the dielectric layer; a chip embedded in the dielectric layer; a circuit layer formed on the first surface of the dielectric layer; a plurality of conductive blind vias formed in the dielectric layer, allowing the circuit layer to be electrically connected via the conductive blind vias to the chip and each of the conductive pillars; and a first solder mask layer formed on the first surface of the dielectric layer and the circuit layer, thereby using conductive pillars to externally connect with other electronic devices as required to form a stacked structure. Therefore, the manufacturing process can be effectively simplified. | 04-12-2012 |
20120098116 | MULTI-CHIP MODULE SYSTEM WITH REMOVABLE SOCKETED MODULES - A multi-chip module (MCM) includes chip sub-modules that are fabricated as self-contained testable entities. The chip sub-modules plug into respective sockets in a frame of the MCM. Each chip sub-module may be tested before being plugged into the MCM. A chip sub-module may include an IC chip, such as a processor, mounted to an sub-module organic substrate that provides interconnects to the chip. The frame into which each chip sub-module plugs sits on a mini-card organic substrate that interconnects the chip sub-modules together. The MCM may include a downstop between the mini-card organic substrate and a system board to limit or prevent solder creep of solder connections between the mini-card organic substrate and the system board. | 04-26-2012 |
20120126390 | SEMICONDUCTOR DEVICE - A semiconductor device is provided that may include an insulating substrate having a ceramic substrate and metal coating layers on opposite surfaces of the ceramic substrate, a semiconductor chip mounted on one surface of the insulating substrate, and a heat sink directly or indirectly fixed to the other surface of the insulating substrate and thermally connected to the semiconductor chip through the insulating substrate. The heat sink may include a housing that is made of a metal sheet and radiating fins that are fixed in the housing and made of aluminum. The metal sheet may have a coefficient of thermal expansion between those of the insulating substrate and the radiating fin. | 05-24-2012 |
20120133039 | SEMICONDUCTOR PACKAGE WITH THERMAL VIA AND METHOD OF FABRICATION - A semiconductor package includes a block for encapsulating a microchip and its electrical connection wires. The encapsulating block has at least one front recess disposed on top of the microchip. A thermally conducting filling material fills the front recess so as to form a thermal via. A radiating structure is attached over the encapsulating block and in thermal communication with the thermal via. | 05-31-2012 |
20120139096 | SEMICONDUCTOR MODULE AND COOLING UNIT - A semiconductor module including a cooling unit by which a fine cooling effect is obtained is provided. A plurality of cooling flow paths ( | 06-07-2012 |
20120168931 | CARBON NANOTUBE STRUCTURES FOR ENHANCEMENT OF THERMAL DISSIPATION FROM SEMICONDUCTOR MODULES - Disclosed are embodiments of an improved semiconductor wafer structure having protected clusters of carbon nanotubes (CNTs) on the back surface and a method of forming the improved semiconductor wafer structure. Also disclosed are embodiments of a semiconductor module with exposed CNTs on the back surface for providing enhanced thermal dissipation in conjunction with a heat sink and a method of forming the semiconductor module using the disclosed semiconductor wafer structure. | 07-05-2012 |
20120175764 | METHOD FOR THE PRODUCTION OF AN ELECTRONIC COMPONENT AND ELECTRONIC COMPONENT PRODUCED ACCORDING TO THIS METHOD - The invention relates to an electronic component having a circuit integrated on a semiconductor substrate, and a heat-conducting connection of the substrate by soldering using a carrier serving as a heat sink, wherein the invention proposes depositing a first, thicker Au layer ( | 07-12-2012 |
20120175765 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed that includes an insulation substrate, a metal wiring layer, a semiconductor element, a heat sink, and a stress relaxation member located between the insulation substrate and the heat sink. The heat sink has a plurality of partitioning walls that extend in one direction and are arranged at intervals. The stress relaxation member includes a stress absorbing portion formed by through holes extending through the entire thickness of the stress relaxation member. Each hole is formed such that its dimension along the longitudinal direction of the partitioning walls is greater than its dimension along the arranging direction of the partitioning walls. | 07-12-2012 |
20120217630 | HEATSINK, HEATSINK ASSEMBLY, SEMICONDUCTOR MODULE, AND SEMICONDUCTOR DEVICE WITH COOLING DEVICE - According to one embodiment, a heatsink includes a base and heat radiation fins placed on one of surfaces of the base and arranged in parallel to each other with a submillimeter narrow pitch. Each of the multiple heat radiation fins has a submillimeter thickness, a length in a width direction of 60 mm or smaller, and a height of 40 mm or smaller. The heatsink assembly may be constituted by allaying a plurality of the heatsinks and thermally connecting each of the heatsinks to each other using a heat transport device. | 08-30-2012 |
20120235291 | SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a semiconductor apparatus includes a semiconductor device, a heat spreader, a regulating unit, a containing unit, and a holding unit. The heat spreader is bonded to the semiconductor device with an interposed solder layer. The regulating unit is configured to regulate a dimension between the semiconductor device and the heat spreader. The containing unit is configured to contain melted solder in an interior of the containing unit. The holding unit is configured to allow melted solder held in an interior of the holding unit. The holding unit is configured to replenish the melted solder in the case where an amount of the melted solder contained in the containing unit is insufficient. The holding unit is configured to recover the melted solder in the case where the amount of the melted solder contained in the containing unit is excessive. | 09-20-2012 |
20120235292 | HEAT RADIATING COMPONENT AND SEMICONDUCTOR PACKAGE HAVING THE SAME - In one embodiment, there is provided a heat radiating component. The heat radiating component includes: a base material made mainly of copper; an electroplated aluminum layer that covers at least a part of a surface of the base material; and an alumite layer formed on the electroplated aluminum layer and formed by anodic-oxidizing the electroplated aluminum layer. | 09-20-2012 |
20120241939 | Apparatus for Thermally Enhanced Semiconductor Package - A semiconductor package includes a semiconductor die having contact pads. An encapsulant is disposed around the semiconductor die, and conductive vias are disposed in the encapsulant. Electrically conductive traces are disposed between the contact pads and conductive vias, a thermally conductive channel is disposed in the encapsulant separate from the conductive vias, and a thermally conductive layer is disposed over an area of heat generation of the semiconductor die. A thermally conductive trace is disposed between the thermally conductive layer and thermally conductive channel. The thermally conductive layer, thermally conductive trace, and thermally conductive channel are electrically isolated from the contact pads of the semiconductor die and the electrically conductive traces. The semiconductor package further comprises broad thermal traces disposed over the encapsulant, and a thermally conductive material interconnecting the broad thermal traces and the thermally conductive layer. | 09-27-2012 |
20120241940 | Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation - A semiconductor device has a first thermally conductive layer formed over a first surface of a semiconductor die. A second surface of the semiconductor die is mounted to a sacrificial carrier. An encapsulant is deposited over the first thermally conductive layer and sacrificial carrier. The encapsulant is planarized to expose the first thermally conductive layer. A first insulating layer is formed over the second surface of the semiconductor die and a first surface of the encapsulant. A portion of the first insulating layer over the second surface of the semiconductor die is removed. A second thermally conductive layer is formed over the second surface of the semiconductor die within the removed portion of the first insulating layer. An electrically conductive layer is formed within the insulating layer around the second thermally conductive layer. A heat sink can be mounted over the first thermally conductive layer. | 09-27-2012 |
20120248595 | SYSTEM COMPRISING A SEMICONDUCTOR DEVICE AND STRUCTURE - A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer. | 10-04-2012 |
20120248596 | Semiconductor Device and Method of Forming Thermally Conductive Layer Between Semiconductor Die and Build-Up Interconnect Structure - A semiconductor device has a thermally conductive layer with a plurality of openings formed over a temporary carrier. The thermally conductive layer includes electrically non-conductive material. A semiconductor die has a plurality of bumps formed over contact pads on the die. The semiconductor die is mounted over the thermally conductive layer so that the bumps are disposed at least partially within the openings in the thermally conductive layer. An encapsulant is deposited over the die and thermally conductive layer. The temporary carrier is removed to expose the bumps. A first interconnect structure is formed over the encapsulant, semiconductor die, and bumps. The bumps are electrically connected to the first interconnect structure. A heat sink or shielding layer can be formed over the semiconductor die. A second interconnect structure can be formed over the encapsulant and electrically connected to the first interconnect structure through conductive vias formed in the encapsulant. | 10-04-2012 |
20120319266 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND UNDERFILL AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a package carrier having a dispense port; attaching an integrated circuit to the package carrier and over the dispense port; placing a mold chase over the integrated circuit and on the package carrier, the mold chase having a hole; and forming an encapsulation through the dispense port or the hole, the encapsulation surrounding the integrated circuit including completely filled in a space between the integrated circuit and the package carrier, and in a portion of the hole, the encapsulation having an elevated portion or a removal surface resulting from the elevated portion detached. | 12-20-2012 |
20130009301 | MAGNESIUM-BASED COMPOSITE MEMBER, HEAT RADIATION MEMBER, AND SEMICONDUCTOR DEVICE - A magnesium-based composite member is provided with a through hole through which a fastening member for attachment to a fixing target is to be inserted. A substrate is provided with a substrate hole through which the fastening member is to be inserted, and made of a composite material which is a composite of SiC and a matrix metal which is any of magnesium and a magnesium alloy. A receiving portion is attached to the substrate and made of a metal material different from the matrix metal. The receiving portion is provided with a receiving portion hole through which the fastening member is to be inserted, and at least a part of an inner circumferential surface of the through hole is formed from an inner circumferential surface of the receiving portion hole. | 01-10-2013 |
20130032937 | SEMICONDUCTOR DEVICE AND ASSOCIATED METHOD - The invention provides a semiconductor device and associated method, which includes a substrate, a first die, multiple sub-package systems surrounding the first die, and a heat spreader. The first die and the sub-package systems are installed on a same surface of the substrate, wherein projections of the first die and each sub-package system on the surface partially overlap, and have a portion not overlapping. Each of the sub-package systems includes an interposer and multiple second dice installed on the interposer by way of flip-chip. The heat spreader includes a protrusion portion and a dissipation plate; the dissipation plate covers the first die and the sub-package systems, and the protrusion portion is set between the dissipation plate and the first die. | 02-07-2013 |
20130087904 | WAFER LEVEL APPLIED THERMAL HEAT SINK - A process for forming a heat sink on a semiconductor package at the wafer level stage of manufacture is disclosed. A semiconductor component wafer, prior to separation into separate component packages, is covered on one side with a resin metal foil layer. The resin foil layer is patterned by laser ablation to define the heat sink locations, and then a thermal paste is applied over the patterned layer. The thermal conductive past is hardened to form the heat sinks. The wafer can then be separated into packages. | 04-11-2013 |
20130105963 | Semiconductor Device and Method of Forming Thermal Interface Material and Heat Spreader Over Semiconductor Die | 05-02-2013 |
20130119530 | THERMALLY ENHANCED PACKAGING STRUCTURE - A thermally enhanced packaging structure includes a chip carrier; a high power chip disposed on the chip carrier; a molding compound covering the high power chip; a heat dissipating layer disposed on the molding compound, wherein the heat dissipating layer comprises a plurality of carbon nanocapsules (CNCs); and a non-fin type heat dissipating device, disposed either on the heat dissipating layer or between the molding compound and the heat dissipating layer. The molding compound can also comprise a plurality of CNCs. | 05-16-2013 |
20130134574 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a semiconductor element placed over a substrate, a heat conducting material placed over the semiconductor element, and a radiator placed over the heat conducting material. The radiator has a plurality of projections which are arranged outside a region opposite to the semiconductor element and which protrude toward the substrate. Even if the heat conducting material flows out from over the semiconductor element at fabrication time, the heat conducting material which flows out is made by the plurality of projections to adhere to and spread along the radiator. As a result, the outflow or scattering of the heat conducting material toward the substrate or an electric trouble caused by it is prevented. | 05-30-2013 |
20130147027 | SEMICONDUCTOR PACKAGE - Disclosed herein is a semiconductor package. | 06-13-2013 |
20130154078 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SLUG AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit over a package carrier; mounting a conductive connector over the package carrier; forming an encapsulation over the integrated circuit, the encapsulation having a recess exposing the conductive connector; and mounting a heat slug over the encapsulation, the heat slug having an opening with an opening width greater than a recess width of the recess, the opening exposing a portion of a top surface of the encapsulation. | 06-20-2013 |
20130154079 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE MOLD GATE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a mold gate on an upper surface of the substrate; mounting an integrated circuit to the substrate; and forming an encapsulant encapsulating the integrated circuit, the encapsulant having disruption patterns emanating from the mold gate and underneath a bottom plane of the integrated circuit. | 06-20-2013 |
20130154080 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a lead; forming an interior conductive layer having an interior top side and an interior bottom side, the interior bottom side directly on the lead; mounting an integrated circuit over the lead, the integrated circuit having an inactive side and an active side; forming an encapsulation directly on the inactive side and the interior top side; and forming an insulation layer directly on the active side and a portion of the interior bottom side. | 06-20-2013 |
20130168843 | EMBEDDED HEAT SPREADER FOR PACKAGE WITH MULTIPLE MICROELECTRONIC ELEMENTS AND FACE-DOWN CONNECTION - A microelectronic package includes a substrate, first and second microelectronic elements, and a heat spreader. The substrate has terminals thereon configured for electrical connection with a component external to the package. The first microelectronic element is adjacent the substrate and the second microelectronic element is at least partially overlying the first microelectronic element. The heat spreader is sheet-like, separates the first and second microelectronic elements, and includes an aperture. Connections extend through the aperture and electrically couple the second microelectronic element with the substrate. | 07-04-2013 |
20130221513 | Power Semiconductor Module System with Undercut Connection - A semiconductor module system includes a first semiconductor module and a second semiconductor module. The first semiconductor module has a first housing and a first base plate. The second semiconductor module has a second housing and a second base plate. The first base plate includes a first fitting segment fitted with a semiconductor component, and a first adjustment segment separated from the first fitting segment. The first adjustment segment also has a first adjustment device. The second base plate has a second adjustment device. The first semiconductor module and the second semiconductor module are configured to be positioned relative to one another using the first adjustment device and the second adjustment device so as to form at least one undercut connection. The first fitting segment and the first adjustment segment are connected to the first housing in a captive manner even when the undercut connection is not formed. | 08-29-2013 |
20130234313 | GROWN CARBON NANOTUBE DIE ATTACH STRUCTURES, ARTICLES, DEVICES, AND PROCESSES FOR MAKING THEM - An article of manufacture includes a semiconductor die ( | 09-12-2013 |
20130249073 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a single-layer support structure having a structure non-horizontal surface; forming a single-layer contact coplanar with the single-layer support structure, the single-layer contact having a contact non-horizontal surface; forming a single-layer insulation coplanar with the single-layer contact and horizontally between the structure non-horizontal surface and the contact non-horizontal surface; forming an upper support pad over the single-layer insulation and directly on the single-layer support structure; and mounting an integrated circuit over the upper support pad. | 09-26-2013 |
20130264700 | SEMICONDUCTOR DEVICE WITH EMBEDDED HEAT SPREADING - A semiconductor device includes a semiconductor substrate and a plurality of clock drivers, wherein the plurality of clock drivers comprises substantially all clock drivers of the semiconductor device, and an interconnect region over the semiconductor substrate, wherein the interconnect region comprises a plurality of heat spreaders, wherein at least 25% of the plurality of clock drivers have a corresponding heat spreader of the plurality of heat spreaders. Each corresponding heat spreader of the plurality of heat spreaders covers at least 50% of a transistor within a corresponding clock driver of the plurality of clock drivers and extends across at least 70% of a perimeter of the transistor within the corresponding clock driver. | 10-10-2013 |
20130285233 | THERMAL MANAGEMENT OF INTEGRATED CIRCUITS USING PHASE CHANGE MATERIAL AND HEAT SPREADERS - At least one feature pertains to an apparatus having passive thermal management that includes an integrated circuit die, a heat spreader thermally coupled to the integrated circuit die, a phase change material (PCM) thermally coupled to the heat spreader, and a molding compound that encases the heat spreader and the PCM. In one example, the heat spreader may include a plurality of fins, and at least a portion of the PCM is interposed between the plurality of fins. Another feature pertains to an apparatus that includes an integrated circuit die, and a molding compound having a phase change material intermixed therein. The resulting molding compound completely encases the die. | 10-31-2013 |
20130292816 | CLAD MATERIAL FOR INSULATING SUBSTRATES - A clad material | 11-07-2013 |
20130299960 | THERMALLY ENHANCED SEMICONDUCTOR PACKAGES AND RELATED METHODS - A chip package having a lead frame and a molded portion. The lead frame includes a thermal pad and at least one electrode. The molded portion partially encapsulates the at least one electrode such that it is exposed on a top surface but not on a bottom surface. A bottom surface of the thermal pad is exposed for direct securement to an external heat sink. The molded portion is disposed between the at least one electrode and the heat sink to prevent a short circuit. | 11-14-2013 |
20130299961 | SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A semiconductor package includes a build-up structure; a semiconductor disposed on the build-up structure in a flip-chip manner and having a plurality of bumps penetrating therethrough; an electronic element disposed on the semiconductor chip; and an encapsulant formed on the build-up structure and encapsulating the semiconductor chip and the electronic element, thereby improving the product yield and the overall heat dissipating efficiency. | 11-14-2013 |
20130299962 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - A semiconductor device includes an IGBT as a vertical semiconductor element provided between first, and second lead frames, in pairs, the first, and second lead frames being opposed to each other, first and second sintered-metal bonding layers provided on first and second bonding surfaces of the IGBT, in pairs, respectively, a through-hole opened in the second lead frame, and a heat-release member having a surface on one side thereof, bonded to a second sintered-metal bonding layer of the second bonding surface while a side (lateral face) of a surface of the heat-release member, on the other side thereof, being fitted into the through-hole. A solder layer is formed in a gap between an outer-side wall of the side of the surface of the heat-release member, on the other side thereof, and an inner-side wall of the through-hole. | 11-14-2013 |
20130334677 | Semiconductor Modules and Methods of Formation Thereof - In accordance with an embodiment of the present invention, a semiconductor module includes a first semiconductor device having a first plurality of leads including a first gate/base lead, a first drain/collector lead, and a first source/emitter lead. The module further includes a second semiconductor device and a circuit board. The second semiconductor device has a second plurality of leads including a second gate/base lead, a second drain/collector lead, and a second source/emitter lead. The circuit board has a plurality of mounting holes, wherein each of the first plurality of leads and the second plurality of leads is mounted into a respective one of the plurality of mounting holes. At the plurality of mounting holes, a first distance from the first gate/base lead to the second gate/base lead is different from a second distance from the first source/emitter lead to the second source/emitter lead. | 12-19-2013 |
20130341782 | SEMICONDUCTOR PACKAGE MODULE - There is provided a semiconductor package module, and more particularly, a semiconductor package module constituted by modularizing power semiconductor devices incapable of being able to be easily integrated due to heat generated therefrom. To this end, the semiconductor package module includes a plurality of semiconductor packages; and a plurality of semiconductor packages; and a heat dissipation member having a pipe shape including a flow channel formed therein and including at least one or more through holes into which the semiconductor packages are inserted. | 12-26-2013 |
20140001627 | Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation | 01-02-2014 |
20140035122 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device includes: a mold unit that includes a power semiconductor element, a base plate, and a mold unit, the power semiconductor element being mounted on one surface of the base plate, a convex portion being formed on an other surface of the base plate, the convex portion including a plurality of grooves, the mold unit having a mold resin with which the power semiconductor element is sealed in such a manner as to expose the convex portion; a plurality of radiation fins inserted into the grooves, respectively, and fixedly attached to the base plate by swaging; and a metal plate that includes a opening into which the convex portion is inserted, the metal plate being arranged between the mold unit and the radiation fins with the convex portion inserted into the opening, wherein the metal plate includes a protrusion that protrudes from an edge of the opening and that digs into a side surface of the convex portion when the convex portion is inserted into the opening. | 02-06-2014 |
20140070397 | HIGH POWER SEMICONDUCTOR PACKAGE SUBSYSTEMS - A method and apparatus for incorporation of high power device dies into smaller system packages by embedding metal “coins” having high thermal conductivity into package substrates, or printed circuit boards, and coupling the power device dies onto the metal coins is provided. In one embodiment, the power device die can be attached to an already embedded metal coin in the package substrate or PCB. The power device die can be directly coupled to the embedded metal coin or the power device die can be attached to a metallic interposer which is then bonded to the embedded metal coin. In another embodiment, the die can be attached to the metal coin and then the PCB or package substrate can be assembled to incorporate the copper coin. Active dies are coupled to each other either through wire bonds or other passive components, or using a built-up interconnect. | 03-13-2014 |
20140070398 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A power semiconductor element, a high-voltage electrode electrically connected to the power semiconductor element, a heat radiating plate connected to the power semiconductor element and having heat radiation property, a cooling element connected to the heat radiating plate with an insulating film being interposed, and a seal covering the power semiconductor element, a part of the high-voltage electrode, the heat radiating plate, the insulating film, and a part of the cooling element are included. The cooling element includes a base portion of which part is embedded in the seal and a cooling member connected to the base portion. The base portion and the cooling member are separate from each other, and the cooling member is fixed to the base portion exposed through the seal. | 03-13-2014 |
20140077353 | HEAT DISSIPATING SUBSTRATE AND SEMICONDUCTOR APPARATUS EQUIPPED WITH HEAT DISSIPATING SUBSTRATE - A heat dissipating substrate is joined to a semiconductor substrate via a solder layer. The heat dissipating substrate includes an electrical insulation layer, and a junction layer that is joined to the solder layer. A surface of the junction layer which is joined to the solder layer has a plurality of protruding portions that are arranged and spaced from each other, and a recess portion partially surrounded by walls of two or more adjacent protruding portions. A straight line that passes through an arbitrary point located in the recess portion flanked by the walls of the two or more adjacent protruding portions passes through at least one protruding portion. | 03-20-2014 |
20140091452 | SEMICONDUCTOR MODULE WITH COOLING MECHANISM AND PRODUCTION METHOD THEREOF - A semiconductor module is provided which includes a semiconductor unit which is made by a resin mold. The resin mold has formed therein a coolant path through which a coolant flows to cool a semiconductor chip embedded in the resin mold. The resin mold also includes heat spreaders, and electric terminals embedded therein. Each of the heat spreaders has a fin heat sink exposed to the flow of the coolant. The fin heat sink is welded to a surface of each of the heat spreaders through an insulator, thus minimizing an electrical leakage from the heat spreader to the coolant. | 04-03-2014 |
20140197532 | Semiconductor Module and Method for Manufacturing Semiconductor Module - A semiconductor module includes a case including a receiving space that is formed by a frame portion and a pair of wall portions disposed to face each other with the frame portion therebetween. The wall portion includes a heat-dissipation portions and a support wall that supports the heat-dissipation portions at the frame portion, and the wall portion includes a heat-dissipation portion and a support wall that supports the heat-dissipation portion at the frame portion. The heat-dissipation portions provided at the wall portion are separately provided by being disposed to face a plurality of semiconductor device blocks respectively. A plurality of separate heat-dissipation portions is surrounded by the support wall, the support wall is deformed to recessed from the frame portion through the separate heat-dissipation portions inside the case such that a plurality of insulating sheets is closely joined to a plurality of lead frames and the plurality of heat-dissipation portions. | 07-17-2014 |
20140239479 | MICROELECTRONIC PACKAGE INCLUDING AN ENCAPSULATED HEAT SPREADER - A microelectronic package of the present description may include a microelectronic interposer having a first surface with an active surface of the at least one microelectronic device electrically attached to the microelectronic interposer first surface. A thermal interface material may be disposed on a back surface of the at least one microelectronic device. A heat spreader, having a first surface and an opposing second surface, may be in thermal contact by its first surface with the thermal interface material. A mold material may be disposed to encapsulate the microelectronic device, the thermal interface material, and the heat spreader, wherein the mold material abuts at least a portion of the microelectronic interposer first surface. | 08-28-2014 |
20140312484 | ELECTRONIC ASSEMBLY FOR MOUNTING ON ELECTRONIC BOARD - An embodiment of an electronic assembly for mounting on an electronic board includes a plurality of electric contact regions exposed on a mounting surface of the electronic board. The electronic assembly includes a chip of semiconductor material in which at least one electronic component is integrated, at least one support element including a first main surface and a second main surface opposite to the first main surface, the chip being enclosed by the at least one support element, a heat dissipation plate thermally coupled to said chip to dissipate the heat produced by it, exposed on the first main surface of the support element, a plurality of contact elements, each electrically coupled to a respective electric terminal of the electronic component integrated in the chip, exposed on the same first main surface of which is exposed to the dissipation plate. Also included are a plurality of electric connection elements, each adapted to electrically intercouple a respective contact element of the electronic assembly with a corresponding electric contact region of the electronic board, in such a way that the second main surface of the at least one support element faces the mounting surface of the electronic board. | 10-23-2014 |
20150014838 | MICROELECTRONIC PACKAGES HAVING FRONTSIDE THERMAL CONTACTS AND METHODS FOR THE FABRICATION THEREOF - Microelectronic packages and methods for fabricating microelectronic packages are provided. In one embodiment, the method includes forming one or more redistribution layers over an encapsulated die having a frontside bond pad area and a frontside passivated non-bond pad area. The redistribution layers are formed to have a frontside opening over the non-bond pad area of the encapsulated die. A primary heat sink body is provided in the frontside opening and thermally coupled to the encapsulated die. A contact array is formed over the redistribution layers and is electrically coupled to a plurality bond pads located on the frontside bond pad area of the encapsulated die. | 01-15-2015 |
20150014839 | Electronic Element Packaging Structure and Carrier Substrate Thereof - The present invention discloses an electronic element packaging structure and a carrier substrate thereof. The electronic element packaging structure includes a heat conduction substrate, which is a vapor chamber having a vacuum cavity thereinside or a heat pipe; a circuit layer disposed on the heat conduction substrate, insulated from the heat conduction substrate, and exposing the upper surface of the heat conduction substrate; at least one chip directly disposed on the upper surface of the heat conduction substrate; an electric connection structure electrically connecting the chip and the circuit layer; and an encapsulant covering the chip and the electric connection structure. | 01-15-2015 |
20150014840 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a substrate, a semiconductor chip mounted on the substrate, an encapsulating body encapsulating the semiconductor chip on the substrate, the encapsulating body including a top surface and a side surface, and a plurality of heat sink plates embedded in the encapsulating body, each of the heat sink plates including an upper portion and a lower portion, the upper portion having an upper surface exposed from the top surface of the encapsulating body, the lowering portion being embedded in the encapsulating body, each of the plurality of heat sink plates being spaced from the semiconductor chip by the encapsulating body. The lower portion of each of the plurality of the heat sink plates includes a protrusion extending horizontally to an outside of an outer edge of the lower portion. | 01-15-2015 |
20150084178 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SPREADER AND METHOD OF MANUFACTURE THEREOF - An integrated circuit packaging system, and method of manufacture therefor, includes: a substrate; a mold cap formed on the substrate; fiducial mark inscribed in the mold cap; a thermal interface material applied over the substrate and referenced by the fiducial mark; and a heat spreader, mounted on the thermal interface material, precisely positioned by a position notch aligned relative to the fiducial mark. | 03-26-2015 |
20150084179 | SEMICONDUCTOR MODULE - A power semiconductor chip and a low-power portion that has power consumption lower than that of the power semiconductor chip are located on a predetermined surface side of a heat sink having conductivity. A first plate-shaped insulating member extends between the power semiconductor chip and the heat sink. A second plate-shaped insulating member extends between the low-power portion and the heat sink. A portion, which faces the low-power portion, of the second plate-shaped insulating member is thicker than a portion, which faces the power semiconductor chip, of the first plate-shaped insulating member. | 03-26-2015 |
20150102479 | Electrically insulating thermal interface on the discontinuity of an encapsulation structure - Method for manufacturing an electronic semiconductor package, in which method an electronic chip ( | 04-16-2015 |
20160020161 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A semiconductor device includes a semiconductor element; an insulating substrate formed from stacking a rectangular shaped circuit plate, insulating plate, and metal plate, wherein the semiconductor element is fixed to the circuit plate, and the metal plate has at least one first groove portion in four corners thereof; a radiating member made of metal and having a predetermined arrangement area to dispose the insulating substrate, the radiating member having at least one second groove portion provided in four corners of the arrangement area; four positioning members disposed between the four corners of the metal plate and the four corners of the radiating member, each of the four positioning members being fitted to each of the first groove portions and second groove portions; and a solder filling a space between the insulating substrate and the radiating member, and covering the positioning members. | 01-21-2016 |
20160035643 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - Aspects of the invention include a semiconductor device that enables both solder-outflow prevention and inhibition of seizures coming from laser processing residues. A semiconductor device can include a semiconductor chip, a plurality of insulating substrates on each of which the semiconductor chip is fixed, a heat sink having a plurality of first grooves surrounding each one of more than one predetermined arrangement area. The plurality of insulating substrates can be arranged at each of the predetermined areas, and a plurality of second grooves surrounding the first groove, wherein the second grooves are shallower in depth than each of the first grooves, and solder filled between the insulating substrate and the arrangement area on the heat sink. | 02-04-2016 |
20160126210 | Electronic Component, System and Method - In an embodiment, an electronic component includes a power semiconductor device embedded in a dielectric core layer and at least one contact layer protruding from a first side face of the dielectric core layer. The contact layer includes an electrically insulating layer and at least one contact pad arranged on the electrically insulating layer. The at least one contact pad is electrically coupled with the power semiconductor device. | 05-05-2016 |
20160141275 | SEMICONDUCTOR POWER MODULE USING DISCRETE SEMICONDUCTOR COMPONENTS - An electronic power module is disclosed. The module includes a baseplate and a plurality of internally isolated discrete electronic devices mounted to the baseplate such that their electrical leads are oriented away from the baseplate. Electrical leads may be coupled to a printed circuit board (PCB). Other features disclosed include a thermal interface material and an application-specific heat sink. The assembly may be overmolded via injection molding or potted using an encapsulant. Example electronic devices include thyristors, diodes, and transistors. | 05-19-2016 |
20160190025 | ELECTRICAL SWITCH AND MOUNTING ASSEMBLY THEREFOR` - A mounting assembly is for an electrical switch, such as for example, a dimmer switch, which includes a heat sink. The mounting assembly includes a switching member, an insulator disposed between the switching member and the heat sink, and a separate cover member overlaying the switching member. The separate cover member is structured to secure the switching member and the insulator to the heat sink. The switching member includes a switch body and a conductive tab. The separate cover member secures the switching member to the heat sink, without requiring a separate fastener to be inserted through a hole in the conductive tab. The insulator electrically isolates the conductive tab from the heat sink. | 06-30-2016 |
20160254210 | SUPPORT FOR ELECTRONIC POWER COMPONENTS, POWER MODULE PROVIDED WITH SUCH A SUPPORT, AND CORRESPONDING PRODUCTION METHOD | 09-01-2016 |
20160379911 | HEAT ISOLATION STRUCTURES FOR HIGH BANDWIDTH INTERCONNECTS - A die interconnect system having a plurality of connection pads, a heat generating element thermally isolated from the die, one or more leads extending from the die to the heat generating element, each lead having a metal core with a core diameter, a dielectric layer surrounding the metal core with a dielectric thickness, and an outer metal layer attached to ground, wherein one or more leads are exposed to ambient conditions and/or are convectively or contact cooled for at least a portion of their length to minimize heat transfer from the heat generating element to the die. | 12-29-2016 |
20190148138 | MICROELECTRONIC SYSTEMS CONTAINING EMBEDDED HEAT DISSIPATION STRUCTURES AND METHODS FOR THE FABRICATION THEREOF | 05-16-2019 |