Class / Patent application number | Description | Number of patent applications / Date published |
257642000 | At least one layer of organic material | 21 |
20080265382 | Nonlithographic Method to Produce Self-Aligned Mask, Articles Produced by Same and Compositions for Same - A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having an affinity for portions of the existing pattern; and allowing at least a portion of the masking material to preferentially assemble to the portions of the existing pattern. The pattern may be comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The first and second regions may be treated to have different surface properties. Structures made in accordance with the method. Compositions useful for practicing the method. | 10-30-2008 |
20080283975 | FORMATION OF A SILICON OXIDE INTERFACE LAYER DURING SILICON CARBIDE ETCH STOP DEPOSITION TO PROMOTE BETTER DIELECTRIC STACK ADHESION - In accordance with the present teachings, semiconductor devices and methods of making semiconductor devices and dielectric stack in an integrated circuit are provided. The method of forming a dielectric stack in an integrated circuit can include providing a semiconductor structure including one or more copper interconnects and forming an etch stop layer over the semiconductor structure in a first processing chamber. The method can also include forming a thin silicon oxide layer over the etch stop layer in the first processing chamber and forming an ultra low-k dielectric layer over the thin silicon oxide layer in a second processing chamber, wherein forming the thin silicon oxide layer improves adhesion between the etch stop layer and the ultra low-k dielectric as compared to a dielectric stack that is devoid of the thin silicon oxide layer between the etch stop layer and the ultra low-k dielectric. | 11-20-2008 |
20090014846 | Methods for coating a substrate with an amphiphilic compound - Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process. | 01-15-2009 |
20090166817 | EXTREME LOW-K DIELECTRIC FILM SCHEME FOR ADVANCED INTERCONNECTS - An extreme low-k (ELK) dielectric film scheme for advanced interconnects includes an upper ELK dielectric layer and a lower ELK dielectric with different refractive indexes. The refractive index of the upper ELK dielectric layer is greater than the refractive index of the lower ELK dielectric layer. | 07-02-2009 |
20090166818 | Positive Photosensitive Resin Composition, and Semiconductor Device and Display Therewith - Disclosed is a positive photosensitive resin composition containing (A) an alkali-soluble resin, (B) a diazoquinone compound, (d1) an activated silicon compound and (d2) an aluminum complex. Also disclosed is a positive photosensitive resin composition containing (A) an alkali-soluble resin, (B) a diazoquinone compound, (C) a compound having two or more oxetanyl groups in one molecule and (D) a catalyst for accelerating the ring-opening reaction of the oxetanyl groups of the compound (C). | 07-02-2009 |
20100123224 | HIGH MECHANICAL STRENGTH ADDITIVES FOR POROUS ULTRA LOW-K MATERIAL - A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group. | 05-20-2010 |
20100171199 | PRODUCTION METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND EXPOSURE APPARATUS - The present invention provides a production method of a semiconductor device, involving formation of a flattening layer and easy process for layers formed on a semiconductor layer, and also provides a semiconductor device preferably produced by such a production method. | 07-08-2010 |
20100181656 | Methods of eliminating pattern collapse on photoresist patterns - A stabilizing solution for treating photoresist patterns and methods of preventing profile abnormalities, toppling and resist footing are disclosed. The stabilizing solution comprises a non-volatile component, such as non-volatile particles or polymers, which is applied after the photoresist material has been developed. By treating the photoresist with the solution containing a non-volatile component after developing but before drying, the non-volatile component fills the space between adjacent resist patterns and remains on the substrate during drying. The non-volatile component provides structural and mechanical support for the resist to prevent deformation or collapse by liquid surface tension forces. | 07-22-2010 |
20110254142 | STACKED STRUCTURE - A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width. | 10-20-2011 |
20120001304 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - There are provided a semiconductor device and a semiconductor device manufacturing method capable of preventing electrical leakage while suppressing increase of wiring resistance and deterioration of productivity. The semiconductor device manufacturing method for forming on a substrate a semiconductor device having a porous low-k film serving as an interlayer insulating film. Further, the semiconductor device manufacturing method includes forming the low-k film on the substrate; etching the low-k film to form a trench or a hole therein; reforming a surface of the low-k film exposed by etching the low-k film by allowing plasma of a nitro compound to act on the exposed surface within the trench or the hole; and filling the trench or the hole with a conductor. | 01-05-2012 |
20120205787 | ORGANIC GRADED SPIN ON BARC COMPOSITIONS FOR HIGH NA LITHOGRAPHY - An antireflective coating that contains at least two polymer components and comprises chromophore moieties and transparent moieties is provided. The antireflective coating is useful for providing a single-layer composite graded antireflective coating formed beneath a photoresist layer. | 08-16-2012 |
20130075876 | SEALED POROUS MATERIALS, METHODS FOR MAKING THEM, AND SEMICONDUCTOR DEVICES COMPRISING THEM - A method for at least partially sealing a porous material is provided, comprising forming a sealing layer onto the porous material by applying a sealing compound comprising oligomers wherein the oligomers are formed by ageing a precursor solution comprising cyclic carbon bridged organosilica and/or bridged organosilanes. The method is especially designed for low k dielectric porous materials to be incorporated into semiconductor devices. | 03-28-2013 |
20130320509 | MOISTURE BARRIER COATINGS - A moisture barrier coating for protecting a substrate from moisture, comprises an inorganic layer disposed over the substrate, the inorganic layer comprising an oxide or nitride of an element selected from the group consisting of silicon, aluminum, titanium, zirconium, hafnium and combinations thereof; and an organic silicon-containing layer disposed over the inorganic layer. | 12-05-2013 |
20130320510 | DURABLE, HEAT-RESISTANT MULTI-LAYER COATINGS AND COATED ARTICLES - An article having a surface treated to provide a protective coating structure in accordance with the following method: vapor depositing a first layer on a substrate, wherein said first layer is a metal oxide adhesion layer selected from the group consisting of an oxide of a Group IIIA metal element, a Group IVB metal element, a Group VB metal element, and combinations thereof; vapor depositing a second layer upon said first layer, wherein said second layer includes a silicon-containing layer selected from the group consisting of silicon oxide, silicon nitride, and silicon oxynitride; and vapor depositing a third layer upon said second layer, wherein said third layer is a functional organic-comprising layer, wherein said functional organic-comprising layer is a SAM. | 12-05-2013 |
20140042597 | SEMICONDUCTOR DEVICE INCLUDING A STRESS RELIEF LAYER AND METHOD OF MANUFACTURING - A semiconductor device includes a main body having a single crystalline semiconductor body. A layered structure directly adjoins a central portion of a main surface of the main body and includes a hard dielectric layer provided from a first dielectric material with Young's modulus greater than 10 GPa. A stress relief layer directly adjoins the layered structure opposite to the main body and extends beyond an outer edge of the layered structure. Providing the layered structure at a distance to the edge of the main body and covering the outer surface of the layered structures with the stress relief layer enhances device reliability. | 02-13-2014 |
20140138801 | SEMICONDUCTOR PATTERNING - One or more techniques or systems for forming a pattern during semiconductor fabrication are provided herein. In some embodiments, a photo resist (PR) region is patterned and a spacer region is formed above or surrounding at least a portion of the patterned PR region. Additionally, at least some of the spacer region and the patterned PR region are removed to form one or more spacers. Additionally, a block co-polymer (BCP) is filled between the spacers. In some embodiments, the BCP comprises a first polymer and a second polymer. In some embodiments, the second polymer is removed, thus forming a pattern comprising the first polymer and the spacers. In this manner, a method for forming a pattern during semiconductor fabrication is provided, such that a width of the spacer or the first polymer is controlled. | 05-22-2014 |
20160072096 | SEALING FILM, METHOD FOR PRODUCING SAME AND FUNCTIONAL ELEMENT SEALED BY SEALING FILM - A method for producing a sealing film includes forming a first gas barrier layer on a surface of a substrate by applying an application liquid including a polysilazane, drying the application liquid, and performing a modification treatment. The method further includes forming a resin layer by applying a resin layer liquid comprising an ionic liquid onto the first gas barrier layer and drying the resin layer liquid. | 03-10-2016 |
257643000 | Polyimide or polyamide | 4 |
20080217748 | LOW COST AND LOW COEFFICIENT OF THERMAL EXPANSION PACKAGING STRUCTURES AND PROCESSES - A method for producing a chip carrier, the method includes selecting at least one core with a low coefficient of thermal expansion; selecting at least one build-up layer wherein each build-up layer includes a dielectric material and circuitry; and connecting selected cores and selected build-up layers together in a pre-determined order. | 09-11-2008 |
20080277766 | Polymer membranes for microcalorimeter devices - An improved structure for supporting a microcalorimeter device is disclosed. The structure comprises a substrate with superconducting wiring elements disposed on a surface of the substrate. A membrane layer is suspended above the wiring elements and the substrate surface by a tab element, and a microcalorimeter is disposed on top of the membrane layer. The tab and the membrane layer reside in a common plane, and the membrane layer comprises a material that can be applied and cured at low temperatures (e.g. 350 degrees Celsius or less), so as to have minimal affect on the superconductive wiring elements. The in-plane tab/membrane structure has improved reliability when subject to thermal cycling associated with cryogenic temperatures. A method for forming the structure is also disclosed. | 11-13-2008 |
20130299953 | Method for lower thermal budget multiple cures in semiconductor packaging - A multilayer structure comprises: a substrate; and, a plurality of polymerizable layers successively deposited on the substrate, with each successive layer having a greater dielectric polarizability than the preceding layer(s), so that each successive layer will absorb microwave energy preferentially to the preceding layer(s). In this way, successive layers can be cured without over-curing the preceding layers. The individual layers are preferably materials from a single chemical family (e.g., epoxies, polyimides, PBO, etc.) and have similar properties after curing. The dielectric polarizabilities may be adjusted by modifying such factors as chain endcap dipole strength, cross-linker dipole strength, promoter, solvent, and backbone type. The invention is particularly suitable for producing various polymer layers on silicon for electronic applications. An associated method is also disclosed. | 11-14-2013 |
20140210057 | METHOD OF APPLYING PHOTORESIST TO A SEMICONDUCTOR SUBSTRATE - A method comprises dispensing a first solvent on a semiconductor substrate; dispensing a first layer of a high-viscosity polymer on the first solvent; dispensing a second solvent on the first layer of high-viscosity polymer; and spinning the semiconductor substrate after dispensing the second solvent, so as to spread the high-viscosity polymer to a periphery of the semiconductor substrate. | 07-31-2014 |