Class / Patent application number | Description | Number of patent applications / Date published |
257493000 | With electric field controlling semiconductor layer having a low enough doping level in relationship to its thickness to be fully depleted prior to avalanche breakdown (e.g., RESURF devices) | 34 |
20080237775 | DEPLETABLE CATHODE LOW CHARGE STORAGE DIODE - An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a first region of a second conductivity type formed in the island, and a cathode diffusion contact region doped to the second conductivity type disposed in the first region. The diode can also comprise a cathode contact electrically contacting the cathode diffusion contact region, an anode disposed in the island, an anode contact electrically contacting the anode, and a first extension region doped to the first conductivity type disposed at a surface junction between the first region and the island. | 10-02-2008 |
20080283956 | PROCESS FOR HIGH VOLTAGE SUPERJUNCTION TERMINATION - A method of manufacturing a semiconductor device having an active region and a termination region includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate has an active region and a termination region surrounding the active region. The first main surface is oxidized. A first plurality of trenches and a first plurality of mesas are formed in the termination region. The first plurality of trenches in the termination region are filled with a dielectric material. A second plurality of trenches in the termination region. The second plurality of trenches are with the dielectric material. | 11-20-2008 |
20090051000 | SEMICONDUCTOR DEVICE STRUCTURE - A semiconductor device structure is provided. By placing an insulating dielectric material in the drift region of a device to modulate the electric field distribution and current flow in the drift region, the breakdown voltage of the device is increased while the turn-on impedance of the device is reduced. | 02-26-2009 |
20090267174 | SEMICONDUCTOR DEVICE WITH A CHARGE CARRIER COMPENSATION STRUCTURE IN A SEMICONDUCTOR BODY AND METHOD FOR ITS PRODUCTION - A semiconductor device with a charge carrier compensation structure in a semiconductor body and to a method for its production. The semiconductor body includes drift zones of a first conduction type and charge compensation zones of a second conduction type complementing the first conduction type. The drift zones include a semiconductor material applied in epitaxial growth zones, wherein the epitaxial growth zones include an epitaxially grown semiconductor material which is non-doped to lightly doped. Towards the substrate, the epitaxial growth zones are provided with a first conduction type incorporated by ion implantation over the entire surface and with selectively introduced doping material zones of a second, complementary conduction type. Towards the front side, the epitaxial growth zones are provided with a second, complementary conduction type incorporated by ion implantation over the entire surface and with selectively introduced doping material zones of the first conduction type. | 10-29-2009 |
20090309182 | ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE - A first embodiment of an Electrostatic Discharge (ESD) structure for an integrated circuit for protecting the integrated circuit from an ESD signal, has a substrate of a first conductivity type. The substrate has a top surface. A first region of a second conductivity type is near the top surface and receives the ESD signal. A second region of the second conductivity type is in the substrate, separated and spaced apart from the first region in a substantially vertical direction. A third region of the first conductivity type, heavier in concentration than the substrate, is immediately adjacent to and in contact with the second region, substantially beneath the second region. In a second embodiment, a well of a second conductivity type is provided in the substrate of the first conductivity type. The well has a top surface. A first region of the second conductivity type is near the top surface. A second region of the second conductivity type is in the well, substantially along the bottom of the well. A third region of the first conductivity type, is immediately adjacent to and in contact with the second region, substantially beneath the second region. A fourth region of the first conductivity type is in the well, along the top surface thereof, and spaced apart from the first region. The first region and the fourth region receive the ESD signal. | 12-17-2009 |
20100032791 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes: a first semiconductor region of a first conductivity type disposed on the side of a first electrode; and a second semiconductor region having first pillar regions of the first conductivity type and second pillar regions of a second conductivity type, the first pillar regions and the second pillar regions being provided in paired state and alternately, in a device portion and a terminal portion surrounding the device portion, along a surface on the side of a second electrode disposed on the opposite side of the first semiconductor region from the first electrode. The semiconductor device further includes a lateral RESURF (reduced surface field) region of the second conductivity type disposed at a surface portion, on the opposite side from the first semiconductor region, of the second semiconductor region in the terminal portion. | 02-11-2010 |
20100044825 | SEMICONDUCTOR DEVICE AND METHOD FOR THE PRODUCTION OF A SEMICONDUCTOR DEVICE - In a semiconductor body, a semiconductor device has an active region with a vertical drift section of a first conduction type and a near-surface lateral well of a second, complementary conduction type. An edge region surrounding this active region comprises a variably laterally doped doping material zone (VLD zone). This VLD zone likewise has the second, complementary conduction type and adjoins the well. The concentration of doping material of the VLD zone decreases to the concentration of doping material of the drift section along the VLD zone towards a semiconductor chip edge. Between the lateral well and the VLD zone, a transitional region is provided which contains at least one zone of complementary doping located at a vertically lower point than the well in the semiconductor body. | 02-25-2010 |
20100193895 | DEPLETABLE CATHODE LOW CHARGE STORAGE DIODE - An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a first region of a second conductivity type formed in the island, and a cathode diffusion contact region doped to the second conductivity type disposed in the first region. The diode can also comprise a cathode contact electrically contacting the cathode diffusion contact region, an anode disposed in the island, an anode contact electrically contacting the anode, and a first extension region doped to the first conductivity type disposed at a surface junction between the first region and the island. | 08-05-2010 |
20110084354 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - In a semiconductor device according to the present invention, an electrode layer and a recessed part are formed on a surface of a semiconductor substrate. Further, in the semiconductor substrate, a RESURF layer that is in contact with a bottom surface of the recessed part and the electrode layer is formed. In addition, an insulating film is formed on an upper surface of the semiconductor substrate so as to fill the recessed part. Moreover, a field plate electrode is formed on the insulating film above the recessed part. | 04-14-2011 |
20110233714 | SEMICONDUCTOR DEVICE - Aspects of the invention are related to a semiconductor device including a first conductivity type n-type drift layer, a second conductivity type VLD region which is formed on a chip inner circumferential side of a termination structure region provided on one principal surface of the n-type drift layer and which is higher in concentration than the n-type drift layer, and a second conductivity type first clip layer which is formed on a chip outer circumferential side of the VLD region so as to be separated from the VLD region and which is higher in concentration than the n-type drift layer. The invention can also include a first conductivity type channel stopper layer which is formed on a chip outer circumferential side of the first clip layer so as to be separated from the first clip layer and which is higher in concentration than the n-type drift layer. | 09-29-2011 |
20110291223 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate having a diode active region and an edge termination region adjacent to each other, a first region of a first conductivity type in the diode active region, a second region of a second conductivity type, a third region of the first conductivity type in the edge termination region, and a fourth region of the second conductivity type. The first region and the third region share a drift region of the first conductivity type. The first region and the third region share a fifth region of the first conductivity type. The drift region in the third region is greater in number of crystal defects per unit volume than the drift region in the first region in order that the drift region in the third region is shorter in carrier lifetime than the drift region in the first region. | 12-01-2011 |
20110309464 | SEMICONDUCTOR DEVICE INCLUDING CELL REGION AND PERIPHERAL REGION HAVING HIGH BREAKDOWN VOLTAGE STRUCTURE - A semiconductor device includes a semiconductor substrate and an electric field terminal part. The semiconductor substrate includes a substrate, a drift layer disposed on a surface of the substrate, and a base layer disposed on a surface of the drift layer. The semiconductor substrate is divided into a cell region in which a semiconductor element is disposed and a peripheral region that surrounds the cell region. The base region has a bottom face located on a same plane throughout the cell region and the peripheral region and provides an electric field relaxing layer located in the peripheral region. The electric field terminal part surrounds the cell region and a portion of the electric field relaxing layer and penetrates the electric field relaxing layer from a surface of the electric field relaxing layer to the drift layer. | 12-22-2011 |
20120119319 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a first semiconductor region and a second semiconductor region provided on a main surface of a substrate, being apart from each other and having first conductivity; a third semiconductor region provided between the first semiconductor region and the second semiconductor region and having second conductivity opposite to the first conductivity; a fourth semiconductor region provided on a main surface of the substrate, connected to the third semiconductor region, manufactured together with the third semiconductor region in the same manufacturing process, and having the conductivity same as that of the third semiconductor region; and trenches made on the main surface of the fourth semiconductor region and having a depth smaller than a junction depth of the fourth semiconductor region. | 05-17-2012 |
20130099347 | SUPERJUNCTION SEMICONDUCTOR DEVICE - A superjunction semiconductor device is disclosed in which the trade-off relationship between breakdown voltage characteristics and voltage drop characteristics is considerably improved, and it is possible to greatly improve the charge resistance of an element peripheral portion and long-term breakdown voltage reliability. It includes parallel pn layers of n-type drift regions and p-type partition regions in superjunction structure. PN layers are depleted when off-state voltage is applied. Repeating pitch of the second parallel pn layer in a ring-like element peripheral portion encircling the element active portion is smaller than repeating pitch of the first parallel pn layer in the element active portion. Element peripheral portion includes low concentration n-type region on the surface of the second parallel pn layer. The depth of p-type partition region of an outer peripheral portion in the element peripheral portion is smaller than the depth of p-type partition region of an inner peripheral portion. | 04-25-2013 |
20130334648 | Methods and Apparatus for High Voltage Diodes - High voltage diodes are disclosed. A semiconductor device is provided having a P well region; an N well region adjacent to the P well region and forming a p-n junction with the P well region; a P+ region forming an anode at the upper surface of the semiconductor substrate in the P well region; an N+ region forming a cathode at the upper surface of the semiconductor substrate in the N well region; and an isolation structure formed over the upper surface of the semiconductor substrate between the anode and the cathode and electrically isolating the anode and cathode including a first dielectric layer overlying a portion of the upper surface of the semiconductor substrate, and a second dielectric layer overlying a portion of the first dielectric layer and a portion of the upper surface of the semiconductor substrate. Methods for forming the devices are disclosed. | 12-19-2013 |
20130334649 | SEMICONDUCTOR DEVICE HAVING VARIABLY LATERALLY DOPED ZONE WITH DECREASING CONCENTRATION FORMED IN THE TERMINATION REGION - In a semiconductor body, a semiconductor device has an active region with a vertical drift section of a first conduction type and a near-surface lateral well of a second, complementary conduction type. An edge region surrounding this active region comprises a variably laterally doped doping material zone (VLD zone). This VLD zone likewise has the second, complementary conduction type and adjoins the well. The concentration of doping material of the VLD zone decreases to the concentration of doping material of the drift section along the VLD zone towards a semiconductor chip edge. Between the lateral well and the VLD zone, a transitional region is provided which contains at least one zone of complementary doping located at a vertically lower point than the well in the semiconductor body. | 12-19-2013 |
20140110815 | High Voltage Diode - A trench-isolated RESURF diode structure ( | 04-24-2014 |
20140246750 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - Proton irradiation is performed a plurality of times from rear surface of an n-type semiconductor substrate, which is an n | 09-04-2014 |
20140299962 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes: a layer of a first conductivity type; a well of a second conductivity type on the layer of the first conductivity type in an active region; and a flat RESURF layer of the second conductivity type on the layer of the first conductivity type on an outer circumference of the well as a termination structure. The RESURF layer includes a low concentration layer arranged at an inner end on the well side and an outer end on the outer circumferential side, and a high concentration layer arranged between the inner end and the outer end and having a higher impurity concentration than the low concentration layer. | 10-09-2014 |
20140327104 | Semiconductor Device with a Super Junction Structure with Compensation Layers and a Dielectric Layer - A super junction semiconductor device includes a layered compensation structure with an n-type compensation layer and a p-type compensation layer, a dielectric layer facing the p-type layer, and an intermediate layer interposed between the dielectric layer and the p-type compensation layer. The layered compensation structure and the intermediate layer are provided such that when a reverse blocking voltage is applied between the n-type and p-type compensation layers, holes accelerated in the direction of the dielectric layer have insufficient energy to be absorbed and incorporated into the dielectric material. Since the dielectric layer absorbs and incorporates significantly less holes than without the intermediate layer, the breakdown voltage remains stable over a long operation time. | 11-06-2014 |
20140346633 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes a high voltage isolation structure having a double RESURF structure. The high voltage isolation structure separates a low potential region from a high potential region. The high voltage isolation structure has an annular strip shape in a plan view and includes a straight portion and a corner portion which is connected to the straight portion. In the high voltage isolation structure, a p-type RESURF region is formed in a surface layer of a front surface of a substrate in an n-type well region along the outer circumference of the n-type well region. In the corner portion, the total amount of impurities per unit area in the RESURF region is less than that in the straight portion. | 11-27-2014 |
20140353794 | SEMICONDUCTOR ARRANGEMENT AND METHOD OF FORMING - A semiconductor arrangement is provided comprising a guard region. The semiconductor arrangement comprises an active region disposed on a first side of the guard region. The active region comprises an active device. The guard region of the semiconductor arrangement comprises residue from the active region. A method of forming a semiconductor arrangement is also provided. | 12-04-2014 |
20150054119 | DEVICE STRUCTURE FOR REDUCING LEAKAGE CURRENT OF SEMICONDUCTOR DEVICES WITH FLOATING BURIED LAYER - A device structure is provided to reduce the leakage current of semiconductor devices with a floating buried layer (FBL), includes a substrate, a first epitaxial layer, a split floating buried layer, a second epitaxial layer, a doped trench, a protected device, a surface junction termination extension (S-JTE) and a scribe street. The device and the S-JTE are designed at the second epitaxial layer and the split floating buried layer at the joint of the first and second epitaxial layers. The doped trench is penetrated through the second epitaxial layer and connected to the split floating buried layer. The substrate, the first and second epitaxial layers feature the same typed doping which is opposite to that of split floating buried layer and doped trench. | 02-26-2015 |
20150069567 | SUPERJUNCTION STRUCTURES FOR POWER DEVICES AND METHODS OF MANUFACTURE - A power device includes a semiconductor region which in turn includes a plurality of alternately arranged pillars of first and second conductivity type. Each of the plurality of pillars of second conductivity type further includes a plurality of implant regions of the second conductivity type arranged on top of one another along the depth of pillars of second conductivity type, and a trench portion filled with semiconductor material of the second conductivity type directly above the plurality of implant regions of second conductivity type. | 03-12-2015 |
20150097262 | Semiconductor Diode with Trench Structures - A semiconductor diode includes a semiconductor body and trench structures extending from a surface of the semiconductor body into the semiconductor body. The semiconductor body includes a doped layer of a first conductivity type and a doped zone of a second conductivity type opposite to the first conductivity type. The doped zone is formed between the doped layer and a first surface of the semiconductor body. The trench structures are arranged between electrically connected portions of the semiconductor body. The trench structures do not include conductive structures that are both electrically insulated from the semiconductor body and electrically connected with another structure outside the trench structures. | 04-09-2015 |
20150137306 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An N type diffusion layer in which a high-side circuit region is disposed is formed from a surface of a P type epitaxial layer covering a surface of a P type semiconductor substrate to reach the surface of the semiconductor substrate. An N type high breakdown voltage isolation region is formed with a prescribed width to surround high-side circuit region. High breakdown voltage isolation region includes a corner portion located along a corner pattern of rectangular high-side circuit region, and a linear portion located along a linear pattern thereof. The concentration of an impurity in an N type diffusion layer of corner portion is set to be higher than the concentration of an impurity in an N type diffusion layer of linear portion. | 05-21-2015 |
20150333118 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME - To provide a semiconductor device including a power semiconductor element having improved reliability. The semiconductor device has a cell region and a peripheral region formed outside the cell region. The n type impurity concentration of n type column regions in the cell region is made higher than that of n type column regions comprised of an epitaxial layer in the peripheral region. Further, a charge balance is kept in each of the cell region and the peripheral region and each total electric charge is set so that a total electric charge of first p type column regions and a total electric charge of n type column regions in the cell region become larger than a total electric charge of third p type column regions and n type column regions comprised of an epitaxial layer in the peripheral region, respectively. | 11-19-2015 |
20150340434 | SEMICONDUCTOR DEVICES AND METHOD OF MAKING THE SAME - In one embodiment, the semiconductor devices relate to using one or more super-junction trenches for termination. | 11-26-2015 |
20150357406 | MANUFACTURING METHODS FOR ACCURATELY ALIGNED AND SELF-BALANCED SUPERJUNCTION DEVICES - This invention discloses a method for manufacturing a semiconductor power device on a semiconductor substrate supporting a . drift region composed of an epitaxial layer. The method includes a first step of growing a first epitaxial layer followed by forming a first hard mask layer on top of the epitaxial layer; a second step of applying a first implant mask to open a plurality of implant windows and applying a second implant mask for blocking some of the implant windows to implant a plurality of dopant regions of alternating conductivity types adjacent to each other in the first epitaxial layer; and a third step of repeating the first step and the second step by applying the same first and second implant masks to form a plurality of epitaxial layers, each of which is implanted with the dopant regions of the alternating conductivity types. Then the manufacturing processes proceed by carrying out a device manufacturing process on a top side of the epitaxial layer on top of the dopant regions of the alternating conductivity types with a diffusion process to merge the dopant regions of the alternating conductivity types as doped columns in the epitaxial layers. | 12-10-2015 |
20160079344 | Electronic Device Including An Isolation Structure - An electronic device can include a semiconductor layer having a primary surface, and an isolation structure. The isolation structure can include a first well region within the semiconductor layer and having a first conductivity, a second well region within the semiconductor layer and having a second conductivity type opposite the first conductivity type, and a third well region within the semiconductor layer having the first conductivity type. The second well region can be disposed between the first and third well regions. The first, second, and third well regions can be electrically connected to one another. The electronic device can help to allow more electrons during an electrostatic discharge or similar event to flow where the electrons will be less problematic. A process of forming the electronic device may be implemented with changes to existing masks without adding any processing operations. | 03-17-2016 |
20160163786 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - Hydrogen atoms and crystal defects are introduced into an n− semiconductor substrate by proton implantation. The crystal defects are generated in the n− semiconductor substrate by electron beam irradiation before or after the proton implantation. Then, a heat treatment for generating donors is performed. The amount of crystal defects is appropriately controlled during the heat treatment for generating donors to increase a donor generation rate. In addition, when the heat treatment for generating donors ends, the crystal defects formed by the electron beam irradiation and the proton implantation are recovered and controlled to an appropriate amount of crystal defects. Therefore, for example, it is possible to improve a breakdown voltage and reduce a leakage current. | 06-09-2016 |
20160172438 | Method of Manufacturing Semiconductor Devices using Light Ion Implantation and Semiconductor Device | 06-16-2016 |
20160197141 | Compensation Devices | 07-07-2016 |
20190148485 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 05-16-2019 |