RF MICRO DEVICES, INC. Patent applications |
Patent application number | Title | Published |
20150303976 | RF FRONT-END CIRCUITRY WITH TRANSISTOR AND MICROELECTROMECHANICAL MULTIPLE THROW SWITCHES - This disclosure relates generally to radio frequency (RF) front-end circuitry for routing RF signals to and/or from one or more antennas. Exemplary RF front-end circuitry includes a multiple throw solid-state transistor switch (MTSTS) and a multiple throw microelectromechanical switch (MTMEMS). The MTSTS may be configured to selectively couple a first pole port to any one of a first set of throw ports. The MTMEMS is configured to selectively couple a second pole port to any one of a second set of throw ports. The second pole port of the MTMEMS is coupled to a first throw port in the first set of throw ports of the MTSTS. The MTSTS helps prevent hot switching in the MTMEMS since the first throw port of the MTSTS may be decoupled from the second pole port of the MTMEMS before decoupling the second pole port from a selectively coupled throw port of the MTMEMS. | 10-22-2015 |
20150102389 | HETEROJUNCTION BIPOLAR TRANSISTOR GEOMETRY FOR IMPROVED POWER AMPLIFIER PERFORMANCE - A heterojunction bipolar transistor includes a base mesa, an emitter assembly formed over the base mesa, and a base contact. The emitter assembly includes multiple circular sectors. Each circular sector is spaced apart from one another such that a sector gap is formed between radial sides of adjacent circular sectors. The base contact, which is formed over the base mesa, has a central portion and multiple radial members. Each radial member extends outward from the central portion of the base contact along a corresponding sector gap. As such, each of the circular sectors of the emitter assembly is separated by a radial member of the base contact. The number of circular sectors may vary from one embodiment to another. For example, the emitter assembly may have three, four, six, or more circular sectors. | 04-16-2015 |
20140342678 | TUNABLE FILTER FRONT END ARCHITECTURE FOR NON-CONTIGUOUS CARRIER AGGREGATION - Front end circuitry for a mobile terminal includes separate receive paths and filtering elements for different portions of each operating band. Accordingly, the filtering elements for each receive path can be designed with a smaller pass-band, thereby reducing the complexity of filtering circuitry in the front end circuitry and improving the efficiency thereof. | 11-20-2014 |
20140335801 | TECHNIQUE TO REDUCE THE THIRD HARMONIC OF AN ON-STATE RF SWITCH - RF switching circuitry includes an RF switch coupled between an input node and an output node. Distortion compensation circuitry is coupled in parallel with the RF switch between the input node and the output node. The RF switch is configured to selectively pass an RF signal from the input node to the output node based on a first switching control signal. The distortion compensation circuitry is configured to boost a portion of the RF signal that is being compressed by the RF switch when the amplitude of the RF signal is above a predetermined threshold by selectively injecting current into one of the input node or the output node. Boosting a portion of the RF signal that is being compressed by the RF switch allows a signal passing through the RF switch to remain substantially linear, thereby improving the performance of the RF switching circuitry. | 11-13-2014 |
20140334048 | ESD PROTECTION CIRCUIT - Embodiments of electrostatic discharge (ESD) protection circuits are disclosed along with methods of providing ESD protection. In one embodiment, an ESD protection circuit includes a first ESD protection clamp and a second ESD protection clamp operably associated in a dual-polarity ESD protection configuration. The first ESD protection clamp includes a trigger path and a clamped ESD protection path. The first ESD protection clamp is configured to trigger the clamped ESD protection path in response to an input voltage reaching a trigger voltage level. The second ESD protection clamp breaks down in response to the input voltage reaching a clamp breakdown voltage level that has a magnitude equal to or greater than the trigger voltage level. Since the clamp breakdown voltage level is equal to or greater than the trigger voltage level provided by the first ESD protection clamp, the ESD protection circuit can provide better ESD protection performance ratings. | 11-13-2014 |
20140328220 | CARRIER AGGREGATION ARRANGEMENTS FOR MOBILE DEVICES - Front end circuitry for a wireless communication system includes a first antenna node, a second antenna node, a first triplexer, a second triplexer, and front end switching circuitry coupled between the first triplexer, the second triplexer, the first antenna node, and the second antenna node. The front end switching circuitry is configured to selectively couple the first triplexer to one of the first antenna node and the second antenna node and couple the second triplexer to a different one of the first antenna node and the second antenna node. By using a first triplexer and a second triplexer in the mobile front end circuitry, the mobile front end circuitry may operate in one or more carrier aggregation configurations while reducing the maximum load presented to the first antenna node and the second antenna node, thereby improving the performance of the front end circuitry. | 11-06-2014 |
20140307836 | TUNABLE FILTER FOR LTE BANDS - A tunable filter reduces the total number of filters used in TDD (Time-Division Duplex) communication circuitry. The communication circuitry may include a tunable filter and a first switch associated with the tunable filter. The tunable filter may include a tuning component and a filtering component. The tuning component may be located with the first switch on a first die. The filtering component may be located in a laminate underneath the first switch. Power amplifiers for amplifying transmission signals may be located on a second die, and the second die may be located on the laminate. | 10-16-2014 |
20140307592 | SPLIT BAND FILTERING WITH TWO SAW FILTERS AND SINGLE TUNABLE FILTER - The disclosure includes communication circuitry with a tunable filter configured to tunably filter in a split band. In a first embodiment, communication circuitry includes a tunable filter and a first additional filter. The communication circuitry is configured to communicate within a low target band and within a high target band, wherein an exclusion band is located between the low target band and the high target band. The tunable filter is configured to filter within a low tunable band when tuned within the low tunable band, and configured to filter within a high tunable band when tuned within the high tunable band. The first additional filter is configured to filter in a first additional filter band located in an upper edge of the low target band. | 10-16-2014 |
20140306769 | DUAL INSTANTANEOUS ENVELOPE TRACKING - Power supply circuitry, which includes a parallel amplifier and a parallel amplifier power supply, is disclosed. The power supply circuitry operates in either an average power tracking mode or an envelope tracking mode. The parallel amplifier power supply provides a parallel amplifier power supply signal. The parallel amplifier regulates an envelope power supply voltage based on an envelope power supply control signal using the parallel amplifier power supply signal, which provides power for amplification. During the envelope tracking mode, the envelope power supply voltage at least partially tracks an envelope of an RF transmit signal and the parallel amplifier power supply signal at least partially tracks the envelope power supply control signal. During the average power tracking mode, the envelope power supply voltage does not track the envelope of the RF transmit signal. | 10-16-2014 |
20140306766 | INTEGRATED PULSE SHAPING BIASING CIRCUITRY - Integrated pulse shaping biasing circuitry for a radio frequency (RF) power amplifier includes a square wave signal generator and an inverted ramp signal generator. The square wave signal generator and the inverted ramp signal generator are coupled in parallel between an input node and current summation circuitry. The square wave signal generator generates a square wave signal. The inverted ramp signal generator generates an inverted ramp signal. The current summation circuitry receives the generated square wave signal and the inverted ramp signal, and combines the signals to generate a pulse shaped biasing signal for an RF power amplifier. The square wave signal generator, the inverted ramp signal generator, and the current summation circuitry are monolithically integrated on a single semiconductor die. | 10-16-2014 |
20140304442 | SERIAL BUS BUFFER WITH NOISE REDUCTION - Disclosed is a digital communication control system having a serial bus buffer that includes a primary interface adapted to support serial communication over a primary bus, a buffered interface adapted to support serial communication over a buffered bus, and a controller coupled between the primary bus and the buffered bus. The primary bus is coupled to a first device and at least one second device and the buffered bus is coupled to at least one third device. The controller is adapted to receive a first data signal and a clock signal at the primary interface and replicate the first data signal and the clock signal at the buffered interface. | 10-09-2014 |
20140266544 | HIGH Q FACTOR INDUCTOR STRUCTURE - The present disclosure provides a vertical inductor structure in which the magnetic field is closed such that the magnetic field of the vertical inductor structure is cancelled in the design direction outside the vertical inductor structure, yielding a small, or substantially zero, coupling factor of the vertical inductor structure. In one embodiment, several vertical inductor structures of the present disclosure can be placed in close proximity to create small resonant circuits and filter chains. | 09-18-2014 |
20140266531 | WEAKLY COUPLED BASED HARMONIC REJECTION FILTER FOR FEEDBACK LINEARIZATION POWER AMPLIFIER - Radio frequency (RF) filters configured to filter undesired signal components (e.g., noise and harmonics) from RF signals are disclosed. In one embodiment, an RF filter includes a first inductor coil having a first winding and a second inductor coil having a second winding and a third winding. The second winding of the second inductor coil is configured to have a first mutual magnetic coupling with the first winding, while the third winding of the second inductor coil is configured to have a second mutual magnetic coupling with the first winding. The second winding is connected to the third winding such that the first mutual magnetic coupling and the second mutual magnetic coupling are in opposition. In this manner, the first inductor coil and the second inductor coil may be provided in a compact arrangement while providing weak mutual magnetic coupling between the first inductor coil and the second inductor coil. | 09-18-2014 |
20140266470 | TRANSFORMER-BASED POWER AMPLIFIER STABILIZATION AND REFERENCE DISTORTION REDUCTION - This disclosure relates generally to radio frequency (RF) amplification devices and methods of operating the same. In one embodiment, an RF amplification device includes an RF amplification circuit and a stabilizing transformer network. The RF amplification circuit defines an RF signal path and is configured to amplify an RF signal propagating in the RF signal path. The stabilizing transformer network is operably associated with the RF signal path defined by the RF amplification circuit. Furthermore, the stabilizing transformer network is configured to reduce parasitic coupling along the RF signal path of the RF amplification circuit as the RF signal propagates in the RF signal path. In this manner, the stabilizing transformer network allows for inexpensive components to be used to reduce parasitic coupling while allowing for smaller distances along the RF signal path. | 09-18-2014 |
20140266429 | POWER MANAGEMENT/POWER AMPLIFIER OPERATION UNDER DYNAMIC BATTERY DROPS - In one embodiment, a digital internal amplified voltage of power management circuitry is forced to an input threshold voltage upon a determination that a set of emergency conditions is satisfied, and is set to an input minimum battery voltage upon a determination that the set of emergency conditions is not satisfied. The emergency conditions may include determining that a battery voltage is less than a threshold voltage and determining that an input minimum battery voltage is less than an input threshold voltage. | 09-18-2014 |
20140266428 | ENVELOPE TRACKING POWER SUPPLY VOLTAGE DYNAMIC RANGE REDUCTION - A radio frequency (RF) system includes an RF power amplifier (PA), which uses an envelope tracking power supply voltage to provide an RF transmit signal, which has an RF envelope; and further includes an envelope tracking power supply, which provides the envelope tracking power supply voltage based on a setpoint. RF transceiver circuitry, which includes envelope control circuitry and an RF modulator is disclosed. The envelope control circuitry provides the setpoint, such that the envelope tracking power supply voltage is clipped to form clipped regions and substantially tracks the RF envelope between the clipped regions, wherein a dynamic range of the envelope tracking power supply voltage is limited. The RF modulator provides an RF input signal to the RF PA, which receives and amplifies the RF input signal to provide the RF transmit signal. | 09-18-2014 |
20140266427 | NOISE CONVERSION GAIN LIMITED RF POWER AMPLIFIER - A radio frequency (RF) power amplifier (PA) and an envelope tracking power supply are disclosed. The RF PA receives and amplifies an RF input signal to provide an RF transmit signal using an envelope power supply voltage. The envelope tracking power supply provides the envelope power supply voltage based on a setpoint, which has been constrained so as to limit a noise conversion gain (NCG) of the RF PA to not exceed a target NCG. | 09-18-2014 |
20140266415 | HARMONIC CANCELLATION CIRCUIT FOR AN RF SWITCH BRANCH - Disclosed is a harmonic cancellation circuit for an RF switch branch having a first transistor with a first gate terminal and a first body terminal, a second transistor having a second gate terminal coupled to the first body terminal, and having a second body terminal coupled to the first gate terminal. Also included is a first resistor coupled between a first coupling node and the second body terminal, and a second resistor coupled between a second coupling node and the first body terminal, wherein the first transistor and second transistor are adapted to generate an inverse phase third harmonic signal relative to a third harmonic signal generated by the RF switch branch, such that the inverse phase third harmonic signal is output through the first resistor and the second resistor to the RF switch branch to reduce the third harmonic signal. | 09-18-2014 |
20140253244 | POWER AMPLIFIER SPURIOUS CANCELLATION - This disclosure relates generally to power amplification devices and methods of operating the same. The power amplification devices are capable of reducing (and possibly cancelling) modulation of a ripple variation of a supply voltage level of a supply voltage onto a radio frequency (RF) signal. In one embodiment, a power amplification device includes a power amplification circuit configured to amplify an RF signal with a supply voltage such that a ripple variation in a supply voltage level of the supply voltage is modulated onto the RF signal in accordance with a conversion gain. However, the power amplification device also includes a plurality of ripple rejection circuits. The plurality of ripple rejection circuits is configured to produce phase shifts and one or more amplitude shifts in the RF signal so as to reduce the conversion gain of the power amplification circuit. | 09-11-2014 |
20140252567 | PATTERNED SILICON-ON-PLASTIC (SOP) TECHNOLOGY AND METHODS OF MANUFACTURING THE SAME - A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive. | 09-11-2014 |
20140252566 | SILICON-ON-DUAL PLASTIC (SODP) TECHNOLOGY AND METHODS OF MANUFACTURING THE SAME - A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure having a first surface and a second surface. A first polymer having a high thermal conductivity and a high electrical resistivity is disposed on the first surface of the semiconductor stack structure. An exemplary method includes providing the semiconductor stack structure with the second surface in direct contact with a wafer handle. A next step involves removing the wafer handle to expose the second surface of the semiconductor stack structure. A following step includes disposing a second polymer having high thermal conductivity and high electrical resistivity directly onto the second surface of the semiconductor stack structure. Additional methods apply silicon nitride layers on the first surface and second surface of the semiconductor stack structure before disposing the first polymer and second polymer to realize the semiconductor device. | 09-11-2014 |
20140242760 | SEMICONDUCTOR RADIO FREQUENCY SWITCH WITH BODY CONTACT - The present disclosure relates to a radio frequency (RF) switch that includes multiple body-contacted field effect transistor (FET) elements coupled in series. The FET elements may be formed using a thin-film semiconductor device layer, which is part of a thin-film semiconductor die. Conduction paths between the FET elements through the thin-film semiconductor device layer and through a substrate of the thin-film semiconductor die may be substantially eliminated by using insulating materials. Elimination of the conduction paths allows an RF signal across the RF switch to be divided across the series coupled FET elements, such that each FET element is subjected to only a portion of the RF signal. Further, each FET element is body-contacted and may receive reverse body biasing when the RF switch is in an OFF state, thereby reducing an OFF state drain-to-source capacitance of each FET element. | 08-28-2014 |
20140220911 | DEDICATED SHUNT SWITCH WITH IMPROVED GROUND - Antenna tuning switch circuitry includes an input port, a shunt switch, control circuitry, and an integrated ground. The shunt switch is coupled between the input port and the integrated ground. The control circuitry includes a control signal input port, a switch driver output port coupled to the shunt switch, and a ground connection port coupled to the integrated ground. The shunt switches, the RF input ports, the control circuitry, and the integrated ground are monolithically integrated on a single semiconductor die. The antenna tuning switch circuitry is adapted to selectively couple the input port to the integrated ground in order to alter one or more operating parameters of an attached antenna. By monolithically integrating the shunt switch together with the control circuitry and the integrated ground, the ON state impedance and the parasitic OFF state impedance of the antenna tuning switch circuitry can be significantly improved. | 08-07-2014 |
20140220910 | GAIN SYNCHRONIZATION CIRCUITRY FOR SYNCHRONIZING A GAIN RESPONSE BETWEEN OUTPUT STAGES IN A MULTI-STAGE RF POWER AMPLIFIER - A multi-stage radio frequency (RF) power amplifier includes a high-power amplifier path and a low-power amplifier path. The low-power amplifier path includes gain synchronization circuitry in order to synchronize the gain response of the high-power amplifier path and the low-power amplifier path. By synchronizing the gain response of the high-power amplifier path and the low-power amplifier path, the gain linearity of the multi-stage RF amplifier is improved. | 08-07-2014 |
20140210315 | MEMS VIBRATING STRUCTURE USING AN ORIENTATION DEPENDENT SINGLE-CRYSTAL PIEZOELECTRIC THIN FILM LAYER - A micro-electrical-mechanical system (MEMS) vibrating structure includes a carrier substrate, a first anchor, a second anchor, a single crystal piezoelectric body, a first conducting layer, and a second conducting layer. The first anchor and the second anchor are provided on the surface of the carrier substrate. The single-crystal piezoelectric body is suspended between the first anchor and the second anchor, and includes a uniform crystalline orientation defined by a set of Euler angles. The single-crystal piezoelectric body includes a first surface parallel to and facing the surface of the carrier substrate on which the first anchor and the second anchor are formed and a second surface opposite the first surface. The first conducting layer is inter-digitally dispersed on the second surface of the single-crystal piezoelectric body. The second conducting layer is inter-digitally dispersed on the first surface of the single-crystal piezoelectric body. | 07-31-2014 |
20140210314 | MEMS VIBRATING STRUCTURE USING AN ORIENTATION DEPENDENT SINGLE-CRYSTAL PIEZOELECTRIC THIN FILM LAYER - A micro-electrical-mechanical system (MEMS) vibrating structure includes a carrier substrate, a first anchor, a second anchor, a single crystal piezoelectric body, and a conducting layer. The first anchor and the second anchor are provided on the surface of the carrier substrate. The single-crystal piezoelectric body is suspended between the first anchor and the second anchor, and includes a uniform crystalline orientation defined by a set of Euler angles. The single-crystal piezoelectric body includes a first surface parallel to and facing the surface of the carrier substrate on which the first anchor and the second anchor are formed and a second surface opposite the first surface. The conducting layer is inter-digitally dispersed, and is formed on the second surface of the single-crystal piezoelectric body. The first surface of the single-crystal piezoelectric body is left exposed. | 07-31-2014 |
20140203869 | COMMUNICATIONS BASED ADJUSTMENTS OF AN OFFSET CAPACITIVE VOLTAGE - A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis. | 07-24-2014 |
20140203868 | COMMUNICATIONS BASED ADJUSTMENTS OF A PARALLEL AMPLIFIER POWER SUPPLY - A parallel amplifier and a parallel amplifier power supply are disclosed. The parallel amplifier power supply provides a parallel amplifier power supply signal, which is adjustable on a communications slot-to-communications slot basis. During envelope tracking, the parallel amplifier regulates an envelope power supply voltage based on the parallel amplifier power supply signal. | 07-24-2014 |
20140169243 | MOBILE COMMUNICATION CIRCUITRY FOR THREE OR MORE ANTENNAS - Communication circuitry is disclosed that is capable of switching between three or more antennas while providing low harmonic interference during carrier aggregation. In one embodiment, a communication system includes a first switch with two poles and four throws, a second switch with two poles and four throws, and four diplexers associated with four antennas. In a second embodiment, the communication system includes a first switch with three poles and three throws, a second switch with three poles and three throws, and three diplexers associated with three antennas. In the second embodiment, the second switch may have a third pole associated with non-cellular signals such as GPS and WiFi, and one or more of the diplexers may be tunable, for example to efficiently pass 1.575 GHz for GPS signals. | 06-19-2014 |
20140159818 | DOHERTY POWER AMPLIFIER WITH TUNABLE IMPEDANCE LOAD - Radio frequency (RF) amplification devices are disclosed that include Doherty amplification circuits and control circuits along with methods of operating the same. In one embodiment, the Doherty amplification circuit includes a quadrature coupler having an isolation port and a tunable impedance load coupled to the isolation port and configured to provide a tunable impedance. The control circuit is configured to tune the tunable impedance of the tunable impedance load at the isolation port dynamically as a function of the RF power of the Doherty amplification circuit. In this manner, the control circuit can provide dynamic load modulation, thereby increasing the power efficiency of the Doherty amplification circuit, particularly at backed-off power levels. The load modulation provided by the control circuit also allows the Doherty amplification circuit to provide broadband amplification in various RF communication bands. | 06-12-2014 |
20140152285 | AVERAGE LOAD CURRENT DETECTOR FOR A MULTI-MODE SWITCHING CONVERTER - An average load current detector for a multi-mode switching converter is disclosed. The average load current detector includes a sense voltage generator that generates an average sense voltage that is proportional to an average load current delivered by the multi-mode switching converter. Also included is a duty voltage generator that generates an average duty voltage that is proportional to a duty cycle of a pulse width modulation (PWM) signal that controls switching of the multi-mode switching converter. Further included is a comparator adapted to output a detector signal that indicates an operational mode for the multi-mode switching converter to operate in for predetermined load current ranges. A controller receives the detector signal and in response maintains an efficient energy transfer from one supply voltage level to another by transitioning the multi-mode switching converter from the PWM mode to a pulse frequency modulation (PFM) mode or vice versa if necessary. | 06-05-2014 |
20140152284 | REGULATED SWITCHING CONVERTER - A regulated switching converter having improved closed loop settling time is disclosed. An error amplifier having a voltage reference input, a feedback input, and an error output is included. An output filter having a voltage output terminal coupled to the feedback input provides an output voltage sample to the error amplifier. A compensation network coupled between the feedback input and the error output of the error amplifier includes at least one capacitor and at least one switch that is communicatively coupled across the at least one capacitor. A controller is adapted to monitor current flowing through the switching output terminal. The controller has at least one switch control output coupled to a control input of the at least one switch to allow the controller to momentarily close the at least one switch to substantially discharge the at least one capacitor when a predetermined high current state is reached. | 06-05-2014 |
20140144682 | SURFACE FINISH FOR CONDUCTIVE FEATURES ON SUBSTRATES - An electronic substrate includes one or more conductive features. In order to preserve the performance and conductivity of the one or more conductive features, the exposed portions of the conductive features are deposited with a protective layer comprising a layer of silver, followed by a layer of gold. By covering the exposed portions of the conductive features of the electronic substrate with the protective layer, oxidation and exposure of the conductive features is prevented, thereby preserving the performance and conductivity of the copper features. Further, during a soldering process, the protective layer is substantially dissolved, thereby allowing the solder to join directly with the underlying conductive features and improving the performance of the electronic substrate. | 05-29-2014 |
20140141738 | SELF-TUNING AMPLIFICATION DEVICE - Radio frequency (RF) self-tuning amplification devices and methods of amplification for an RF input signal are disclosed. In one embodiment, the RF self-tuning amplification device has a first RF amplifier, a reference RF amplifier, and a tuning circuit. The first RF amplifier includes a first RF amplification circuit to generate an amplified RF output signal from the RF input signal, and a tunable parallel resonator tunable so as to shift an RF output signal phase of the amplified RF output signal. The reference RF amplifier includes a second RF amplification circuit that generates a reference RF signal from the RF input signal, and a resistive load, so that the reference RF signal has a reference RF signal phase. The tuning circuit is configured to tune the tunable parallel resonator to reduce a phase difference between the RF output signal phase and the reference RF signal phase. | 05-22-2014 |
20140139199 | MODULATED POWER SUPPLY SYSTEM AND METHOD WITH AUTOMATIC TRANSITION BETWEEN BUCK AND BOOST MODES - The present disclosure provides a modulated power supply system having a switching converter with an output terminal for supplying modulated power to a load. The modulated power supply system also includes a controller adapted to transition the switching converter between a buck mode and a boost mode in response to a detection of at least one predetermined condition associated with the output terminal. | 05-22-2014 |
20140125431 | TUNABLE AND SWITCHABLE RESONATOR AND FILTER STRUCTURES IN SINGLE CRYSTAL PIEZOELECTRIC MEMS DEVICES USING BIMORPHS - A MEMS device includes a substrate, one or more anchors formed on a first surface of the substrate, and a piezoelectric layer suspended over the first surface of the substrate by the one or more anchors. Notably, the piezoelectric layer is a bimorph including a first bimorph layer and a second bimorph layer. A first electrode may be provided on a first surface of the piezoelectric layer facing the first surface of the substrate, such that the first electrode is in contact with the first bimorph layer of the piezoelectric layer. A second electrode may be provided on a second surface of the piezoelectric layer opposite the substrate, such that the second electrode is in contact with the second bimorph layer of the piezoelectric layer. The second electrode may include a first conducting section and a second conducting section, which are inter-digitally dispersed on the second surface. | 05-08-2014 |
20140125408 | OUTPUT IMPEDANCE COMPENSATION OF A PSEUDO-ENVELOPE FOLLOWER POWER MANAGEMENT SYSTEM - A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a combination of a V | 05-08-2014 |
20140125201 | VARIABLE CAPACITOR AND SWITCH STRUCTURES IN SINGLE CRYSTAL PIEZOELECTRIC MEMS DEVICES USING BIMORPHS - A micro-electrical-mechanical systems (MEMS) device includes a substrate, one or more anchors formed on a first surface of the substrate, and a piezoelectric layer suspended over the first surface of the substrate by the one or more anchors. A first electrode may be provided on a first surface of the piezoelectric layer facing the first surface of the substrate, such that the first electrode is in contact with a first bimorph layer of the piezoelectric layer. A second electrode may be provided on a second surface of the piezoelectric layer opposite the first surface, such that the second electrode is in contact with a second bimorph layer of the piezoelectric layer. | 05-08-2014 |
20140118074 | POWER AMPLIFIER CONTROLLER - The present disclosure provides a power amplifier controller for starting up, operating, and shutting down a power amplifier. The power amplifier controller includes current sense amplifier circuitry adapted to monitor a main current of the power amplifier. A bias generator is also included and adapted to provide a predetermined standby bias voltage and an operational bias voltage based upon a main current level sensed by the current sense amplifier circuitry. The power amplifier controller further includes a sequencer adapted to control startup and shutdown sequences of the power amplifier. In at least one embodiment, the power amplifier is a gallium nitride (GaN) device, and the main current level sensed is a drain current of the GaN device. Moreover, the bias generator is a gate bias generator provided that the power amplifier is a field effect transistor (FET) device. | 05-01-2014 |
20140111275 | EFFICIENT POWER TRANSFER POWER AMPLIFIER (PA) ARCHITECTURE - An efficient power transfer power amplifier (PA) architecture is disclosed that includes a first PA, a first impedance transformation network (ITN) coupled to the first PA, a second PA, and a second ITN coupled to the second PA. A switching network having a plurality of load outputs along with a first switch input coupled to a first impedance output of the first ITN and a second switch input coupled to a second impedance output of the first ITN, a third switch input coupled to a third impedance output of the second ITN, and a fourth switch input coupled to a fourth impedance output of the second ITN. A control system is adapted to control the switching network to switch signals at the first, second, third, and fourth switch inputs such that select ones of the signals travel paths having matching impedances to loads coupled to the plurality of load outputs. | 04-24-2014 |
20140111178 | TRANSITIONING FROM ENVELOPE TRACKING TO AVERAGE POWER TRACKING - An envelope tracking power supply and an offset capacitive element are disclosed. The offset capacitive element is coupled between a switching output and an analog output of the envelope tracking power supply, which operates in one of an envelope tracking mode, a transition mode, and an average power tracking mode. During the envelope tracking mode, the envelope tracking power supply provides an envelope power supply signal using both the switching output and the analog output. During the transition mode, the envelope tracking power supply drives a voltage across the offset capacitive element from a first voltage to a second voltage, such that during a transition from the envelope tracking mode to the transition mode, the offset capacitive element has the first voltage, and during a transition from the transition mode to the average power tracking mode, the offset capacitive element has the second voltage. | 04-24-2014 |
20140106693 | POWER MANAGEMENT CONFIGURATION FOR TX MIMO AND UL CARRIER AGGREGATION - A communication device is disclosed that efficiently manages power. In one embodiment, this communication device includes a first (main) transmitter including a first low band amplifier and a first high band amplifier; a second (MIMO) transmitter including a second low band amplifier and a second high band amplifier; a first power manager in communication with the first low band amplifier and with the second high band amplifier; a second power manager in communication with the first high band amplifier and with the second low band amplifier; and a control system in communication with the first transmitter, the second transmitter, the first power manager, and the second power manager. | 04-17-2014 |
20140106564 | ADDITIVE CONDUCTOR REDISTRIBUTION LAYER (ACRL) - A first plate-able layer is selectively plated to form one or more redistribution paths. The connection points of an IC package are connected to the redistribution paths, and the IC package is over molded for stability. The first plate-able layer is then removed, leaving the one or more redistribution paths exposed. The redistribution paths allow one or more contact points of the IC package to be moved to a new location in order to facilitate integration of the IC package into a system. By plating the redistribution paths up from the first plate-able layer, fine geometries for repositioning the contact points of the IC package with minimal conductor thickness are achieved without the need for specialized manufacturing equipment. Accordingly, a redistribution layer is formed at a low cost while minimizing the impact of the layer on the operation of the IC device. | 04-17-2014 |
20140099907 | RUGGED IQ RECEIVER BASED RF GAIN MEASUREMENTS - A method and apparatus for measuring a complex gain of a transmit path are disclosed. During a test mode, an IQ to radio frequency modulator modulates a quadrature RF carrier signal using a quadrature test signal. An RF to IQ down-converter down-converts a down-converter RF input signal to provide a quadrature down-converter output signal using the quadrature RF carrier signal. The down-converter RF input signal is based on the quadrature test signal and the gain of the transmit path. A digital frequency converter frequency converts the quadrature down-converter output signal, providing an averaged frequency converter output signal, which is a quadrature direct current signal representative of an amplitude of the quadrature test signal and the gain of the transmit path. Therefore, a measured gain of the transmit path is based on the amplitude of the quadrature test signal and averaged frequency converter output signal. | 04-10-2014 |
20140099906 | REDUCING EFFECTS OF RF MIXER-BASED ARTIFACT USING PRE-DISTORTION OF AN ENVELOPE POWER SUPPLY SIGNAL - A radio frequency (RF) power amplifier (PA) and an envelope tracking power supply are disclosed. The RF PA receives and amplifies an RF input signal to provide an RF transmit signal using an envelope power supply signal, which at least partially envelope tracks the RF transmit signal, such that the RF input signal has an RF mixer-based artifact. The envelope tracking power supply provides the envelope power supply signal, which includes mixer-based artifact pre-distortion to at least partially remove effects of the RF mixer-based artifact from the RF transmit signal. | 04-10-2014 |
20140097895 | PSEUDO-ENVELOPE FOLLOWING FEEDBACK DELAY COMPENSATION - A switch mode power supply converter and a feedback delay compensation circuit are disclosed. The switch mode power supply converter has a switching voltage output and provides a switching voltage at the switching voltage output, such that a target voltage for a power amplifier supply voltage at a power amplifier supply output is based on the switching voltage. Further, the switching voltage is based on an early indication of a change of the target voltage. The feedback delay compensation circuit provides the early indication of the change of the target voltage. | 04-10-2014 |
20140092795 | TUNABLE DIPLEXER FOR CARRIER AGGREGATION APPLICATIONS - A tunable diplexer includes a high pass filter, a low pass filter, a high band port, a low band port, and an antenna port. The high pass filter is adapted to pass high band signals falling within a high pass band between the high band port and the antenna port, while attenuating signals outside of the high pass band. The low pass filter is adapted to pass low band signals falling within a low pass band between the low band port and the antenna port, while attenuating signals outside of the low pass band. The low pass filter includes a low stop band zero, which is adapted to attenuate signals within a low stop band. The low stop band zero is tunable, such that the low stop band can be adjusted to selectively attenuate signals within a given frequency band in the low pass band. | 04-03-2014 |
20140091858 | LOCAL VOLTAGE CONTROL FOR ISOLATED TRANSISTOR ARRAYS - Self-biasing transistor switching circuitry includes a main transistor, a biasing transistor, a first capacitor, and a second capacitor. The body of the main transistor is isolated from the gate, the drain, and the source of the main transistor by an insulating layer. The first capacitor is coupled between the source and the gate of the main transistor. The second capacitor is coupled between the source and the body of the main transistor. The body and the drain of the main transistor are coupled together. The gate and the drain of the biasing transistor are coupled to the gate of the main transistor. The drain of the biasing transistor is coupled to the drain of the main transistor. The self-biasing transistor switching circuitry is adapted to receive an oscillating signal at the drain of the main transistor, and use the oscillating signal to appropriately bias the main transistor. | 04-03-2014 |
20140077787 | OPEN LOOP RIPPLE CANCELLATION CIRCUIT IN A DC-DC CONVERTER - A direct current (DC)-DC converter, which includes an open loop ripple cancellation circuit, a switching supply, and a parallel amplifier, is disclosed. During a calibration mode, the parallel amplifier provides a parallel amplifier output current to regulate a power supply output voltage based on a calibration setpoint. The switching supply drives the parallel amplifier output current toward zero using a switching control signal, such that during the calibration mode, an estimate of a current gain is based on the switching control signal. Further, during the calibration mode, the open loop ripple cancellation circuit is disabled. During a normal operation mode, the open loop ripple cancellation circuit provides a ripple cancellation current, which is based on the estimate of the current gain. | 03-20-2014 |
20140062590 | MULTIPLE POWER SUPPLY INPUT PARALLEL AMPLIFIER BASED ENVELOPE TRACKING - A switch mode power supply converter and a parallel amplifier are disclosed. The switch mode power supply converter is coupled to a modulated power supply output and the parallel amplifier has a parallel amplifier output coupled to the modulated power supply output. Further, the parallel amplifier has a group of output stages, such that each output stage is directly coupled to the parallel amplifier output and each output stage receives a separate supply voltage. | 03-06-2014 |
20140057684 | POWER LOOP CONTROL BASED ENVELOPE TRACKING - Configuration-feedback circuitry and transceiver circuitry are disclosed. The configuration-feedback circuitry regulates an output power from a radio frequency power amplifier based on a difference between a target output power from the radio frequency power amplifier and a measured output power from the radio frequency power amplifier. The transceiver circuitry regulates a modulated power supply voltage, which is used by the radio frequency power amplifier to provide power for amplification, based on the difference between the target output power from the radio frequency power amplifier and the measured output power from the radio frequency power amplifier. | 02-27-2014 |
20140055197 | POWER MANAGEMENT ARCHITECTURE FOR MODULATED AND CONSTANT SUPPLY OPERATION - A power management system, which includes a parallel amplifier circuit and a switch mode power supply converter, is disclosed. The switch mode power supply converter cooperatively operates with the parallel amplifier circuit to form the power management system. The power management system operates in one of a high power modulation mode, a medium power modulation mode, and a low power average power tracking mode. Further, during the high power modulation mode and the medium power modulation mode, the power management system controls a power amplifier supply voltage to a radio frequency power amplifier to provide envelope tracking. During the low power average power tracking mode, the power management system controls the power amplifier supply voltage to the radio frequency power amplifier to provide average power tracking. | 02-27-2014 |
20140054604 | SEMICONDUCTOR DEVICE HAVING IMPROVED HEAT DISSIPATION - A semiconductor device having improved heat dissipation is disclosed. The semiconductor device includes a semi-insulating substrate and epitaxial layers disposed on the semi-insulating substrate wherein the epitaxial layers include a plurality of heat conductive vias that are disposed through the epitaxial layers with the plurality of heat conductive vias being spaced along a plurality of finger axes that are aligned generally parallel across a surface of the epitaxial layers. The semiconductor device further includes an electrode having a plurality of electrically conductive fingers that are disposed along the plurality of finger axes such that the electrically conductive fingers are in contact with the first plurality of heat conductive vias. | 02-27-2014 |
20140054602 | FIELD EFFECT TRANSISTOR (FET) HAVING FINGERS WITH RIPPLED EDGES - A field effect transistor (FET) having fingers with rippled edges is disclosed. The FET includes a semiconductor substrate having a front side with a finger axis. A drain finger is disposed on the front side of the semiconductor substrate such that a greatest dimension of the drain finger lies parallel to the finger axis. A gate finger is disposed on the front side of the semiconductor substrate. The gate finger is spaced from the drain finger such that a greatest dimension of the gate finger lies parallel to the finger axis. A source finger is disposed on the front side of the semiconductor substrate. The source finger is spaced from the gate finger such that a greatest dimension of the source finger lies parallel to the finger axis. The drain finger, the gate finger, and the source finger each have rippled edges with an axis parallel with the finger axis. | 02-27-2014 |
20140054601 | GALLIUM NITRIDE (GAN) DEVICE WITH LEAKAGE CURRENT-BASED OVER-VOLTAGE PROTECTION - A gallium nitride (GaN) device with leakage current-based over-voltage protection is disclosed. The GaN device includes a drain and a source disposed on a semiconductor substrate. The GaN device also includes a first channel region within the semiconductor substrate and between the drain and the source. The GaN device further includes a second channel region within the semiconductor substrate and between the drain and the source. The second channel region has an enhanced drain induced barrier lowering (DIBL) that is greater than the DIBL of the first channel region. As a result, a drain voltage will be safely clamped below a destructive breakdown voltage once a substantial drain current begins to flow through the second channel region. | 02-27-2014 |
20140054596 | SEMICONDUCTOR DEVICE WITH ELECTRICAL OVERSTRESS (EOS) PROTECTION - A semiconductor device with electrical overstress (EOS) protection is disclosed. The semiconductor device includes a semi-insulating layer, a first contact disposed onto the semi-insulating layer, and a second contact disposed onto the semi-insulating layer. A passivation layer is disposed onto the semi-insulating layer. The passivation layer has a dielectric strength that is greater than that of the semi-insulating layer to ensure that a voltage breakdown occurs within the semi-insulating layer within a semi-insulating region between the first contact and the second contact before a voltage breakdown can occur in the passivation layer. | 02-27-2014 |
20140054585 | LATERAL SEMICONDUCTOR DEVICE WITH VERTICAL BREAKDOWN REGION - A lateral semiconductor device having a vertical region for providing a protective avalanche breakdown (PAB) is disclosed. The lateral semiconductor device has a lateral structure that includes a conductive substrate, semi-insulating layer(s) disposed on the conductive substrate, device layer(s) disposed on the semi-insulating layer(s), along with a source electrode and a drain electrode disposed on the device layer(s). The vertical region is separated from the source electrode by a lateral region wherein the vertical region has a relatively lower breakdown voltage level than a relatively higher breakdown voltage level of the lateral region for providing the PAB within the vertical region to prevent a potentially damaging breakdown of the lateral region. The vertical region is structured to be more rugged than the lateral region and thus will not be damaged by a PAB event. | 02-27-2014 |
20140038675 | FRONT END RADIO ARCHITECTURE (FERA) WITH POWER MANAGEMENT - A front end radio architecture (FERA) with power management is disclosed. The FERA includes a first power amplifier (PA) block having a first-first PA for amplifying first-first signals and a first-second PA for amplifying first-second signals. Also included is a second PA block having a second-first PA for amplifying second-first signals and a second-second PA for amplifying second-second signals. At least one power supply is adapted to selectively supply power to the first-first PA and the second-second PA through a first path. The power supply is also adapted to selectively supply power to the first-second PA and the second-first PA through a second path. A control system is adapted to selectively enable and disable the first-first PA, the first-second PA, the second-first PA, and the second-second PA. | 02-06-2014 |
20140035673 | MULTIMODE DIFFERENTIAL AMPLIFIER BIASING SYSTEM - Differential power amplifier circuitry includes a differential transistor pair, an input transformer, and biasing circuitry. The base contact of each transistor in the differential transistor pair may be coupled to the input transformer through a coupling capacitor. The coupling capacitors may be designed to resonate with the input transformer about a desired frequency range, thereby passing desirable signals to the differential transistor pair while blocking undesirable signals. The biasing circuitry may include a pair of emitter follower transistors, each coupled at the emitter to the base contact of each one of the transistors in the differential transistor pair and adapted to bias the differential transistor pair to maximize efficiency and stability. | 02-06-2014 |
20140028521 | TUNER TOPOLOGY FOR WIDE BANDWIDTH - Adjustable impedance tuning circuitry includes a first impedance matching terminal, a second impedance matching terminal, and a plurality of passive components adapted to match the impedance of the first impedance matching terminal and the second impedance matching terminal. The plurality of passive components includes one or more tunable components adapted to adjust the impedance of the adjustable impedance tuning circuitry to maintain an impedance match between the first impedance matching terminal and the second impedance matching terminal over a variety of operating conditions. Each of the one or more tunable components includes one or more switches adapted to selectively alter the impedance of the tunable component. The one or more switches are integrated onto a single semiconductor die in order to facilitate the performance of the adjustable impedance tuning circuitry over a wide bandwidth. | 01-30-2014 |
20140028368 | PROGRAMMABLE RF NOTCH FILTER FOR ENVELOPE TRACKING - A parallel amplifier, a switching supply, and a radio frequency (RF) notch filter are disclosed. The parallel amplifier has a parallel amplifier output, such that the switching supply is coupled to the parallel amplifier output. Further, the RF notch filter is coupled between the parallel amplifier output and a ground. The RF notch filter has a selectable notch frequency, which is based on an RF duplex frequency. | 01-30-2014 |
20140021603 | USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE - A semiconductor die, which includes a first semiconductor device, a first passivation layer, and a first interconnect bump, is disclosed. The first passivation layer is over the first semiconductor device, which includes a first group of device fingers. The first interconnect bump is thermally and electrically connected to each of the first group of device fingers. Additionally, the first interconnect bump protrudes through a first opening in the first passivation layer. | 01-23-2014 |
20140016517 | DE-MULTIPLEXING A RADIO FREQUENCY INPUT SIGNAL USING OUTPUT TRANSFORMER CIRCUITRY - The present disclosure relates to de-multiplexing at least one RF input signal feeding RF power amplifier circuitry to create multiple de-multiplexed RF output signals, which may be used to provide RF transmit signals in an RF communications system. Output transformer circuitry is coupled to outputs from the RF power amplifier circuitry to provide the de-multiplexed RF output signals, which may support multiple modes, multiple frequency bands, or both. The de-multiplexed RF output signals may be used in place of RF switching elements in certain embodiments. As a result, RF front-end switching circuitry in the RF communications system may be simplified, thereby reducing insertion losses, reducing costs, reducing size, or any combination thereof. Additionally, the output transformer circuitry may provide load line transformation, output transistor biasing, or both to the RF power amplifier circuitry. | 01-16-2014 |
20140009227 | OUTPUT IMPEDANCE COMPENSATION OF A PSEUDO-ENVELOPE FOLLOWER POWER MANAGEMENT SYSTEM - A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a compensated V | 01-09-2014 |
20130344833 | ENVELOPE POWER SUPPLY CALIBRATION OF A MULTI-MODE RADIO FREQUENCY POWER AMPLIFIER - The present disclosure relates to envelope power supply calibration of a multi-mode RF power amplifier (PA) to ensure adequate headroom when operating using one of multiple communications modes. The communications modes may include multiple modulation modes, a half-duplex mode, a full-duplex mode, or any combination thereof. As such, each communications mode may have specific peak-to-average power and linearity requirements for the multi-mode RF PA. As a result, each communications mode may have corresponding envelope power supply headroom requirements. The calibration may include determining a saturation operating constraint based on calibration data obtained during saturated operation of the multi-mode RF PA. During operation of the multi-mode RF PA, the envelope power supply may be restricted to provide a minimum allowable magnitude based on an RF signal level of the multi-mode RF PA, the communications mode, and the saturation operating constraint to provide adequate headroom. | 12-26-2013 |
20130344828 | ENVELOPE POWER SUPPLY CALIBRATION OF A MULTI-MODE RADIO FREQUENCY POWER AMPLIFIER - The present disclosure relates to envelope power supply calibration of a multi-mode RF power amplifier (PA) to ensure adequate headroom when operating using one of multiple communications modes. The communications modes may include multiple modulation modes, a half-duplex mode, a full-duplex mode, or any combination thereof. As such, each communications mode may have specific peak-to-average power and linearity requirements for the multi-mode RF PA. As a result, each communications mode may have corresponding envelope power supply headroom requirements. The calibration may include determining a saturation operating constraint based on calibration data obtained during saturated operation of the multi-mode RF PA. During operation of the multi-mode RF PA, the envelope power supply may be restricted to provide a minimum allowable magnitude based on an RF signal level of the multi-mode RF PA, the communications mode, and the saturation operating constraint to provide adequate headroom. | 12-26-2013 |
20130342270 | ENVELOPE POWER SUPPLY CALIBRATION OF A MULTI-MODE RADIO FREQUENCY POWER AMPLIFIER - The present disclosure relates to envelope power supply calibration of a multi-mode RF power amplifier (PA) to ensure adequate headroom when operating using one of multiple communications modes. The communications modes may include multiple modulation modes, a half-duplex mode, a full-duplex mode, or any combination thereof. As such, each communications mode may have specific peak-to-average power and linearity requirements for the multi-mode RF PA. As a result, each communications mode may have corresponding envelope power supply headroom requirements. The calibration may include determining a saturation operating constraint based on calibration data obtained during saturated operation of the multi-mode RF PA. During operation of the multi-mode RF PA, the envelope power supply may be restricted to provide a minimum allowable magnitude based on an RF signal level of the multi-mode RF PA, the communications mode, and the saturation operating constraint to provide adequate headroom. | 12-26-2013 |
20130337754 | FRONT END SWITCHING CIRCUITRY FOR CARRIER AGGREGATION - This disclosure relates generally to radio frequency (RF) front-end circuitry for different types of carrier aggregation, along with methods of operating the same. In one embodiment, the RF front-end circuitry includes a first diplexer, a second diplexer, first antenna selection circuitry, and second antenna selection circuitry. In order to maintain adequate isolation between high bands and low bands but provide carrier aggregation, the first antenna selection circuitry is configured to selectively couple each of a first plurality of RF ports to any one of a first low band port in the first diplexer and a second low band port in the second diplexer, while the second antenna selection circuitry is configured to selectively couple each of the second plurality of RF ports to any one of a first high band port in the first diplexer and a second high band port in the second diplexer. | 12-19-2013 |
20130336181 | DUAL ANTENNA INTEGRATED CARRIER AGGREGATION FRONT END SOLUTION - Radio frequency front end circuitry comprises a first antenna port, a second antenna port, antenna switching circuitry, a first diplexer, and a second diplexer. The antenna switching circuitry is coupled to each of the first antenna port and the second antenna port through the first diplexer and the second diplexer, respectively. The antenna switching circuitry is adapted to selectively couple one or more of a plurality of transmit and receive ports to the first antenna port and the second antenna port. | 12-19-2013 |
20130335182 | RADIO FREQUENCY TRANSMISSION LINE TRANSFORMER - Radio frequency (RF) transmission line transformers are disclosed. Unlike conventional transformers that employ magnetic cores that transmit energy from input to output through magnetic flux linkages, the embodiments of the RF transmission line transformer disclosed herein transfer energy by configuring transformer coils as balanced transmission lines. More specifically, the RF transmission line transformers have a primary transformer coil that forms at least one primary winding and a secondary transformer coil that forms at least a pair of secondary windings. The primary winding of the primary transformer coil is disposed between the pair of secondary windings so that the primary winding forms a different balanced transmission line with each one of the pair of secondary windings. This results in greater bandwidth and higher transformer power efficiency (TPE) at RF frequencies. Furthermore, the arrangement allows for reduced parasitic inductances and capacitances and thus is particularly advantageous when utilized in laminated substrates. | 12-19-2013 |
20130335161 | ANTENNA SWITCHING CIRCUITRY FOR MIMO/DIVERSITY MODES - This disclosure relates to antenna switching circuitry and other radio frequency (RF) front-end circuitry. In one embodiment, the antenna switching circuitry includes a multiple throw solid-state transistor switch (MTSTS), a multiple throw microelectromechanical switch (MTMEMS), and a control circuit. The MTSTS is configured to selectively couple a first pole port to any one of a first set of throw ports and to selectively couple a second pole port to any one of a second set of throw ports. The MTMEMS is configured to selectively couple a third pole port to any one of a third set of throw ports. The control circuit is configured to control the selective coupling of the MTSTS and the MTMEMS. In this manner, the control circuit may operate the antenna switching circuitry so that RF signals may be routed in accordance with Long Term Evolution (LTE) Multiple-Input and Multiple-Output (MIMO) and/or LTE diversity specifications. | 12-19-2013 |
20130335160 | ANTENNA SWITCHING CIRCUITRY - This disclosure relates to antenna switching circuitry and other radio frequency (RF) front-end circuitry. In one embodiment, the antenna switching circuitry includes a multiple throw solid-state transistor switch (MTSTS) and a multiple throw microelectromechanical switch (MTMEMS). The MTSTS is configured to selectively couple a first pole port to any one of a first set of throw ports and to selectively couple a second pole port to any one of a second set of throw ports. The MTMEMS is configured to selectively couple a third pole port to any one of a third set of throw ports. The third pole port of the MTMEMS is coupled to a first throw port in the first set of throw ports and a second throw port in the second set of throw ports of the MTSTS. Accordingly, the MTSTS is capable of routing multiple RF signals to and from the MTMEMS. | 12-19-2013 |
20130331048 | HARMONIC TRAP CIRCUIT FOR LINEAR DIFFERENTIAL POWER AMPLIFIERS - Tank circuitry coupled to the output terminals of a differential power amplifier includes two trap circuits configured to divert harmonic signals away from the output terminals. A tank inductor is provided to form a tank circuit in conjunction with each one of the trap circuits. At certain harmonic frequencies of the input signal to the differential power amplifier, the trap circuits are resonant and present a substantially low impedance path to ground, thereby diverting harmonic signals away from the output terminals of the differential power amplifier. At the fundamental frequency of the input signal to the differential power amplifier, the trap circuits are resonant with the tank inductor and present a substantially high impedance compared to the load impedance presented at the output terminals of the differential power amplifier, thereby reducing the loading effect of the trap circuits at the fundamental frequency. | 12-12-2013 |
20130321077 | SWITCHABLE VRAMP LIMITER - A power amplification device is disclosed that includes a power amplification circuit operable to amplify a radio frequency (RF) signal in accordance with an amplification gain, and a voltage regulation circuit operable to generate a regulated voltage. A regulated voltage level of the regulated voltage sets the amplification gain. To help prevent the voltage regulation circuit from saturating, the voltage regulation circuit is configured to reduce a voltage adjustment gain when the regulated voltage level reaches a threshold voltage level. In one embodiment, the threshold voltage level is set to be higher when a band-select signal indicates that the RF signal is being transmitted within a first frequency band, and is set to be lower when the band-select signal indicates that the RF signal is being transmitted within a second frequency band. The spectral performance of the power amplification device thus improves with regard to the second frequency band. | 12-05-2013 |
20130314163 | INTEGRATED STACKED POWER AMPLIFIER AND RF SWITCH ARCHITECTURE - Combination circuitry includes a relatively small preamplifier and includes hybrid circuitry. The hybrid circuitry is configured to perform mode switching while also performing some amplification, thus allowing the relatively small preamplifier to be smaller than a conventional power amplifier. In one embodiment, the hybrid circuitry includes first series portion configured to amplify when ON, a first shunt portion, a second series portion configured to amplify when ON, and a second shunt portion. The first series portion may include: a first transistor; a first variable impedance in communication with a gate of the first transistor, wherein the first variable impedance is configured to receive a first transistor control signal; a second transistor in series with the first transistor; and a second variable impedance in communication with a gate of the second transistor, wherein second variable impedance is configured to receive a second transistor control signal. | 11-28-2013 |
20130314153 | COLLECTOR BOOST - Embodiments of power amplification devices are described that include a power amplification circuit, a first voltage regulation circuit, and a second voltage regulation circuit. The voltage regulation circuits are configured to provide regulated voltages to the power amplification circuit. The power amplification device also includes a threshold detection circuit to get better maximum output power performance while preserving power efficiency. The threshold detection circuit is configured to increase a voltage adjustment gain of the first voltage regulation circuit when a regulated voltage level of regulated voltage from the second voltage regulation circuit reaches a threshold voltage level. In this manner, the voltage adjustment gain can be increased when the second voltage regulation circuit is close to or has railed. Increasing the voltage adjustment gain when the second voltage regulation circuit is railing or is close to railing improves the power performance and the power efficiency of the power amplification circuit. | 11-28-2013 |
20130307621 | VRAMP LIMITING USING RESISTORS - Power amplification devices are described, which are configured to amplify a radio frequency (RF) transmission signal. The power amplification device includes a voltage regulation circuit and a power amplification circuit. The voltage regulation circuit is configured to generate a regulated voltage for the power amplification device from a supply voltage and to adjust a regulated voltage level of the regulated voltage in accordance with a voltage adjustment gain. The voltage adjustment gain of the voltage regulation circuit is set by a feedback resistance. To help prevent the voltage regulation circuit from saturating, the voltage regulation circuit adjusts the feedback resistance to reduce the voltage regulation gain. | 11-21-2013 |
20130307617 | PSEUDO-ENVELOPE FOLLOWING POWER MANAGEMENT SYSTEM - Embodiments disclosed in the detailed description relate to a pseudo-envelope follower power management system used to manage the power delivered to a linear RF power amplifier. | 11-21-2013 |
20130307616 | SNUBBER FOR A DIRECT CURRENT (DC)-DC CONVERTER - Circuitry, which includes a direct current (DC)-DC converter having a first switching power supply is disclosed. The first switching power supply includes a first switching converter, an energy storage element, a first inductive element, which is coupled between the first switching converter and the energy storage element, and a first snubber circuit, which is coupled across the first inductive element. The first switching power supply receives and converts a DC power supply signal to provide a first switching power supply output signal based on a setpoint. | 11-21-2013 |
20130307506 | HYBRID REGULATOR WITH COMPOSITE FEEDBACK - A hybrid voltage regulator includes a shunt circuit, a shunt feedback circuit, a pass circuit, and a bias controller. The bias controller is configured to control the pass circuit. The hybrid voltage regulator may also include a current source. This hybrid voltage regulator reduces current consumption at low load conditions (improving power efficiency and battery life, particularly for CMOS based regulators), and also provides wideband power supply rejection and fast transient response. | 11-21-2013 |
20130280877 | METHODS FOR FABRICATING HIGH VOLTAGE FIELD EFFECT TRANSITOR FINGER TERMINATIONS - Methods for fabricating a field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends are disclosed. The methods provide field effect transistors that each include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. At least one method includes etching at least one gate channel into the passivation layer with a predetermined slope that reduces electric fields at a gate edge. Other methods include steps for fabricating a sloped gate foot, a round end, and/or a chamfered end to further improve high voltage operation. | 10-24-2013 |
20130277687 | HIGH VOLTAGE FIELD EFFECT TRANSITOR FINGER TERMINATIONS - A field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends is disclosed. Embodiments of the field effect transistor include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. Another embodiment includes at least one source field plate integral with the at least one source finger. The at least one source field plate extends over the at least one gate finger that includes a portion outside of the active region. Either embodiment can also include a sloped gate foot to further improve high voltage operation. | 10-24-2013 |
20130250820 | MULTI-MODE POWER AMPLIFIER ARCHITECTURE - Radio frequency (RF) circuitry, which includes a time division duplex (TDD)/frequency division duplex (FDD) driver stage, a TDD final stage, an FDD final stage, and power directing circuitry, is disclosed. The power directing circuitry is coupled between the TDD/FDD driver stage and the TDD final stage, and is further coupled between the TDD/FDD driver stage and the FDD final stage. | 09-26-2013 |
20130250819 | CARRIER AGGREGATION FRONT END ARCHITECTURE - Radio frequency (RF) front end circuitry includes a notch diplexer. The notch diplexer includes a high pass filter coupled between a high band port and an antenna port, and a low pass notch filter coupled between a low band port and the antenna port. The high pass filter is adapted to receive a high band receive signal having a high band carrier frequency at the antenna port, and pass the high band receive signal to the high band port. The low pass notch filter is adapted to receive a low band transmit signal having a low band carrier frequency at the low band port, and attenuate distortion in the low band transmit signal about a notch stop band before passing the low band transmit signal to the antenna port. According to one embodiment, the notch stop band includes the high band carrier frequency. | 09-26-2013 |
20130249619 | SOI SWITCH ENHANCEMENT - The described FET switch topology greatly reduces the off state loading experienced by the gate biasing resistors in a stacked FET structure. The FET switch topology evenly distributes the voltage across the FET switch topology which reduces the voltage across the gate biasing resistors when the stacked FET structure is in an off state. Because the off state loading is reduced, there is a corresponding reduction of the current through bias resistors, which permits a reduction in the size of the bias resistors. This permits a substantial reduction in the area attributed to the bias resistors in an integrated solution. | 09-26-2013 |
20130241666 | BAND SWITCH WITH SWITCHABLE NOTCH FOR RECEIVE CARRIER AGGREGATION - A band switch with a switchable notch for receive carrier aggregation is disclosed. The band switch has at least one input and an output with at least one series switch coupled between the at least one input and the output. The at least one series switch is adapted to selectively couple the input to the output in response to a first control signal. The band switch also includes at least one shunt switch coupled between the at least one input and a voltage node. The at least one shunt switch is adapted to selectively couple the at least one input to the voltage node in response to a second control signal. In addition, at least one notch filter is selectively coupled to the output in a shunt configuration, wherein the at least one notch filter is configured to attenuate signals within a stop band to attenuate harmonics and distortion. | 09-19-2013 |
20130234793 | SPLIT VCC AND COMMON VCC POWER MANAGEMENT ARCHITECTURE FOR ENVELOPE TRACKING - An envelope tracking power supply and transmitter control circuitry are disclosed. The transmitter control circuitry receives a first envelope power supply control signal and a second envelope power supply control signal. The envelope tracking power supply operates in one of a group of operating modes, which includes a first operating mode and a second operating mode. During both the first operating mode and the second operating mode, a first envelope power supply signal is provided to a driver stage based on the first envelope power supply control signal. During the first operating mode, a second envelope power supply signal is provided to a final stage based on the first envelope power supply control signal. However, during the second operating mode, the second envelope power supply signal is provided to the final stage based on the second envelope power supply control signal. | 09-12-2013 |
20130230643 | ATOMIC LAYER DEPOSITION ENCAPSULATION FOR ACOUSTIC WAVE DEVICES - Acoustic wave devices and methods of coating a protective film of alumina (Al | 09-05-2013 |
20130221800 | ATOMIC LAYER DEPOSITION ENCAPSULATION FOR ACOUSTIC WAVE DEVICES - Acoustic wave devices and methods of coating a protective film of alumina (Al | 08-29-2013 |
20130217341 | HIGH EFFICIENCY PATH BASED POWER AMPLIFIER CIRCUITRY - A first transmit path, a second transmit path, and a third transmit path are disclosed. The first transmit path includes a first radio frequency (RF) power amplifier (PA) and alpha switching circuitry, which is coupled to an output from the first RF PA. The second transmit path includes a second RF PA and beta switching circuitry, which is coupled to an output from the second RF PA. The third transmit path includes a third RF PA. | 08-22-2013 |
20130215808 | MULTIPLE PORT RF SWITCH ESD PROTECTION USING SINGLE PROTECTION STRUCTURE - Antenna switching circuitry comprises a plurality of communication ports, an antenna port, a plurality of switches, and an ESD protection device. The plurality of switches are adapted to selectively couple one or more of the communication ports to the antenna port in order to transmit or receive a signal. The ESD protection device is coupled between one of the plurality of communication ports and ground, and is adapted to form a substantially low impedance path to ground during an ESD event. Upon the occurrence of an ESD event, a received electrostatic charge passes through one or more of the plurality of switches to the ESD protection device, where it is safely diverted to ground. By using only one ESD protection device, desensitization of the antenna switching circuitry due to the parasitic loading of the ESD protection device is avoided. Further, the area of the antenna switching circuitry is minimized. | 08-22-2013 |
20130207714 | SHUNT SWITCH AT COMMON PORT TO REDUCE HOT SWITCHING - Pilot switch circuitry grounds a hot node (an injection node) of a microelectromechanical system (MEMS) switch to reduce or eliminate arcing between a cantilever contact and a terminal contact when the MEMS switch is opened or closed. The pilot switch circuitry grounds the hot node prior to, during, and after the cantilever contact and terminal contact of the MEMS come into contact with one another (when the MEMS switch is closed). Additionally, the pilot switch circuitry grounds the hot node prior to, during, and after the cantilever contact and terminal contact of the MEMS disengage from one another (when the MEMS switch is opened). | 08-15-2013 |
20130201882 | TUNABLE HYBRID COUPLER - This disclosure includes embodiments of a tunable hybrid coupler. The tunable hybrid coupler includes a first inductive element having a first inductance, a second inductive element having a second inductance and mutually coupled to the first inductive element, a first variable capacitive element having a first variable capacitance, and a second variable capacitance having a second variable capacitance. The first variable capacitive element is coupled between a first port and a second port. The second variable capacitive element is coupled between a third port and a fourth port. The first inductive element is coupled from the first port to the third port, while the second inductive element is coupled from the second port to the fourth port. Accordingly, the tunable hybrid coupler may form an impedance matching network that is tunable to different RF communication bands. The tunable hybrid coupler may thus be included in a tunable RF duplexer. | 08-08-2013 |
20130201881 | RF TRANSCEIVER WITH DISTRIBUTED FILTERING TOPOLOGY - This disclosure includes embodiments of a radio frequency (RF) transceiver having a distributed duplex filtering topology. The RF transceiver includes a power amplifier and a tunable RF duplexer. The tunable RF duplexer is configured to input an RF transmission input signal from the power amplifier, generate an RF transmission output signal that operates within an RF transmission band in response to the RF transmission input signal from the power amplifier, and simultaneously output the RF transmission output signal to an antenna and input an RF receive input signal that operates within an RF receive band from the antenna. The power amplifier includes a plurality of RF amplifier stages coupled in cascode and an RF filter coupled between a first one of the RF amplifier stages and a second one of the RF amplifier stages. Accordingly, the RF filter is configured to provide tuning within the RF receive band. | 08-08-2013 |
20130201880 | TUNABLE DUPLEXER ARCHITECTURE - A tunable radio frequency (RF) duplexer is disclosed. The tunable RF duplexer includes a first hybrid coupler, a second hybrid coupler, and an RF filter circuit. The first hybrid coupler is operable to split an RF receive input signal into first and second RF quadrature hybrid receive signals (QHRSs). The first hybrid coupler is also operable to split an RF transmission input signal into first and second RF quadrature hybrid transmission signals (QHTSs). The RF filter circuit is operable to pass the first and second RF QHRSs to the second hybrid coupler and to reflect the first and second RF QHTSs back to the first hybrid coupler. Additionally, the second hybrid coupler is configured to combine the first and second RF QHRSs into an RF receive output signal, while the first hybrid coupler is configured to combine the first and second RF QHTSs into an RF transmission output signal. | 08-08-2013 |
20130194979 | OPTIMAL SWITCHING FREQUENCY FOR ENVELOPE TRACKING POWER SUPPLY - A radio frequency (RF) communications system, which includes an RF power amplifier (PA) and an envelope tracking power supply, is disclosed. The RF communications system processes RF signals associated with at least a first RF communications band, which has a first bandwidth. The RF PA receives and amplifies an RF input signal to provide an RF transmit signal using an envelope power supply signal. The envelope tracking power supply provides the envelope power supply signal, which has switching ripple based on a programmable switching frequency. The programmable switching frequency is selected to be greater that the first bandwidth. | 08-01-2013 |
20130194051 | ANALOG-DIGITAL PULSE WIDTH MODULATOR (ADPWM) - Analog-to-digital pulse width modulation circuitry includes thermometer code generator circuitry, clock generator circuitry, delay selection circuitry, and an output stage. The thermometer code generator circuitry is adapted to generate a digital thermometer code based upon a received analog input voltage. The clock generator circuitry is adapted to generate a reference clock and a plurality of delayed clock signals. The delay selection circuitry is connected between the thermometer code generator circuitry and the clock generator circuitry, and is adapted to select one of the delayed clock signals to present to the output stage based upon the generated thermometer code. The selected delayed clock signal is delayed by an amount of time that is proportional to the generated thermometer code. The reference clock signal and the selected delayed clock signal are delivered to the output stage where they are used to generate a pulse width modulated output signal. | 08-01-2013 |
20130183916 | MODIFIED SWITCHING RIPPLE FOR ENVELOPE TRACKING SYSTEM - Radio frequency (RF) transmitter circuitry, which includes an RF power amplifier (PA) and an envelope tracking power supply, is disclosed. The RF PA receives and amplifies an RF input signal to provide an RF transmit signal using an envelope power supply signal. The envelope tracking power supply provides the envelope power supply signal, which has switching ripple. Further, the envelope tracking power supply operates in either a normal switching ripple mode or a modified switching ripple mode, such that during the normal switching ripple mode, the envelope power supply signal has normal switching ripple, and during the modified switching ripple mode, the envelope power supply signal has modified switching ripple. When the modified switching ripple is required, the envelope tracking power supply operates in the modified switching ripple mode. | 07-18-2013 |
20130181774 | ENVELOPE TRACKING WITH VARIABLE COMPRESSION - Radio frequency (RF) transmitter circuitry, which includes an envelope tracking power supply and an RF power amplifier (PA), is disclosed. The RF PA operates in either a first operating mode or a second operating mode, such that selection of the operating mode is based on compression tolerance criteria. During the first operating mode, the RF PA receives and amplifies an RF input signal using a first compression level. During the second operating mode, the RF PA receives and amplifies the RF input signal using a second compression level, which is greater than the first compression level. The envelope tracking power supply provides an envelope power supply signal to the RF PA. The envelope power supply signal provides power for amplification. | 07-18-2013 |
20130181730 | PULSED BEHAVIOR MODELING WITH STEADY STATE AVERAGE CONDITIONS - A method for pulsed behavior modeling of a device under test (DUT) using steady state conditions is disclosed. The method includes providing an automated test system (ATS) programmed to capture at least one behavior of the DUT. The ATS then generates a DUT input power pulse that transitions from a predetermined steady state level to a predetermined pulse level and back to the predetermined steady state level. At least one behavior of the DUT is then captured by the ATS while the input power is at the predetermined pulse level. The ATS then steps the predetermined pulse level to a different predetermined pulse level, and the above steps are repeated until a range of predetermined pulse levels is swept. The ATS then steps the predetermined steady state level to a different steady state level, and the above steps are repeated until a range of predetermined steady state levels is swept. | 07-18-2013 |
20130181521 | SINGLE +82 C-BUCKBOOST CONVERTER WITH MULTIPLE REGULATED SUPPLY OUTPUTS - The detailed description described embodiments of highly efficient power management systems configurable to simultaneously generate various output voltage levels for different components, sub-assemblies, and devices of electronic devices, sub-systems, and systems. In particular, the described embodiments include power management systems that substantially reduce or eliminate the need for inductors, large numbers of capacitors, and complex switching techniques to transform an available voltage level from a system power source, such as a battery, to more desirable power supply voltages. Some described embodiments include a charge pump that uses only two flying capacitors to simultaneously generate multiple supply outputs, where each of the multiple supply outputs may provide either the same or a different output voltage level. The described embodiments also include efficient power management systems that flexibly provide highly accurate voltage levels that are substantially insensitive to the voltage level provided by a system power source, such as a battery. | 07-18-2013 |
20130177106 | MULTIPLE FUNCTIONAL EQUIVALENCE DIGITAL COMMUNICATIONS INTERFACE - A multiple functional equivalence digital communications interface and a group of functional circuits are disclosed. The multiple functional equivalence digital communications interface presents a functional equivalence of each of a group of digital communications interfaces to a digital communications bus. Each functional equivalence of the group of digital communications interfaces is associated with a corresponding one of the group of functional circuits. | 07-11-2013 |
20130176914 | RF DUPLEXING DEVICE - Radio frequency (RF) duplexing devices and methods of operating the same are disclosed. In one embodiment, an RF duplexing device includes a transmission port, a receive port, a first duplexer, and a second duplexer. The first duplexer is coupled to the transmission port and the receive port, and is configured to provide a first phase shift from the transmission port to the receive port. The second duplexer is also coupled to the transmission port and the receive port. However, the second duplexer is configured to provide a second phase shift that is differential to the first phase shift from the transmission port to the receive port. By providing the second phase shift so that the second phase shift is differential to the first phase shift, the RF duplexing device can provide isolation through cancellation without needing to introduce significant insertion losses. | 07-11-2013 |
20130176912 | RF DUPLEXING DEVICE - Radio frequency (RF) duplexing devices and methods of operating the same are disclosed. In one embodiment, an RF duplexing device includes a transmission port, a receive port, a first duplexer, and a second duplexer. The first duplexer is coupled to the transmission port and the receive port, and is configured to provide a first phase shift from the transmission port to the receive port. The second duplexer is also coupled to the transmission port and the receive port. However, the second duplexer is configured to provide a second phase shift that is differential to the first phase shift from the transmission port to the receive port. By providing the second phase shift so that the second phase shift is differential to the first phase shift, the RF duplexing device can provide isolation through cancellation without needing to introduce significant insertion losses. | 07-11-2013 |
20130176075 | DUAL PARALLEL AMPLIFIER BASED DC-DC CONVERTER - A direct current (DC)-DC converter, which includes switching circuitry, a first parallel amplifier, and a second parallel amplifier, is disclosed. The switching circuitry has a switching circuitry output. The first parallel amplifier has a first feedback input and a first parallel amplifier output. The second parallel amplifier has a second feedback input and a second parallel amplifier output. A first inductive element is coupled between the switching circuitry output and the first feedback input. A second inductive element is coupled between the first feedback input and the second feedback input. | 07-11-2013 |
20130170147 | RDL SYSTEM IN PACKAGE - In one embodiment, a shielded electronic module is formed on a substrate. The substrate has a component area and one or more electronic components attached to the component area. One set of conductive pads may be attached to the component area and another set of conductive pads may be provided on the electronic component. The conductive pads on the component area are electrically coupled to the conductive pads of the electronic component by a conductive layer. A first insulating layer is provided over the component area and underneath the conductive layer that may insulate the electronic component and the substrate from the conductive layer. A second insulating layer is provided over the first insulating layer that covers at least the conductive layer. In this manner, the conductive layer is isolated from an electromagnetic shield formed over the component area. | 07-04-2013 |
20130169245 | NOISE REDUCTION FOR ENVELOPE TRACKING - A direct current (DC)-DC converter, which includes a parallel amplifier, a radio frequency (RF) trap, and a switching supply, is disclosed. The switching supply includes switching circuitry and a first inductive element. The parallel amplifier has a feedback input and a parallel amplifier output. The switching circuitry has a switching circuitry output. The first inductive element is coupled between the switching circuitry output and the feedback input. The RF trap is coupled between the parallel amplifier output and a ground. | 07-04-2013 |
20130162352 | DIFFERENTIAL POWER MANAGEMENT AND POWER AMPLIFIER ARCHITECTURE - Embodiments of the present disclosure relate to radio frequency (RF) transmitter circuitry, which includes non-inverting path power amplifier (PA) circuitry, inverting path PA circuitry, and RF transformer circuitry. The non-inverting path PA circuitry provides a non-inverting RF signal and a first power supply (PS) signal to the RF transformer circuitry, such that the first PS signal has a first ripple voltage. The inverting path PA circuitry provides an inverting RF signal and a second PS signal to the RF transformer circuitry, such that the second PS signal has a second ripple voltage. The RF transformer circuitry additively combines the non-inverting RF signal and the inverting RF signal to provide an RF output signal, such that effects of the first ripple voltage and the second ripple voltage are substantially cancelled from the RF output signal. | 06-27-2013 |
20130154729 | DYNAMIC LOADLINE POWER AMPLIFIER WITH BASEBAND LINEARIZATION - Radio frequency (RF) amplification devices and methods of amplifying RF signals are disclosed. In one embodiment, an RF amplification device includes a control circuit and a Doherty amplifier configured to amplify an RF signal. The Doherty amplifier includes a main RF amplification circuit and a peaking RF amplification circuit. The control circuit is configured to activate the peaking RF amplification circuit in response to the RF signal reaching a threshold level. In this manner, the activation of the peaking RF amplification circuit can be precisely controlled. | 06-20-2013 |
20130147445 | VOLTAGE MULTIPLIER CHARGE PUMP BUCK - DC to DC converter circuitry includes a dual phase charge pump and at least one pair of multiplier phase circuits. The dual phase charge pump is coupled to each one of the at least one pair of multiplier circuits and adapted to receive a DC input voltage and only four control signals, and produce a stepped-up output voltage. Each one of the at least one pair of multiplier phase circuits are adapted to receive the stepped-up output voltage, a cross-coupled control signal from the other multiplier phase circuit in the pair of multiplier phase circuits, and a different one of the control signals and further multiply the stepped-up output voltage to produce a multiplied stepped-up output voltage with a magnitude that is approximately three times that of the DC input voltage or greater. | 06-13-2013 |
20130141169 | LINEAR AMPLIFIER POWER SUPPLY MODULATION FOR ENVELOPE TRACKING - Circuitry, which includes a linear amplifier and a linear amplifier power supply, is disclosed. The linear amplifier at least partially provides an envelope power supply signal to a radio frequency (RF) power amplifier (PA) using a selected one of a group of linear amplifier supply voltages. The linear amplifier power supply provides at least one of the group of linear amplifier supply voltages. Selection of the selected one of the group of linear amplifier supply voltages is based on a desired voltage of the envelope power supply signal. | 06-06-2013 |
20130141072 | PHASE RECONFIGURABLE SWITCHING POWER SUPPLY - Embodiments of circuitry, which includes power supply switching circuitry and a first inductive element, are disclosed. The power supply switching circuitry has a first switching output and a second switching output. The first inductive element is coupled between the first switching output and a power supply output. The power supply switching circuitry operates in one of a first operating mode and a second operating mode. During the first operating mode, the first switching output is voltage compatible with the second switching output. During the second operating mode, the first switching output is allowed to be voltage incompatible with the second switching output. | 06-06-2013 |
20130141068 | AVERAGE POWER TRACKING CONTROLLER - This disclosure relates to radio frequency (RF) power converters and methods of operating the same. In one embodiment, an RF power converter includes an RF switching converter, a low-drop out (LDO) regulation circuit, and an RF filter. The RF filter is coupled to receive a pulsed output voltage from the RF switching converter and a supply voltage from the LDO regulation circuit. The RF filter is operable to alternate between a first RF filter topology and a second RF filter topology. In the first RF filter topology, the RF filter is configured to convert the pulsed output voltage from a switching circuit into the supply voltage. The RF filter in the second RF filter topology is configured to filter the supply voltage from the LDO regulation circuit to reduce a ripple variation in a supply voltage level of the supply voltage. As such, the RF filter provides greater versatility. | 06-06-2013 |
20130141064 | VOLTAGE OFFSET LOOP FOR A SWITCHING CONTROLLER - This disclosure relates to radio frequency (RF) power converters and methods of operating the same. In one embodiment, an RF power converter includes an RF switching converter, a low-drop out (LDO) regulation circuit, and an RF filter. The RF filter is coupled to receive a pulsed output voltage from the RF switching converter and a supply voltage from the LDO regulation circuit. The RF filter is operable to alternate between a first RF filter topology and a second RF filter topology. In the first RF filter topology, the RF filter is configured to convert the pulsed output voltage from a switching circuit into the supply voltage. The RF filter in the second RF filter topology is configured to filter the supply voltage from the LDO regulation circuit to reduce a ripple variation in a supply voltage level of the supply voltage. As such, the RF filter provides greater versatility. | 06-06-2013 |
20130141063 | MULTIPLE MODE RF POWER CONVERTER - This disclosure relates to radio frequency (RF) power converters and methods of operating the same. In one embodiment, an RF power converter includes an RF switching converter, a low-drop out (LDO) regulation circuit, and an RF filter. The RF filter is coupled to receive a pulsed output voltage from the RF switching converter and a supply voltage from the LDO regulation circuit. The RF filter is operable to alternate between a first RF filter topology and a second RF filter topology. In the first RF filter topology, the RF filter is configured to convert the pulsed output voltage from a switching circuit into the supply voltage. The RF filter in the second RF filter topology is configured to filter the supply voltage from the LDO regulation circuit to reduce a ripple variation in a supply voltage level of the supply voltage. As such, the RF filter provides greater versatility. | 06-06-2013 |
20130141062 | RF POWER CONVERTER - This disclosure relates to radio frequency (RF) power converters and methods of operating the same. In one embodiment, an RF power converter includes an RF switching converter, a low-drop out (LDO) regulation circuit, and an RF filter. The RF filter is coupled to receive a pulsed output voltage from the RF switching converter and a supply voltage from the LDO regulation circuit. The RF filter is operable to alternate between a first RF filter topology and a second RF filter topology. In the first RF filter topology, the RF filter is configured to convert the pulsed output voltage from a switching circuit into the supply voltage. The RF filter in the second RF filter topology is configured to filter the supply voltage from the LDO regulation circuit to reduce a ripple variation in a supply voltage level of the supply voltage. As such, the RF filter provides greater versatility. | 06-06-2013 |
20130140678 | INSULATOR LAYER BASED MEMS DEVICES - The present invention relates to using an insulator layer between two metal layers of a semiconductor die to provide a micro-electromechanical systems (MEMS) device, such as an ohmic MEMS switch or a capacitive MEMS switch. In an ohmic MEMS switch, the insulator layer may be used to reduce metal undercutting during fabrication, to prevent electrical shorting of a MEMS actuator to a MEMS cantilever, or both. In a capacitive MEMS switch, the insulator layer may be used as a capacitive dielectric between capacitive plates, which are provided by the two metal layers. A fixed capacitive element may be provided by the insulator layer between the two metal layers. In one embodiment of the present invention, an ohmic MEMS switch, a capacitive MEMS switch, a fixed capacitive element, or any combination thereof may be integrated into a single semiconductor die. | 06-06-2013 |
20130137383 | LINEAR FET FEEDBACK AMPLIFIER - A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through the input node is disclosed. The circuit has a resistor-inductor-capacitor (RLC) type frequency bias feedback network communicatively coupled between the output transistor and the input node for providing biasing to the Darlington transistor pair as well as for adjusting at least one characteristic of an amplified version of the input signal that passes through the input transistor and into the frequency bias network. The circuit further includes a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of the amplified version of the input signal that passes through the input transistor. | 05-30-2013 |
20130135052 | INTERFERENCE REDUCTION BETWEEN RF COMMUNICATIONS BANDS - Radio frequency (RF) power amplifier (PA) circuitry and a PA envelope power supply are disclosed. The RF PA circuitry receives and amplifies an RF input signal to provide an RF output signal using an envelope power supply signal, which is provided by the PA envelope power supply. The RF PA circuitry operates in either a normal RF spectral emissions mode or a reduced RF spectral emissions mode. When reduced RF spectral emissions are required, the RF PA circuitry operates in the reduced RF spectral emissions mode. As such, at a given RF output power, during the reduced RF spectral emissions mode, RF spectral emissions of the RF output signal are less than during the normal RF spectral emissions mode. As a result, the reduced RF spectral emissions mode may be used to reduce interference between RF communications bands. | 05-30-2013 |
20130135045 | MONOTONIC CONVERSION OF RF POWER AMPLIFIER CALIBRATION DATA - Circuitry, which includes data memory and processing circuitry, is disclosed. The data memory is used to store look-up table (LUT)-based radio frequency (RF) power amplifier (PA) calibration data. The processing circuitry converts at least a portion of the LUT-based RF PA calibration data to provide monotonic response curve-based data. As such, a magnitude of an envelope power supply control signal is determined based on a magnitude of an RF input signal using the monotonic response curve-based data. | 05-30-2013 |
20130135043 | MULTIMODE RF AMPLIFIER SYSTEM - Multimode radio frequency (RF) amplifier systems and techniques are disclosed. In one embodiment, a multimode radio frequency (RF) amplifier system has a first RF amplifier and a second RF amplifier. The first RF amplifier may support a first RF communication standard. The second RF amplifier may support a second RF communication standard. The first RF amplifier includes an auxiliary circuit. The auxiliary circuit may provide a service or a utility to a second RF amplifier. For example, the auxiliary circuit may generate a supply voltage to power the second RF amplifier. | 05-30-2013 |
20130134956 | USING A SWITCHING SIGNAL DELAY TO REDUCE NOISE FROM A SWITCHING POWER SUPPLY - Embodiments of circuitry, which includes power supply switching circuitry, a first inductive element, and a second inductive element, are disclosed. The power supply switching circuitry provides a first switching output signal to the first inductive element and a second switching output signal to the second inductive element. The first inductive element has a first inductor current and the second inductive element has a second inductor current. The second switching output signal is delayed from the first switching output signal by a switching signal delay. The first inductor current and the second inductor current combine to provide a combined inductor current, which has a frequency response with a group of notches, such that frequency locations of the group of notches are based on the switching signal delay. | 05-30-2013 |
20130127513 | TEMPERATURE COMPENSATION ATTENUATOR - In one embodiment, a temperature compensating attenuator is disclosed having an attenuation circuit and a control circuit. The temperature compensating attenuator circuit may include a first series connected attenuation circuit segment and a shunt connected attenuation circuit segment, as well as additional attenuation circuit segments. Each attenuation circuit segment includes a stack of transistors that are coupled to provide the attenuation circuit segment with an impedance attenuation level having a continuous impedance range. The control circuit may be operably associated with the stack of transistors in each attenuation circuit segment to control the attenuation level of the attenuation circuit. The temperature compensating attenuator includes a temperature compensating circuit that compensates for variations in operation of the attenuation circuit due to a temperature change. | 05-23-2013 |
20130121217 | MULTI-MODE SPLIT BAND DUPLEXER ARCHITECTURE - The present disclosure relates to a split-band duplexer architecture that takes advantage of a relationship between a frequency division duplex (FDD) transmit band, an FDD receive band, and a time division duplex (TDD) band, which has frequencies located between FDD transmit band frequencies and FDD receive band frequencies. As such, by splitting the FDD receive and transmit bands into two sub-bands, two separate sub-band duplexers may be used to fully support the FDD receive and transmit bands. Further, a passband of one of the sub-band duplexers may be widened to support the TDD band while transmitting, and a passband of the other of the sub-band duplexers may be widened to support the TDD band while receiving. By using sub-band duplexers, isolation margins and insertion loss margins may be increased, which may allow use of standard filter components, such as surface acoustic wave (SAW) filters. | 05-16-2013 |
20130113556 | VOLTAGE, CURRENT, AND SATURATION PREVENTION - In one embodiment, saturation of the control system of a power amplifier is limited by comparing a control voltage at a first control node against a scaled battery voltage, and then drawing an error current away from the first control node when the control voltage exceeds the scaled battery voltage. The first control node may be located after a trans-conductance amplifier in a feedback control system. | 05-09-2013 |
20130113300 | COMBINED BALUN TRANSFORMER AND HARMONIC FILTER - In one embodiment, a balanced to unbalanced transformer utilizes a crossover configuration such that some portion of the secondary coil (inductor) is shared between two resonators (capacitors). Adding a first capacitor in parallel with a portion of the secondary inductor creates a first harmonic trap (filter), and also efficiently uses the secondary coil (inductor) as a resonating element. | 05-09-2013 |
20130113286 | FLOATING POWER CONVERTER - A floating power converter includes direct current to direct current (DC-DC) converter circuitry having at least one converter control terminal for receiving at least one control signal, a high side (H-S) converter input terminal, a low side (L-S) converter input terminal, and a converter output terminal. The floating power converter also has an H-S source selector configured to selectively couple either a first H-S voltage source or a second H-S voltage source to the H-S converter input terminal in response to a selector control signal. Moreover, an L-S source selector is configured to selectively couple either a first L-S voltage source or a second L-S voltage source to the L-S converter input terminal in response to the selector control signal. | 05-09-2013 |
20130107769 | AVERAGE FREQUENCY CONTROL OF SWITCHER FOR ENVELOPE TRACKING | 05-02-2013 |
20130106508 | INDUCTANCE BASED PARALLEL AMPLIFIER PHASE COMPENSATION | 05-02-2013 |
20130106378 | RF SWITCHING CONVERTER WITH RIPPLE CORRECTION | 05-02-2013 |
20130099858 | DUAL PRIMARY SWITCHED TRANSFORMER FOR IMPEDANCE AND POWER SCALING - This application reduces the power of series combined transformers and of parallel combined transformers while maintaining efficiency. In one embodiment, a series combined transformer is provided with a switch between a first primary inductor and a second primary inductor, in order to provide at least two modes. In a high power mode, the switch is open and the series combined transformer operates normally. In a low power mode, the switch is closed, one amplifier from a first differential amplifier pair is shut down, one amplifier from a second differential pair is shut down, and the series combined transformer operates efficiently in a low power mode. | 04-25-2013 |
20130099287 | GALLIUM ARSENIDE HETEROJUNCTION SEMICONDUCTOR STRUCTURE - Embodiments of semiconductor structure are disclosed along with methods of forming the semiconductor structure. In one embodiment, the semiconductor structure includes a semiconductor substrate, a collector layer formed over the semiconductor substrate, a base layer formed over the semiconductor substrate, and an emitter layer formed over the semiconductor substrate. The semiconductor substrate is formed from Gallium Arsenide (GaAs), while the base layer is formed from a Gallium Indium Nitride Arsenide Antimonide (GaInNAsSb) compound. The base layer formed from the GaInNAsSb compound has a low bandgap, but a lattice that substantially matches a lattice constant of the underlying semiconductor substrate formed from GaAs. In this manner, semiconductor devices with lower base resistances, turn-on voltages, and/or offset voltages can be formed using the semiconductor structure. | 04-25-2013 |
20130088291 | COMBINED FILTER AND TRANSCONDUCTANCE AMPLIFIER - Embodiments of circuitry, which includes an operational transconductance amplifier and a passive circuit, are disclosed. The passive circuit is coupled to the operational transconductance amplifier. Further, the passive circuit receives an input signal and the operational transconductance amplifier provides an output current, such that the passive circuit and the OTA high-pass filter and integrate the input signal to provide the output signal. | 04-11-2013 |
20130088286 | METHOD OF GENERATING MULTIPLE CURRENT SOURCES FROM A SINGLE REFERENCE RESISTOR - A differential voltage controlled current source generating one or more output currents is based upon a single external resistor. The differential voltage controlled current source may generate an output current that is proportional to a received differential voltage and a bias current with the use of a single external resistor. The technique may be used to generate multiple accurate and process independent current sources. The current sources may be a zero temperature coefficient (ZTC) current, a proportional to absolute temperature (PTAT) current, or an inversely proportional to absolute temperature (NTAT) current. The output of the current sources may be inversely proportional to the resistance of the external resistor. | 04-11-2013 |
20130083703 | TUNABLE DUPLEXER ARCHITECTURE - A tunable radio frequency (RF) duplexer and duplexing methods are disclosed. The tunable RF duplexer includes a first hybrid coupler, a second hybrid coupler, and an RF filter circuit. The first hybrid coupler is operable to split the RF transmission input signal into first and second RF quadrature hybrid transmission signals (QHTSs). The second hybrid coupler is operable to split the RF receive input signal into first and second RF quadrature hybrid receive signals (QHRSs). The RF filter circuit is operable to pass the first and second RF QHTSs to the second hybrid coupler and to reflect the first and second RF QHRSs back to the second hybrid coupler. Additionally, the second hybrid coupler is configured to combine the first and second RF QHTSs into an RF transmission output signal and to combine the first and second RF QHRSs into an RF receive output signal. | 04-04-2013 |
20130078937 | SWITCHED CAPACITOR DETUNER FOR LOW NOISE AMPLIFICATION CIRCUIT HAVING BYPASS PATH - An RF circuit is disclosed having a low-noise amplification (LNA) circuit and a bypass path that provides a bypass around the LNA circuit. In the amplification mode, the bypass path is open and the LNA circuit amplifies the receive signal in accordance within a power gain frequency response. During the amplification mode, the LNA circuit is tuned such that a power gain resonance frequency band of the power gain frequency response is within the receive frequency band. On the other hand, in the bypass mode, the bypass path is closed and the receive signal is not amplified but rather bypasses the LNA circuit. Also, during the bypass mode, the power gain frequency response of the LNA circuit is transposed to reduce or eliminate excessive insertion losses caused by the LNA circuit within the receive frequency band. | 03-28-2013 |
20130072253 | ARCHITECTURE FOR A RADIO FREQUENCY FRONT-END - An architecture for a radio frequency (RF) front-end is disclosed. The architecture for the RF front-end includes a circuit module that includes a plurality of dies partitioned on the circuit module. A plurality of filter banks with individual ones of the plurality of filter banks disposed on each of the plurality of circuit dies is also included. Further included is a plurality of switches having individual ones of the plurality of switches coupled to corresponding ones of the plurality of filter banks and in at least one embodiment a control system is configured to open and close selected ones of the plurality of switches. | 03-21-2013 |
20130064144 | ADAPTIVE BIASING TO MEET STRINGENT HARMONIC REQUIREMENTS - This disclosure relates to adaptively reducing the peak power of harmonic distortions as a function of the operating conditions for transmission communications. Specifically, the bias of the amplifier is adaptively increased to reduce harmonic distortions when a small fraction of the resource blocks are active. | 03-14-2013 |
20130063213 | MATRIX DISTRIBUTED POWER AMPLIFIER - Disclosed is a matrix distributed amplifier (DA) having an input transmission line, an intermediate transmission line, and an output transmission line. A first plurality of amplifiers has inputs coupled to and spaced along the input transmission line and has outputs coupled to and spaced along the intermediate transmission line. A second plurality of amplifiers has inputs coupled to and spaced along the intermediate transmission line and has outputs coupled to and spaced along the output transmission line. A termination amplifier has an input coupled to the input transmission line and an output coupled to the intermediate transmission line. In at least one embodiment, a second termination amplifier has an input coupled to the intermediate transmission line and an output coupled to the output transmission line. | 03-14-2013 |
20130051284 | CARRIER AGGREGATION RADIO SYSTEM - A carrier aggregation radio system is provided. The carrier aggregation radio system includes a transceiver having a main receiver, a diversity receiver and a carrier aggregation receiver. The carrier aggregation radio system further includes a control system adapted to command a radio front end to route diversity signals from a diversity antenna to the main and diversity receivers in a first mode and to command the radio front end to route carrier aggregation signals from the diversity antenna to the carrier aggregation receiver in a second mode. The control system may also command a third mode in which diversity signals are routed to the main and diversity receivers while carrier aggregation signals are routed to the carrier aggregation receiver. | 02-28-2013 |
20130043962 | DIGITAL STEP ATTENUATOR UTILIZING THERMOMETER ENCODED MULTI-BIT ATTENUATOR STAGES - A digital step attenuator with thermometer encoded attenuator stages is disclosed. In one embodiment, Embodiments disclosed in the detailed description may include a digital step attenuator, programmable thermometer encoded attenuator stages, the digital step attenuator may include a cascade of programmable thermometer encoded attenuator stages. Each stage may be provided by a programmable impedance array including a plurality of impedances arranged in parallel. The impedance of each of the plurality of each stage may change monotonically by switchably inserting or removing one of the plurality of impedances in the arrays. The control circuit may govern the attenuation level of each of the thermometer encoded accumulator stages as a function of a thermometric codeword, which controls the switches in the arrays. | 02-21-2013 |
20130043944 | CASCADED CONVERGED POWER AMPLIFIER - A first radio frequency (RF) power amplifier (PA) stage, a second RF PA stage, and an alpha RF switch are disclosed. The first RF PA stage provides a first RF output signal. During a first alpha mode, the alpha RF switch forwards the first RF output signal to the second RF PA stage, such that the first RF PA stage functions as a driver stage and the second RF PA stage functions as a final stage. However, during one of a group of alpha modes, the alpha RF switch forwards the first RF output signal to provide a corresponding one of a group of alpha transmit signals, such that the first RF PA stage functions as a final stage. Further, the first alpha mode is not one of the group of alpha modes. | 02-21-2013 |
20130043932 | CHARGE-PUMP SYSTEM FOR PROVIDING INDEPENDENT VOLTAGES - Disclosed is a charge pump system having a charge pump with a switch control input, a voltage output terminal, a high voltage terminal coupled to a high voltage node and a low voltage terminal coupled to a low voltage node. Also included is a first buck/boost switch having a first terminal coupled to the voltage output terminal, a second terminal coupled to a first output node, and a first control terminal for receiving a first control signal. A second buck/boost switch includes a first terminal coupled to the voltage output terminal, a second terminal coupled to a second output node, and a control terminal for receiving a second control signal. Further included is a switch controller that is adapted to generate the first control signal and the second control signal such that voltage pulses output from the first output node and the second output node, respectively, are asymmetrical and coincidental. | 02-21-2013 |
20130043931 | SINGLE CHARGE-PUMP BUCK-BOOST FOR PROVIDING INDEPENDENT VOLTAGES - Disclosed is a charge pump having first and second outputs and at least one capacitor. A plurality of switches are coupled to the at least one capacitor for selectively coupling the at least one capacitor between a high voltage node and a low voltage node, and for selectively coupling the at least one capacitor to the first output and the second output. A switch controller is adapted to generate control signals for the plurality of switches to selectively couple the at least one capacitor between the high voltage node and the low voltage node during charging, and to selectively couple the at least one capacitor to the first output and the second output during discharging that output a first voltage pulse from the first output and a second voltage pulse from the second output such that the first voltage pulse and the second voltage pulse are asymmetrical and coincidental. | 02-21-2013 |
20130039228 | DUPLEXER WITH ACTIVE TEMPERATURE COMPENSATION - Embodiments disclosed herein relate to programmable duplexers. The frequency pass band of the programmable duplexer is changed according to a selection of a channel-pair to control or maximize the transition band between the receiver path and the transmitter path. The programmable duplexer permits selections of desired pass bands without the need for multiple duplexer filters. | 02-14-2013 |
20130038390 | ATOMIC LAYER DEPOSITION ENCAPSULATION FOR POWER AMPLIFIERS IN RF CIRCUITS - Power amplifiers and methods of coating a protective film of alumina (Al | 02-14-2013 |
20130034139 | GROUP DELAY CALIBRATION METHOD FOR POWER AMPLIFIER ENVELOPE TRACKING - An open loop envelope tracking system calibration technique and circuitry are proposed. A radio frequency power amplifier receives a modulated signal. An envelope tracker power converter generates a modulated power amplifier supply voltage for the radio frequency power amplifier based on a control signal derived from the modulated signal. A first output power and a second output power of the radio frequency power amplifier are measured when the control signal is respectively delayed by a first delay period and a second delay period. A sensitivity of the output power of the radio frequency power amplifier is near a maximum near the first delay period and the second delay period. The first delay period and/or the second delay period are adjusted until the first output power substantially equals the second output power. The first delay period and the second delay period are used to obtain a calibrated fine tuning delay offset. | 02-07-2013 |
20130029618 | SWITCHABLE VRAMP LIMITER - Systems and devices for radio frequency (RF) power amplification are disclosed. In one embodiment, a power amplification device includes a power amplification circuit operable to amplify an RF transmission signal and a voltage regulation circuit operable to generate a regulated voltage. The regulated voltage level of the regulated voltage sets an amplification gain of the power amplification circuit. The voltage regulation circuit allows the regulated voltage level closer to the saturation voltage level when a band-select signal indicates that the RF transmission signal is being transmitted within a low transmission frequency band and is further away from the saturation voltage level when the band-select signal indicates that the RF transmission signal is being transmitted within a high transmission frequency band. This provides greater power efficiency when the RF transmission signal is being transmitted with the low transmission frequency band. | 01-31-2013 |
20130027132 | HIGH EFFICIENCY MULTIPLE POWER MODE LINEAR RADIO FREQUENCY POWER AMPLIFIER - The embodiments disclosed in the detailed description include a power amplifier having a low power mode amplifier, a medium power mode amplifier, and a high power mode amplifier in communication with a radio frequency (RF) output load. The exemplary embodiments of the power amplifier permit a wireless device to select the most power efficient means to transmit an RF signal based upon the desired output power level. | 01-31-2013 |
20130027130 | COLLECTOR BOOST - Embodiments of power amplification devices are described with a power amplification circuit that has more than one amplifier stage and with at least a first voltage regulation circuit and a second voltage regulation circuit configured that provide regulated voltages to these amplifier stages. The power amplification device includes a threshold detection circuit to get better maximum output power performance while preserving power efficiency. The threshold detection circuit is configured to increase a first voltage adjustment gain of the first voltage regulation circuit when a regulated voltage level of a second voltage regulation circuit reaches a first threshold voltage level. In this manner, the first voltage adjustment gain can be initially set to be lower than the second voltage adjustment gain until the second voltage regulation circuit is close or has railed. The first voltage adjustment gain can then be increased to allow the first voltage regulation circuit to also rail. | 01-31-2013 |
20130024142 | QUASI ISO-GAIN SUPPLY VOLTAGE FUNCTION FOR ENVELOPE TRACKING SYSTEMS - A method of defining a quasi iso-gain supply voltage function for an envelope tracking system is disclosed. The method includes a step of capturing iso-gain supply voltage values versus power values for a device under test (DUT). Other steps involve locating a minimum iso-gain supply voltage value, and then replacing the iso-gain supply voltage values with the minimum iso-gain supply voltage value for corresponding output power values that are less than an output power value corresponding to the minimum iso-gain supply voltage value. The method further includes a step of generating a look-up table (LUT) of iso-gain supply voltage values as a function of input power for the DUT after the step of replacing the iso-gain supply voltage values with the minimum iso-gain supply voltage value for corresponding output power values that are less than an output power value corresponding to the minimum iso-gain supply voltage value. | 01-24-2013 |
20130021099 | VRAMP LIMITING USING RESISTORS - Power amplification devices are described, which are configured to amplify a radio frequency (RF) transmission signal. The power amplification device includes a voltage regulation circuit and a power amplification circuit. The voltage regulation circuit includes a voltage regulator that is operable to generate a regulated voltage from the supply voltage and a feedback circuit that sets a voltage adjustment gain of the voltage regulation circuit. To help prevent the voltage regulation circuit from saturating, the feedback circuit reduces the voltage adjustment gain in response to a voltage difference reaching a threshold voltage level. The voltage difference is between a voltage regulator control signal level of a voltage regulator control signal and the regulated voltage level of the regulated voltage. This configuration can be utilized to reduce a drop-out voltage level of the voltage regulator and get better performance despite supply voltage degradation and variations in operational conditions, such as temperature. | 01-24-2013 |
20130021071 | LOW CURRENT, HIGH ACCURACY POWER-ON-RESET - The present disclosure relates generally to power-on-reset (POR) devices for activation of a circuit block powered by a battery. The POR devices activate a circuit block when a battery voltage level of a battery voltage generated by the battery is above a dead battery condition voltage level. So that the circuit block is activated after the battery voltage level of the battery voltage has reached the dead battery condition voltage level, the POR device includes a trigger circuit. The trigger circuit is operable to receive the battery voltage and is configured to generate a trigger signal in response to the battery voltage level being charged above a trigger voltage level, which is equal to or greater than the dead battery condition voltage level. The POR circuit is also operable to generate a POR signal in an activation state and activate the circuit block. | 01-24-2013 |
20130020279 | PLANARIZED SACRIFICIAL LAYER FOR MEMS FABRICATION - A method of forming a device is provided. The method includes providing a substrate, forming a sacrificial layer over the substrate, and forming a field layer around the sacrificial layer. After formation, both the sacrificial layer and the field layer are planarized. A component is then formed over the planarized sacrificial layer and the planarized field layer. The component has a first electrode and a second electrode and a single crystal wafer disposed between the first and second electrodes. The component includes anchors disposed substantially over the field layer. Once the component is formed, the sacrificial layer is released with an etchant having a selectivity for the sacrificial layer wherein a cavity is formed beneath the component. The cavity allows free movement within the cavity during operation of the device. The etchant does not release the field layer and the component so the field layer remains below the anchors. | 01-24-2013 |
20120326778 | CLOSED LOOP BIAS CONTROL - This disclosure relates to radio frequency (RF) amplification devices and methods for amplifying an RF input signal. To set the quiescent operating level of the RF output signal, a bias signal to be applied to the RF input signal is received prior to amplifying the RF input signal. The bias signal is amplified to generate the RF output signal at the quiescent operating level and a feedback signal is received that is indicative of the quiescent operating level of the RF output signal. Prior to amplifying the RF input signal, the bias signal level of the bias signal is adjusted such that the quiescent operating level is set to a reference signal level based on the feedback signal level. This allows for adjustments to be made to the quiescent operating level and maintain the quiescent operating level at a desired value. | 12-27-2012 |
20120319758 | BI-FET CASCODE POWER SWITCH - Power switch devices for high-speed applications are disclosed. The power switch device includes a depletion mode field effect transistor (D-FET), an enhancement mode field effect transistor (E-FET) and a bipolar transistor. In one embodiment, the E-FET is coupled in cascode with the D-FET such that turning off the E-FET turns off the D-FET and turning on the E-FET turns on the D-FET. Furthermore, the bipolar transistor is operably associated with the D-FET and the E-FET such that turning on the bipolar transistor drives current from the D-FET through the bipolar transistor to the E-FET to provide a charge that turns on the E-FET. The bipolar transistor provides several advantages such as a higher Schottky breakdown voltage for the E-FET and faster current switching speed for the power switch device. | 12-20-2012 |
20120313701 | PSEUDO-ENVELOPE FOLLOWER POWER MANAGEMENT SYSTEM WITH HIGH FREQUENCY RIPPLE CURRENT COMPENSATION - Embodiments disclosed in the detailed description relate to a pseudo-envelope follower power management system including a parallel amplifier and a switch mode power supply converter cooperatively coupled to generate a power supply voltage at a power supply output coupled to a linear RF power amplifier. The parallel amplifier output is in communication with the power amplifier supply output. The parallel amplifier governs operation of the switch mode power supply converter and regulates the power amplifier supply voltage base on a V | 12-13-2012 |
20120313173 | METHOD FOR ISOLATING RF FUNCTIONAL BLOCKS ON SILICON-ON-INSULATOR (SOI) SUBSTRATES - Buried implants are used to reduce RF (radio-frequency) coupling in a SOI (Silicon-on-insulator) circuit. These buried implants are located above and/or below the BOX (buried oxide) layer of the SOI circuit. These buried implants may completely enclose the PWELL (P-type well) of an NFET (N-type Field Effect Transistor). | 12-13-2012 |
20120306572 | METHOD OF POWER AMPLIFIER CALIBRATION FOR AN ENVELOPE TRACKING SYSTEM - A method for power amplifier (PA) calibration for an envelope tracking system of a wireless device is disclosed. The method involves measuring an output power of a PA that is a part under test (PUT) at a predetermined input power. Another step includes calculating a gain equal to the output power of the PA divided by the predetermined input power. A next step involves calculating a gain correction by subtracting the calculated gain from a desired gain. Other steps include determining an expected supply voltage for the PA at the desired gain using the gain correction applied to a nominal curve of gain versus PA supply voltage, and then storing the expected supply voltage for the PA versus input power in memory. | 12-06-2012 |
20120303836 | SLAVE ID CONFIGURATION - Disclosed is a method in which slaves are cascaded on a bus, and cascading slave-to-slave communication is used to prioritize (or sequence) the software slave ID programming, enabling users to uniquely identify identical components in a circuit. In one embodiment, the first slave in the cascade stalls the programming of other slaves until the first slave's programming is complete. Once completed, the first slave then enables programming of the second slave, and so on. This embodiment allows multiple placements of identical slaves on the bus, and provides a method to uniquely identify and control each slave by using cascading software slave ID programming. In another embodiment, a structure with a similar effect may be created by lack of enablement (instead of disablement), wherein initially only the first slave is enabled, and subsequent slaves are not initially enabled. Additionally, the present disclosure is compatible with the MIPI RFFE standard interface. | 11-29-2012 |
20120302186 | INDEPENDENT PA BIASING OF A DRIVER STAGE AND A FINAL STAGE - A radio frequency (RF) communications system, which includes power amplifier (PA) control circuitry and PA bias circuitry, is disclosed. The PA control circuitry identifies a selected communications mode of the RF communications system and a target output power from RF PA circuitry. The PA control circuitry selects a PA bias level of a driver stage of the RF PA circuitry and a PA bias level of a final stage of the RF PA circuitry based on the selected communications mode and the target output power. The PA bias circuitry establishes a PA bias level for the driver stage and a PA bias level for the final stage based on the selected PA bias levels of the driver stage and the final stage, respectively. | 11-29-2012 |
20120299661 | PA BIAS POWER SUPPLY UNDERSHOOT COMPENSATION - A charge pump of a power amplifier (PA) bias power supply and a process to prevent undershoot disruption of a bias power supply signal of the PA bias power supply are disclosed. The charge pump operates in one of multiple bias supply pump operating modes, which include at least a bias supply pump-up operating mode and a bias supply bypass operating mode. The process prevents selection of the bias supply pump-up operating mode from the bias supply bypass operating mode before charge pump circuitry in the charge pump is capable of providing adequate voltage to prevent undershoot disruption of the bias power supply signal. | 11-29-2012 |
20120299660 | SELECTING PA BIAS LEVELS OF RF PA CIRCUITRY DURING A MULTISLOT BURST - Power amplifier (PA) control circuitry and PA bias circuitry are disclosed. During one slot of a multislot transmit burst from radio frequency (RF) PA circuitry, the PA control circuitry selects one PA bias level of the RF PA circuitry and the RF PA circuitry has one output power level. The RF PA circuitry has a next output power level during an adjacent next slot of the multislot transmit burst. If the one output power level exceeds the next output power level by more than a power drop limit, then the PA control circuitry maintains the one PA bias level during the adjacent next slot. If the one output power level significantly exceeds the next output power level, but by less than the power drop limit, then the PA control circuitry selects a next PA bias level, which is less than the one PA bias level, during the adjacent next slot. | 11-29-2012 |
20120299647 | PA ENVELOPE POWER SUPPLY UNDERSHOOT COMPENSATION - A power amplifier (PA) envelope power supply, which provides an envelope power supply signal to radio frequency (RF) PA circuitry, and a process to prevent undershoot of the PA envelope power supply is disclosed. The process includes determining if an envelope control signal to the PA envelope power supply has a step change from a high magnitude to a low magnitude that exceeds a step change limit. Such a step change may cause undershoot of the PA envelope power supply. As such, if the step change exceeds the step change limit, the envelope control signal is modified to use an intermediate magnitude for period of time. Otherwise, if the step change does not exceed the step change limit, the envelope control signal is not modified. | 11-29-2012 |
20120299646 | SELECTING A CONVERTER OPERATING MODE OF A PA ENVELOPE POWER SUPPLY - A power amplifier (PA) envelope power supply and a process to select a converter operating mode of the PA envelope power supply are disclosed. The PA envelope power supply operates in one of a first converter operating mode and a second converter operating mode. The process for selecting the converter operating mode is based on a selected communications mode of a radio frequency (RF) communications system, a target output power from RF PA circuitry of the RF communications system, and a direct current (DC) power supply voltage. | 11-29-2012 |
20120299645 | TEMPERATURE CORRECTING AN ENVELOPE POWER SUPPLY SIGNAL FOR RF PA CIRCUITRY - A direct current (DC)-DC converter and radio frequency (RF) power amplifier (PA) circuitry are disclosed. The DC-DC converter provides an envelope power supply signal to the RF PA circuitry based on a first power supply output control signal. As a temperature of the RF PA circuitry changes, the envelope power supply signal may need to be adjusted to meet temperature compensation requirements of the RF PA circuitry. With adequate thermal coupling between the DC-DC converter and the RF PA circuitry, adjustments to the envelope power supply signal may be based on temperature measurements of the DC-DC converter. A desired correction of the first power supply output control signal is determined based on a measured temperature of the DC-DC converter and the temperature compensation requirements of the RF PA circuitry. The first power supply output control signal is adjusted based on the desired correction. | 11-29-2012 |
20120293253 | PSEUDO-ENVELOPE FOLLOWING POWER MANAGEMENT SYSTEM - Embodiments disclosed in the detailed description relate to a pseudo-envelope follower power management system used to manage the power delivered to a linear RF power amplifier. | 11-22-2012 |
20120282869 | RF PA LINEARITY REQUIREMENTS BASED CONVERTER OPERATING MODE SELECTION - A power amplifier (PA) envelope power supply, radio frequency (RF) PA circuitry, and a process to select a converter operating mode of the PA envelope power supply based on linearity requirements of the RF PA circuitry is disclosed. The PA envelope power supply operates in one of a first converter operating mode and a second converter operating mode. The process for selecting the converter operating mode is based on a required degree of linearity of the RF PA circuitry. The PA envelope power supply provides an envelope power supply signal to the RF PA circuitry. Selection of the converter operating mode may provide efficient operation of the PA envelope power supply and the envelope power supply signal needed for proper operation of the RF PA circuitry. | 11-08-2012 |
20120281597 | RADIO FRONT END AND POWER MANAGEMENT ARCHITECTURE FOR LTE-ADVANCED - A front end radio architecture (FERA) with power management is disclosed. The FERA includes a first power amplifier (PA) block having a first-first PA and a first-second PA, and a second PA block having a second-first PA and a second-second PA. First and second modulated switchers are adapted to selectively supply power to the first-first PA and the second-first PA, and to supply power to the first-second PA and the second-second PA, respectively. The first and second modulated switchers have a modulation bandwidth of at least 20 MHz and are both suitable for envelope tracking modulation. A control system is adapted to selectively enable and disable the first-first PA, first-second PA, the second-first PA, and the second-second PA. First and second switches are responsive to control signals to route carriers and received signals between first and second antennas depending upon a selectable mode of operation such as intra-band or inter-band operation. | 11-08-2012 |
20120280752 | EMBEDDED RF PA TEMPERATURE COMPENSATING BIAS TRANSISTOR - A radio frequency (RF) power amplifier (PA) amplifying transistor of an RF PA stage and an RF PA temperature compensating bias transistor of the RF PA stage are disclosed. The RF PA amplifying transistor includes a first array of amplifying transistor elements and a second array of amplifying transistor elements. The RF PA temperature compensating bias transistor provides temperature compensation of bias of the RF PA amplifying transistor. Further, the RF PA temperature compensating bias transistor is located between the first array and the second array. As such, the RF PA temperature compensating bias transistor is thermally coupled to the first array and the second array. The RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor. | 11-08-2012 |
20120280747 | FEEDBACK BASED BUCK TIMING OF A DIRECT CURRENT (DC)-DC CONVERTER - At least a first shunt switching element and switching control circuitry of a first switching power supply are disclosed. At least the first shunt switching element is coupled between a ground and an output inductance node of the first switching power supply. The first switching power supply provides a buck output signal from the output inductance node. The switching control circuitry selects one of an ON state and an OFF state of the first shunt switching element. When the buck output signal is above a first threshold, the switching control circuitry is inhibited from selecting the ON state. The first switching power supply provides a first switching power supply output signal based on the buck output signal. By using feedback based on the buck output signal, the switching control circuitry may refine the timing of switching between series switching elements and shunt switching elements to increase efficiency. | 11-08-2012 |
20120280746 | DC-DC CONVERTER SEMICONDUCTOR DIE STRUCTURE - A direct current (DC)-DC converter having a DC-DC converter semiconductor die and an alpha flying capacitive element is disclosed. The DC-DC converter semiconductor die includes a first series alpha switching element, a second series alpha switching element, a first alpha flying capacitor connection node, which is about over the second series alpha switching element, and a second alpha flying capacitor connection node, which is about over the first series alpha switching element. The alpha flying capacitive element is electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node. By locating the first alpha flying capacitor connection node and the second alpha flying capacitor connection node about over the second series alpha switching element and the first series alpha switching element, respectively, lengths of transient current paths may be minimized, thereby reducing noise and potential interference. | 11-08-2012 |
20120280738 | VARIABLE ATTENUATOR HAVING STACKED TRANSISTORS - In one embodiment, a variable attenuator is disclosed having an attenuation circuit and a control circuit. The attenuation circuit may include a first series connected attenuation circuit segment and a shunt connected attenuation circuit segment, as well as additional attenuation circuit segments. Each attenuation circuit segment includes a stack of transistors that are coupled to provide the attenuation circuit segment with a variable impedance level having a continuous impedance range. In this manner, the control circuit may be operably associated with the stack of transistors in each attenuation circuit segment to control the variable attenuation level of the variable attenuator. | 11-08-2012 |
20120274406 | LOW NOISE-LINEAR POWER DISTRIBUTED AMPLIFIER - The present disclosure describes a distributed amplifier (DA) that includes active device cells within sections that are configured to provide an input gate termination that is conducive for relatively low noise and high linearity operation. A section adjacent to an output of the DA is configured to effectively terminate the impedance of an input transmission line of the DA. Each active device cell includes transistors coupled in a cascode configuration that thermally distributes a junction temperature among the transistors. In this manner, noise generated by a common source transistor of the cascode configuration is minimized. The transistors coupled in the cascode configuration may be fabricated using gallium nitride (GaN) technology to reduce physical size of the DA and to further reduce noise. | 11-01-2012 |
20120263258 | CIRCUITS AND METHODS FOR PROVIDING A CONTROL VOLTAGE AND IMPROVING SWITCH PERFORMANCE IN RADIO FREQUENCY (RF) MODULES - An apparatus comprises at least one transmit amplifier and rectification circuitry located in the at least one transmit amplifier, which is configured to receive a RF signal and provide a rectified voltage, which is selectably added to a voltage supplied by a battery to generate a DC voltage supply signal that is a function of RF power level. A controller is configured to select between providing the VBAT or the VSupply signal to a transmit switch depending on one or more of a logic state and a mode of operation. An alternate apparatus comprises a charge pump circuit configured to quickly raise a voltage supplied to it and store the output voltage on a capacitor and then either shift a first frequency provided by a charge pump oscillator to a lower second frequency or turn off a charge pump clock to maintain a voltage on the capacitor during a transmit mode. | 10-18-2012 |
20120262828 | CLAMP BASED ESD PROTECTION CIRCUITS - An electro-static discharge (ESD) protection circuit utilizes a gate-drain breakdown characteristic of high electron mobility transistors (HEMTs) in a dual stacked configuration to provide a discharge path for electro-static discharges, while having a minimal effect on the associated circuit which is being protected. | 10-18-2012 |
20120262189 | LAMINATE VARIABLES MEASURED ELECTRICALLY - Embodiments of methods of non-destructively testing whether a laminated substrate satisfies structural requirements are disclosed herein. Additionally, laminated substrates that can be non-destructively tested are also disclosed along with methods of manufacturing the same. To non-destructively test whether the laminated substrates satisfies the structural requirement, an electrical characteristic of the laminated substrate may be detected. Since the detected electrical characteristic is related to a structural characteristic being tested, whether the structural characteristic complies with the structural requirement can be determined based on the electrical characteristic. | 10-18-2012 |
20120256702 | TUNABLE DUPLEXER METHOD USING HYBRID TRANSFORMER WITH DUAL ANTENNA - The present disclosure relates to a hybrid transformer duplexer apparatus. The hybrid transformer duplexer apparatus includes an autotransformer having a first port, a second port and a tap coupled to a first antenna port. A step-down transformer has a primary winding with a first terminal coupled to the first port of the autotransformer and a second terminal coupled to the second port of the autotransformer, and a secondary winding having a third terminal coupled to a second antenna port and a fourth terminal coupled to a common node. | 10-11-2012 |
20120243586 | PHASE SHIFTING STAGE FOR SWITCHLESS DE-MULTIPLEXING - A phase shifting stage is disclosed. The phase shifting stage includes first and second transistors. Second terminals of the first transistor and the second transistor are coupled to a first current tail node. A third transistor and a fourth transistor have second terminals that are coupled to a second current tail node. Also included is a first transformer having a primary winding with first and second inputs and a secondary winding. The first input is coupled to the first terminals of the first and third transistors, and the second input is coupled to the first terminals of the second and the fourth transistors. A common input stage having high power gain and phase commutating cascode stages in asymmetrical transformer output demultiplexing (ATODEM) branches is also provided. The common input stage limits the noise generated at an input stage by substantially canceling out the noise at an output transformer of the ATODEM. | 09-27-2012 |
20120242308 | PROTECTION SYSTEM AND METHOD FOR DC-DC CONVERTERS EXPOSED TO A STRONG MAGNETIC FIELD - A protection system and method for protecting a direct current to direct current voltage converter (DC-DC converter) from a potentially damaging excessive output current due to exposure to a relatively strong magnetic field is disclosed. The system includes a detector circuit configured to monitor a signal characteristic of the DC-DC converter, and a linear regulator having an output coupled to the load output of the DC-DC converter. The system further includes a control system configured to disable a load output of the DC-DC converter and enable the output of the linear regulator when the detector detects that the signal characteristic has moved outside a predetermined threshold range. Moreover, the control system is further configured to disable the output of the linear regulator after a predetermined time period, and enable the load output of the DC-DC converter after the predetermined time period. | 09-27-2012 |
20120238230 | RF SYSTEM FOR REDUCING INTERMODULATION (IM) PRODUCTS - An RF system for reducing intermodulation (IM) products is disclosed. The RF system includes a first nonlinear element and a second nonlinear element, wherein the second nonlinear element generates inherent IM products and the first nonlinear element is adapted to generate compensating IM products. Alternatively, the first nonlinear element generates inherent IM products and the second nonlinear element is adapted to generate compensating IM products. The amplitudes of the compensating IM products are substantially equal to amplitudes of the inherent IM products. The RF system further includes a phase shifter that is adapted to provide a phase shift that results in around 180° of phase shift between the inherent IM products and the compensating IM products. The phase shifter is coupled between the first nonlinear element and the second nonlinear element. | 09-20-2012 |
20120235750 | AMPLIFICATION DEVICE HAVING COMPENSATION FOR A LOCAL THERMAL MEMORY EFFECT - In one embodiment, an amplification device has a temperature differential sensing circuit that reduces a local thermal memory effect. The amplification device may include an amplification circuit and biasing circuitry. The amplification device is operable to receive an input signal and generate and amplified output signal. The biasing circuitry generates a biasing signal that sets the quiescent operating level of the amplified output signal. The temperature differential sensing circuit provides a bias level adjustment signal that adjusts the biasing signal to maintain the quiescent operating level of the amplified output signal at a desired level. | 09-20-2012 |
20120235736 | CHARGE PUMP BASED POWER AMPLIFIER ENVELOPE POWER SUPPLY AND BIAS POWER SUPPLY - The present disclosure relates to a direct current (DC)-DC converter, which includes a charge pump based radio frequency (RF) power amplifier (PA) envelope power supply and a charge pump based PA bias power supply. The DC-DC converter is coupled between RF PA circuitry and a DC power supply, such as a battery. As such, the PA envelope power supply provides an envelope power supply signal to the RF PA circuitry and the PA bias power supply provides a bias power supply signal to the RF PA circuitry. Both the PA envelope power supply and the PA bias power supply receive power via a DC power supply signal from the DC power supply. The PA envelope power supply includes a charge pump buck converter and the PA bias power supply includes a charge pump. | 09-20-2012 |
20120229210 | OVERLAY CLASS F CHOKE - Embodiments of the present disclosure relate to an overlay class F choke of a radio frequency (RF) power amplifier (PA) stage and an RF PA amplifying transistor of the RF PA stage. The overlay class F choke includes a pair of mutually coupled class F inductive elements, which are coupled in series between a PA envelope power supply and a collector of the RF PA amplifying transistor. In one embodiment of the RF PA stage, the RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor. The collector of the RF PA amplifying transistor provides the RF stage output signal. The PA envelope power supply provides an envelope power supply signal to the overlay class F choke. The envelope power supply signal provides power for amplification. | 09-13-2012 |
20120223774 | LOOK-UP TABLE BASED CONFIGURATION OF MULTI-MODE MULTI-BAND RADIO FREQUENCY POWER AMPLIFIER CIRCUITRY - Circuitry, which includes multi-mode multi-band radio frequency (RF) power amplification circuitry, power amplifier (PA) control circuitry, and a PA-digital communications interface (DCI) is disclosed according to one embodiment of the circuitry. The PA control circuitry is coupled between the amplification circuitry and the PA-DCI, which is coupled to a digital communications bus, and configures the amplification circuitry. The amplification circuitry includes at least a first RF input and multiple RF outputs, such that at least some of the RF outputs are associated with multiple communications modes and at least some of the RF outputs are associated with multiple frequency bands. Configuration of the amplification circuitry associates one RF input with one RF output, and is correlated with configuration information defined by at least a first defined parameter set. The PA control circuitry stores at least a first look-up table (LUT), which provides the configuration information. | 09-06-2012 |
20120223773 | LINEAR MODE AND NON-LINEAR MODE QUADRATURE PA CIRCUITRY - Embodiments of the present disclosure relate to multi-mode multi-band radio frequency (RF) power amplifier (PA) circuitry, which includes a multi-mode multi-band quadrature RF PA coupled to multi-mode multi-band switching circuitry via a single output. The switching circuitry provides at least one non-linear mode output and multiple linear mode outputs. The non-linear mode output may be associated with at least one non-linear mode RF communications band and each linear mode output may be associated with a corresponding linear mode RF communications band. The outputs from the switching circuitry may be coupled to an antenna port via front-end aggregation circuitry. The quadrature nature of the quadrature PA path may provide tolerance for changes in antenna loading conditions. | 09-06-2012 |
20120218729 | MICROSHIELD ON STANDARD QFN PACKAGE - Shielded electronic packages may have metallic lead frames to connect an electromagnetic shield to ground. In one embodiment, a metallic lead frame of the electronic package and a surface of the metallic lead frame defines a component area for attaching an electronic component. The metallic lead frame includes a metallic structure associated with the component area that may have a grounding element for connecting to ground and one or more signal connection elements, such as signal leads, for transmitting input and output signals. The electromagnetic shield connects to the metallic lead frame to safely connect to ground while maintaining the signal connection elements isolated from the shield. | 08-30-2012 |
20120218047 | VERTICAL BALLAST TECHNOLOGY FOR POWER HBT DEVICE - Power amplification devices are disclosed having a vertical ballast configuration to prevent thermal runaway in at least one stack of bipolar transistors formed on a semiconductor substrate. To provide a negative feedback to prevent thermal runaway in the bipolar transistors, a conductive layer is formed over and coupled to the stack. A resistivity of the conductive layer provides an effective resistance that prevents thermal runaway in the bipolar transistors. The vertical placement of the conductive layer allows for vertical heat dissipation and thus provides ballasting without concentrating heat. | 08-30-2012 |
20120218032 | HIGH EFFICIENCY NEGATIVE REGULATED CHARGE-PUMP - A charge-pump circuit for providing a regulated negative voltage is disclosed. The charge-pump circuit includes at least one flying capacitor stage having a capacitor with a first terminal selectively coupled between a negative voltage input through a first electronic switch and a negative voltage output through a second electronic switch. A second terminal of the capacitor is selectively coupled between a fixed voltage node through a third electronic switch and an error signal input through a fourth electronic switch. A positive voltage source is coupled to the negative voltage output through a feedback network. A feedback amplifier having an error signal output, a reference voltage input, and a feedback input is coupled to the feedback network. A switch controller having a first clock output drives the first electronic switch and the third electronic switch, while a second clock output drives the second electronic switch and the fourth electronic switch. | 08-30-2012 |
20120218026 | METHOD OF GENERATING MULTIPLE CURRENT SOURCES FROM A SINGLE REFERENCE RESISTOR - A differential voltage controlled current source generating one or more output currents is based upon a single external resistor. The differential voltage controlled current source may generate an output current that is proportional to a received differential voltage and a bias current with the use of a single external resistor. The technique may be used to generate multiple accurate and process independent current sources. The current sources may be a zero temperature coefficient (ZTC) current, a proportional to absolute temperature (PTAT) current, or an inversely proportional to absolute temperature (NTAT) current. The output of the current sources may be inversely proportional to the resistance of the external resistor. | 08-30-2012 |
20120217624 | CONNECTION USING CONDUCTIVE VIAS - In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a conductive vertical interconnect access structure (vias) associated with each component area to be shielded is then exposed through the body by a cutting, drilling, or similar operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed conductive vias. | 08-30-2012 |
20120217048 | ELECTRONIC MODULES HAVING GROUNDED ELECTROMAGNETIC SHIELDS - In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a portion of the metallic structure for each component area to be shielded is then exposed through the body by a cutting, drilling, or like operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed portion of the metallic structures. | 08-30-2012 |
20120212293 | BOOST CHARGE-PUMP WITH FRACTIONAL RATIO AND OFFSET LOOP FOR SUPPLY MODULATION - Embodiments disclosed in the detailed description relate to a pseudo-envelope follower power management system for managing the power delivered to a linear RF power amplifier. The pseudo-envelope follower power management system may include a switch mode power supply converter and a parallel amplifier cooperatively coupled to provide a linear RF power amplifier supply to the linear RF power amplifier. The pseudo-envelope follower power management system may include a charge pump configured to power the parallel amplifier. The charge pump may generate a plurality of output voltage levels. The charge pump may be either a boost charge pump or a boost/buck charge pump. The pseudo-envelope follower power management system may include an offset voltage control circuit configured to provide feedback to the switch mode power supply converter to regulate an offset voltage developed across a coupling device that couples the output of the parallel amplifier to the linear RF power amplifier supply. | 08-23-2012 |
20120212292 | MODIFIED DYNAMIC LOAD SCALING (MDLS) TECHNIQUE FOR IMPLEMENTING HIGH EFFICIENCY LOW POWER MODE OPERATION - A power amplification circuit having three modes of operation and a single switch is disclosed. Only one switch is used to control three different load impedance levels, one load impedance level for each mode of operation. The remaining “switching” results from selectively biasing each power amplification path by turning ON or OFF amplifiers. A series L-C and a switch are used to control the load impedance. Additional modes of operation may also be created without requiring any additional switch. Further, multiple modes of operation may be implemented using no switches. | 08-23-2012 |
20120207252 | FREQUENCY CORRECTION OF A PROGRAMMABLE FREQUENCY OSCILLATOR BY PROPAGATION DELAY COMPENSATION - A first programmable frequency oscillator, which includes a first ramp comparator and programmable signal generation circuitry is disclosed. The programmable signal generation circuitry provides a ramping signal, which has a first frequency, based on a desired first frequency. The first ramp comparator receives the ramping signal and provides a first ramp comparator output signal based on the ramping signal. The first ramp comparator output signal is fed back to the programmable signal generation circuitry, such that the ramping signal is based on the desired first frequency and the first ramp comparator output signal. However, the first ramp comparator has a first propagation delay, which introduces a frequency error into the programmable frequency oscillator. Therefore, the first frequency is not proportional to one or more slopes of the ramping signal. As a result, the programmable signal generation circuitry compensates for the frequency error based on the desired first frequency. | 08-16-2012 |
20120206285 | HALF-BANDWIDTH BASED QUADRATURE ANALOG-TO-DIGITAL CONVERTER - A half-bandwidth based quadrature analog-to-digital converter (ADC), which includes in-phase circuitry, quadrature-phase circuitry, and digital complex processing circuitry is disclosed. The in-phase circuitry includes an in-phase pair of ADCs, which provide an in-phase pair of sub-quadrature output signals, based on an analog in-phase input signal. Similarly, the quadrature-phase circuitry includes a quadrature-phase pair of ADCs, which provide a quadrature-phase pair of sub-quadrature output signals based on an analog quadrature-phase input signal. The digital complex processing circuitry combines, filters, and restructures the in-phase pair of sub-quadrature output signals and the quadrature-phase pair of sub-quadrature output signals to provide a digital in-phase output signal and a digital quadrature-phase output signal. Each of the in-phase pair of ADCs has about an ADC bandwidth. The in-phase circuitry has an input bandwidth, which is about equal to two times the ADC bandwidth in one embodiment of the in-phase circuitry. | 08-16-2012 |
20120201258 | ASYMMETRICAL TRANSFORMER OUTPUT DEMULTIPLEXING (ATODEM) CIRCUIT - An asymmetrical transformer output demultiplexing (ATODEM) circuit is disclosed. The ATODEM circuit of the present disclosure includes N input windings, wherein N is a natural number. Each of the N input windings have input terminals that couple to output terminals of N PAs. The ATODEM further includes M output ports wherein M is a natural number, each of the M output ports having N series coupled windings coupled between a load terminal and a return terminal. The physical attributes of the N input windings, and the N series coupled windings of the M output ports are asymmetrical such that in an Nth operation mode an Nth PA first-load line impedance matches an output impedance of an Nth PA coupled to the input terminals. | 08-09-2012 |
20120201172 | FEMTOCELL TUNABLE RECEIVER FILTERING SYSTEM - A tunable receiver system uses programmable notch filters to identify available channel pairs for transmitting and receiving data via a femtocell base station. In addition, one of the programmable notch filters may be used to suppress infiltration of the transmit path signal into the receiver path of the receiver device. The other programmable notch filter may be used to suppress a blocker signal identified by the receiver device. | 08-09-2012 |
20120200473 | HARMONIC REJECTED ANTENNA SWITCH - The exemplary embodiments include a radio frequency antenna switch configured to reject harmonic frequencies. In addition, the harmonic-rejected radio frequencies of the radio frequency antenna switch may be tuned by use of a capacitor array. The capacitor array may be configured with fuse elements or by control logic. | 08-09-2012 |
20120200435 | APPARATUSES AND METHODS FOR RATE CONVERSION AND FRACTIONAL DELAY CALCULATION USING A COEFFICIENT LOOK UP TABLE - A system and method for performing sample rate conversion and creating fractional delays to a signal is disclosed. The system comprises a filter, a look up table for storing coefficients for sample rate conversion and fractional delays, and control circuitry configured to use an indexing scheme to select one or more coefficients from the look up table for rate conversion and fractional delays. The coefficients stored in the look up table comprise the coefficients required to generate delays in desired increments of a sample rate. In the disclosed method, the one or more coefficients necessary for a desired sample rate and fractional delay are selected from a single look up table and provided to a filter to delay the signal based upon the input sample rate. | 08-09-2012 |