NATIONAL CHANGHUA UNIVERSITY OF EDUCATION Patent applications |
Patent application number | Title | Published |
20140111269 | THROUGH-SILICON VIA SELF-ROUTING CIRCUIT AND ROUTING METHOD THEREOF - A through-silicon via self-routing circuit includes a plurality of through-silicon vias (TSVs) and a plurality of planar die. The plurality of planar die are connected by the plurality of TSVs. And each one of the plurality of planar die includes a built-in self-tester, a built-in self-routing switching network, and a core circuit. The built-in self-tester has a plurality of valid-bit leads and a plurality of through-silicon via leads to connect the plurality of TSVs. The built-in self-routing switching network is connected to the built-in self-tester, for selecting from the plurality of TSVs for conducting. The core circuit has a to plurality of I/O leads linked to the built-in self-routing switching network. | 04-24-2014 |
20130050821 | Reflective Three-Dimensional Display Device and Method for Manufacturing the Same - A reflective 3D display device and manufacturing method thereof This method includes following steps: providing a template with at least one concave parts-trap and at least one metallic microsphere, and tilting the template to form a first included angle, between the concave parts-trap and a horizontal plane, in a first direction, and a second included angle, between the concave parts-trap and the horizontal, in a second direction. When the metallic microspheres are disposed in the concave parts-trap, the metallic microspheres would self-organize to intrinsic potential minima, and then an adhesive layer and a gel are provided for removing which and fixing the relative positions between which respectively. A portion of each metallic microsphere is exposed form the gel, which is used to reflect light to 3D space, such that 3D images viewable with naked eye are achieved and the perspective phenomenon occurring in 3D images is reduced. | 02-28-2013 |
20130042968 | Method for Auxiliary-Assembling Micro-Components through Liquid Medium - A method for auxiliary assembling micro-components though liquid medium. This method includes following steps: providing a substrate, an adhesive layer, at least one micro-component and a liquid medium, wherein the adhesive layer is on the substrate and the micro-component and the liquid medium are on the adhesive layer. The adhesive is used for adhering one side of the micro-component and another side of the micro-components is disposed with is disposed with the liquid medium. Then, the another side of the micro-component which is disposed with the liquid medium touches a target area, and the substrate moves toward the target zone at a speed that is smaller than 90 μm/s for placing the micro-component on the target zone or moves away from the target zone at a speed greater than 4370 μm/s for picking up the micro-component from the target zone. | 02-21-2013 |
20120319882 | ANALOG-TO-DIGITAL CONVERTER (ADC) AND COMPARATOR UNIT THEREOF - An ADC with comparing circuit units is provided. Each comparing circuit unit comprises a first resistor, a second resistor, and a CMOS. The first and second resistors provide first and second level voltages, respectively. The base of the PMOS is electrically connected to the power source and the base of the NMOS is connected to the source of the NMOS. The signal input port is located at the gate of the CMOS and receives an analog signal. The first level port of the CMOS is located at the source of the NMOS and receives the first level voltage. The second level port of the CMOS is located at the source of the PMOS and receives the second level voltage. The signal output port of the CMOS is located at the drain and outputs a digital signal. | 12-20-2012 |
20120266016 | MEMORY ADDRESS REMAPPING ARCHITECTURE AND REPAIRING METHOD THEREOF - A memory address remapping architecture is applied to execute an address remapping method for repairing a main memory. A valid flag and an essential flag in a TCAM corresponding to at least one subcube address in a spare memory are initialized, and the main memory is checked to find out some faulty cell addresses. The Hamming distance between the subcube address and the faulty cell address is calculated, and the faulty cell address is merged into the subcube address by a masked bits concentrator when the Hamming distance is not larger than an address-width degree of the subcube address and the merged number of the subcube address is not larger than a threshold value. | 10-18-2012 |
20120094379 | HUMAN ENDOMETRIOSIS CELL - The present invention discloses a human endometriosis cell, EM 257, which has been stored in the food industry research and development institute. Results obtained from a flow cytometry reveal that the human endometriosis cell of the present invention is positive for the mesnchymal stem cell surface antigens, such as CD44, CD73, CD105 and CD146. In different differentiation conditions, the human endometriosis cell of the present invention can be differentiated into osteogenic or adipogenic lineage cells. | 04-19-2012 |
20110263008 | Cell Culture Real-Time Observation System - The present invention discloses a cell culture realtime observation system comprising a plate, a culture well, an image capture device, at least one container, an evaporation device, a first micro channel, a second micro channel and a transmission unit. The culture well is disposed on the plate, and the image capture device is disposed between the plate and the culture well. The container is disposed on the plate and at a side of the culture well, and the evaporation device is disposed at the other side of the culture well. The container and the culture well are connected by the first micro channel, and the culture well and the evaporation device are connected by the second micro channel. The transmission unit is electrically connected to the image capture device. | 10-27-2011 |
20110182312 | LASER DIODE USING ASYMMETRIC QUANTUM WELLS - A laser diode using asymmetric quantum wells includes a N-type semiconductor, a P-type semiconductor, a first quantum well structure, and a second quantum well structure. The first quantum well structure is between the N-type semiconductor and the P-type semiconductor, and includes at least one first quantum well having a first thickness. The second quantum well structure is between the N-type semiconductor and the P-type semiconductor, and includes at least one second quantum well having a second thickness greater than the first thickness of the first quantum well and a lasing wavelength greater than that of the first quantum well. The second quantum well is formed with a spike therein. | 07-28-2011 |
20110148605 | Magnitude Comparator, Magnitude Comparator Based Content Addressable Memory Cell, and Non-equal Bin Width Histogrammer - A magnitude comparator for comparing magnitude of a first data and a second data is disclosed. The first data and the second data are both binary data. The magnitude comparator includes many non-least comparator cells and a P-channel transistor. Each of the non-least comparator cells includes a first transistor, a second transistor, a third transistor and a fourth transistor. The drain of the second transistor is electrically connected to the source of the first transistor, and the source of the second transistor is electrically connected to a ground terminal. The third transistor electrically connects the first transistor, and the fourth transistor electrically connects the first transistor and the third transistor. The source of the P-channel transistor electrically connects a supply terminal, the gate of the P-channel transistor electrically connects the ground terminal, and the drain of the P-channel transistor electrically connects the third transistor of the first comparator cell. | 06-23-2011 |
20100179053 | METAL OXIDE NANOTUBE-SUPPORTED GOLD CATALYST AND PREPARING METHOD THEREOF - A metal oxide nanotube-supported gold catalyst and a preparing method thereof are disclosed. The metal oxide nanotube-supported gold catalyst includes a metal oxide support and a plurality of gold particles loaded into the metal oxide support, and there are at least two gold species with different oxidation states are loaded into the metal oxide support. The preparing method of the metal oxide nanotube-supported gold catalyst includes the deposition of the gold particles on the surface of the metal oxide nanotubes by using an ion exchange reaction. | 07-15-2010 |
20100095192 | BERGER INVERT CODE ENCODING AND DECODING METHOD - A Berger invert code encoding and decoding method is disclosed. The method includes steps: Selecting logic value 0 or 1 to represent the stable and unstable states respectively. Calculating the stable bit count and the unstable-bit count of the codeword. Checking whether the unstable bit count is larger than the stable bit count or not. Setting the Invert Bit to the unstable state for indicating the inversion when the unstable bit count is larger than the stable bit count. Resetting the Invert Bit to the stable state for indicating the non-inversion when the unstable bit count is not larger than the stable bit count. Concatenating the Invert Bit to the codeword as a new codeword. | 04-15-2010 |
20080275679 | Non-Linear Transient Analysis Module and Method for Phase Locked Loop - A non-linear transient analysis module and method for phase locked loop (PLL) is disclosed. The method includes a pulse cycle defined by the larger period of two input frequencies; a pulse width defined by the accumulation value of period difference. Each pulse cycle is divided into two linear regions, a first voltage at the beginning of the pulse cycle as an initial value then applying a first linear equation to obtain a second voltage, and then the second voltage as an initial value then applying a second linear equation to obtain a third voltage which is used to be an initial value for next pulse cycle. An average voltage of the first region and the second region is inputted into the VCO to generate an output as the PFD input. The aforementioned steps are repeated to complete a simulation of PLL transient response. | 11-06-2008 |