MOSEL VITELIC INC. Patent applications |
Patent application number | Title | Published |
20150037968 | METHOD FOR FORMING SHIELDED GATE OF MOSFET - A method for forming a shielded gate of a MOSFET includes steps as following: providing a semiconductor substrate having at least one trench, forming a bottom gate oxide region and a shielded gate poly region in the trench of the semiconductor substrate, forming an inter-poly oxide region on the shielded gate poly region through high temperature plasma deposition, poly etching back and oxide etching back; and forming a gate oxide region and a gate poly region on the inter-poly oxide region. By utilizing the etching back processes in replace of traditional chemical mechanical polishing processes, the manufacturing cost of manufacturing a shielded gate structure is reduced, and the total cost of manufacturing a FET is also reduced. Meanwhile, the gate charge is effectively reduced due to the shielded gate structure, so that the performance of a MOSFET is enhanced. | 02-05-2015 |
20140329364 | MANUFACTURING METHOD OF POWER SEMICONDUCTOR - A manufacturing method of a power semiconductor includes steps of providing a first semiconductor substrate and a second semiconductor substrate, forming a metal oxide semiconductor layer on a first surface of the first semiconductor substrate, grinding a second surface of the first semiconductor substrate, forming a N-type buffer layer and a P-type injection layer on a third surface of the second semiconductor substrate through ion implanting, grinding a fourth surface of the second semiconductor substrate, and combining the second surface of the first semiconductor substrate with the third surface of the second semiconductor substrate for forming a third semiconductor substrate. As a result, the present invention achieves the advantages of enhancing the process flexibility and un-limiting the characteristics of the power semiconductor. | 11-06-2014 |
20140327118 | POWER SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF - A method of fabricating a power semiconductor device includes the following steps. Firstly, a substrate is provided. A first epitaxial layer is formed over the substrate. A first trench is formed in the first epitaxial layer. A second epitaxial layer is refilled into the first trench. The first epitaxial layer and the second epitaxial layer are collaboratively defined as a first semiconductor layer. A third epitaxial layer is formed over the substrate, and a second trench is formed in the third epitaxial layer. A first doping region is formed in a sidewall of the second trench. An insulation layer is refilled into the second trench. The insulation layer, the first doping region and the third epitaxial layer are collaboratively defined as a second semiconductor layer. The power semiconductor device fabricated by the fabricating method can withstand high voltage and has low on-resistance. | 11-06-2014 |
20100163104 | SOLAR CELL - A solar cell includes a semiconductor substrate, an emitter layer, an anti-reflective coating, a first electrode, a second electrode, and a first light conversion layer. The emitter layer is formed on a light-receiving side of the semiconductor substrate. A p-n junction is formed between the emitter layer and the semiconductor substrate. The anti-reflective coating is formed on the emitter layer. The first electrode is connected to the emitter layer. The second electrode is formed on a back-lighted side of the semiconductor substrate. The first light conversion layer is formed on the anti-reflective coating. The first light conversion layer absorbs a first light with a first wavelength and emits a second light with a second wavelength, thereby performing a photoelectric converting operation. | 07-01-2010 |
20100015750 | Process of manufacturing solar cell - A process of manufacturing a solar cell is disclosed. The process comprises steps of (a) providing a semiconductor substrate, (b) forming a dielectric layer with amorphous silicon structure on the semiconductor substrate, (c) partially removing the dielectric layer with amorphous silicon structure to expose parts of the semiconductor substrate, (d) simultaneously forming a heavily doped region on a surface of the exposed semiconductor substrate and a lightly doped region on a surface of the unexposed semiconductor substrate using the dielectric layer with amorphous silicon structure as a translucent barrier layer, (e) removing the dielectric layer with amorphous silicon structure, (f) forming an anti-reflection coating on the semiconductor substrate, and (g) forming a first electrode on the anti-reflection coating and coupled with the heavily doped region. | 01-21-2010 |
20090263928 | METHOD FOR MAKING A SELECTIVE EMITTER OF A SOLAR CELL - A method for manufacturing a selective emitter of a solar cell is provided. The method includes steps of providing a substrate; forming an emitter layer on the substrate, wherein the emitter layer has a heavily doped portion located on a top thereof and a relatively lightly doped portion located at a bottom thereof; forming a patterned mask layer on the emitter layer; and performing a wet etching for exposing a region of the relatively lightly doped portion which is not covered by the patterned mask layer. | 10-22-2009 |
20090056807 | Solar cell and fabricating process thereof - A solar cell includes a semiconductor substrate, an emitter layer, at least one emitter contact region and at least one first electrode. The emitter layer is formed on at least one surface of the semiconductor substrate. A p-n junction is formed between the emitter layer and the semiconductor substrate. The emitter contact region is formed on portions of the emitter layer and has the same type of dopant as the emitter layer. The emitter contact region has a higher dopant concentration than the emitter layer. The first electrode is coupled with the emitter contact region. | 03-05-2009 |
20080302412 | PHOTOVOLTAIC POWER DEVICE AND MANUFACTURING METHOD THEREOF - A photovoltaic power device is provided. The photovoltaic power device includes a donor substrate, a first emitting substrate; a second emitting substrate, a first anti-reflection layer, a first metal electrode, a second metal electrode and a second anti-reflection layer. In the photovoltaic power device, the first and the second emitting substrate are disposed in the opposite sides of the donor substrate to generate two electronic flows, and the first metal electrode is insulated from the second metal electrode by the second anti-reflection layer. | 12-11-2008 |
20080280430 | METHOD OF FORMING FILMS IN A TRENCH - A method of forming films in a trench is applied to the manufacturing process of a power MOS device. In one embodiment, the method comprises providing a semiconductor substrate, forming a trench in the semiconductor substrate, forming a first dielectric layer on sidewalls of the trench, forming a second dielectric layer on the first dielectric layer, and forming a polysilicon layer in the trench. The method of forming films in a trench of the present invention can reduce or eliminate the thermal stress resulting from the different thermal expansion coefficients of different material layers after high temperature process. | 11-13-2008 |