INTERSIL AMERICAS LLC Patent applications |
Patent application number | Title | Published |
20160061866 | REMOTE DIFFERENTIAL VOLTAGE SENSING - A remote differential voltage sensing circuit having a voltage input (Vin) and a voltage output (Vout), comprises a dual differential input stage including a common-source or common-collector differential input stage in parallel with a common-gate or common-base differential input stage. The common-source or collector differential input stage has differential inputs, one coupled to the voltage input (Vin) and the other coupled to the voltage output (Vout). The common-gate or common-base differential input stage has differential inputs, one coupled to a local ground (Agnd) and the other coupled to a remote ground (Rgnd). An output stage is driven by an output of the dual differential input stage and produces an output voltage at the voltage output (Vout). A compensation network is coupled between the voltage output (Vout) and the output of the dual differential input stage. | 03-03-2016 |
20150378013 | OPTICAL PROXIMITY SENSORS WITH RECONFIGURABLE PHOTODIODE ARRAY - Optical proximity sensors, methods for use therewith, and systems including optical proximity sensor are described herein. Such an optical proximity sensor includes a light source and a light detector, wherein the light detector includes a plurality of individually selectable photodiodes (PDs). During a calibration mode, individual PDs of the plurality of PDs of the light detector are tested to identify which PDs are crosstalk dominated. During an operation mode, the PDs of the light detector that were not identified as being crosstalk dominated are used to produce a light detection value or signal that is useful for detecting the presence, proximity and/or motion of an object within the sense region of the optical proximity sensor. By not using the PDs that were identified as being crosstalk dominated, the signal-to-noise ratio of the light detection value or signal is improved compared to if the crosstalk dominated PDs were also used. | 12-31-2015 |
20150372613 | VOLTAGE CONVERTERS AND METHODS FOR USE THEREWITH - A voltage error signal V | 12-24-2015 |
20150362594 | SYSTEMS AND METHODS FOR OPTICAL PROXIMITY DETECTION WITH MULTIPLE FIELD OF VIEWS - An optical proximity detector includes a plurality photodetectors (PDs) and a winner-take-all (WTA) circuit. Each of the PDs has a respective field of view (FOV) and produces a respective analog current detection signal indicative of light incident on and detected by the PD. In an embodiment, the WTA circuit includes a comparator and a multiplexor (MUX). The comparator compares the analog current detection signals produced by the PDs and produces a selection signal in dependence thereon. The MUX receives the analog current detection signals produced by the PDs and outputs one of the analog current detection signals in dependence on the selection signal produced by the comparator. Circuitry, which is shared by the PDs, produces a digital detection signal corresponding to the one of the analog current detection signals output by the MUX. Such design can be used to reduce power consumption, size and cost of an optical proximity detector. | 12-17-2015 |
20150067358 | INJECTION LOCKED PHASING FOR A PEAK-VALLEY MULTIPHASE REGULATOR - A system and method capable of injection locking the phases of a peak-valley multiphase regulator includes comparing an output voltage error signal with a ramp control signal and providing a corresponding slope reset signal, using transitions of the slope reset signal to develop a equally spaced high side ramp signals and equally spaced low side ramp signals, and injecting a corresponding one of the high side signals and a corresponding one of the low side ramp signals into each of the phases which correspondingly develop equally spaced pulse control signals for multiphase operation. Such injection locking allows the additional phases to operate out of phase with the first phase and allows operation at high duty cycles. | 03-05-2015 |
20150061632 | SYSTEM AND METHOD OF EQUIVALENT SERIES INDUCTANCE CANCELLATION - An equivalent series inductance (ESL) cancel circuit for a regulator for adjusting a feedback voltage by attenuating a magnitude of a square wave ripple voltage developed on an output voltage. The regulator includes an output inductor and an output capacitor, in which the capacitor has an ESL which forms an inductive voltage divider with the output inductor causing the square wave voltage ripple. The ESL cancel circuit may include first and second current sources and a resistor device coupled between the output node and an adjust node which is further coupled to a feedback input of the regulator. The first current source applies a current proportional to the output voltage to the adjust node. The second current source selectively applies a current proportional to the input voltage of the regulator based on a state of the pulse control signal. | 03-05-2015 |
20150061626 | SMOOTH TRANSITION OF A POWER SUPPLY FROM A FIRST MODE, SUCH AS A PULSE-FREQUENCY-MODULATION (PFM) MODE, TO A SECOND MODE, SUCH AS A PULSE-WIDTH-MODULATION (PWM) MODE - In an embodiment, an apparatus, such as a power-supply controller, includes a generator and an adjuster. The generator is configured to provide a switching signal that causes a power supply to generate a regulated output signal, and the adjuster is configured to impart a condition to the power supply while the power supply is operating in a first mode, the condition being approximately equal to a condition that the power supply would have if the power supply were operating in a second mode. For example, such an apparatus may be able to reduce or eliminate a transient on a regulated output signal (e.g., a regulated output voltage) when a power supply transitions from a first operating mode, such as a pulse-frequency-modulation (PFM) mode, to a second operating mode, such as a pulse-width-modulation (PWM) mode. | 03-05-2015 |
20150061624 | PWM/PFM CONTROLLER FOR USE WITH SWITCHED-MODE POWER SUPPLY - A controller, for use with an SMPS DC-DC converter, includes a PWM/PFM generator and a switch driver. The PWM/PFM generator simultaneously generates CTRL | 03-05-2015 |
20150022921 | SEMICONDUCTOR STRUCTURE FOR ENHANCED ESD PROTECTION - A semiconductor structure for enhanced ESD protection is disclosed. The semiconductor structure includes a plurality of fingers, wherein each finger of the plurality of fingers includes a plurality of voltage clamps, and each voltage clamp of the plurality of voltage clamps includes at least a first well having a first conductivity type and a second well having a second conductivity type, and a connection between a well tie of the first well of a first voltage clamp of the plurality of voltage clamps and a well tie of the first well of a second voltage clamp of the plurality of voltage clamps, wherein the connection is enabled to couple a bias voltage associated with a current flow in the first voltage clamp to the second voltage clamp, and the first voltage clamp and the second voltage clamp are thereby enabled to trigger on substantially simultaneously. | 01-22-2015 |
20140333270 | Current Ramping During Multiphase Current Regulation - Voltage regulators in a current share arrangement may provide a total current to a common load, and may be simultaneously turned on to ramp up member currents. Each voltage regulator may provide a respective member current in the current share configuration. A target current value may be determined from a cycle-averaged current value of the member currents and a voltage error value of the voltage regulator, and each member current may be ramped to the target current value instead of the cycle-averaged current value when the voltage regulators are turned on, resulting in more stable and balanced current ramping. A predictive multi-phase digital controller may therefore operate according to a target current determined based on a measured or inferred inductor current and an error voltage. Pulse-width, pulse position and pulse frequency (adding or skipping pulses) may be calculated according to the operation of the predictive multi-phase digital controller. | 11-13-2014 |
20140269904 | VC-2 DECODING USING PARALLEL DECODING PATHS - Methods, devices and systems that perform VC-2 decoding are disclosed. In an embodiment, a VC-2 decoder includes three parallel data paths including top-band, current-band and bottom-band data paths. The top-band data path performs variable length decoding (VLD), inverse-quantization (IQ) and inverse-DC-prediction (IDCP) processing of a top compressed data-band. The current-band data path performs VLD, IQ and IDCP processing of a current compressed data-band. The bottom-band data path performs VLD, IQ and IDCP processing of a bottom compressed data-band. Additionally, the decoder includes a three-level inverse discrete wavelet transform (IDWT) module to perform IDWT processing to synthesize decoded source pixel values in dependence on partially-decompressed top, current and bottom data-bands produced using the three parallel data paths. The decoder also includes a slice-bytes equalizer, a bit-stream first-in-first-out (FIFO), a scan conversion FIFO, and a module that inserts horizontal and vertical blanking periods into data received from the scan conversion FIFO. | 09-18-2014 |
20140266141 | DIGITAL VOLTAGE COMPENSATION FOR POWER SUPPLY INTEGRATED CIRCUITS - Systems and methods for digital voltage compensation in a power supply integrated circuit are provided. In at least one embodiment, a method comprises receiving a digital voltage code, the digital voltage code corresponding to an output voltage value; setting an output count on a first counter to change from a present first digital count corresponding to a present voltage code value toward a target first digital count corresponding to a new voltage code value; and setting a second count to an offset count value on a second counter when the new voltage code value is received. The method also comprises combining the second count with the output count to form a combined count value; and decrementing the second count value from the offset count value to zero when the first counter reaches the target first digital count. | 09-18-2014 |
20140266120 | INTERNAL COMPENSATION FOR POWER MANAGEMENT INTEGRATED CIRCUITS - A voltage regulator integrated circuit comprises a control circuit driving at least one power switch to provide a regulated voltage at an output of an inductor/capacitor (LC) circuit coupled to the at least one power switch; an error amplifier having a first input coupled to a feedback signal representative of the regulated output voltage and a second input coupled to a reference signal; and a compensation network coupled to an output of the error amplifier and configured to provide a compensation voltage. The compensation network includes at least one digitally programmable resistor array and at least one digitally programmable capacitor array. Each array provides a plurality of user selectable component values. The control circuit includes a pulse modulator configured to modulate an input voltage based on the compensation voltage. | 09-18-2014 |
20140266093 | INTERNAL COMPENSATION FOR POWER MANAGEMENT INTEGRATED CIRCUITS - A voltage regulator integrated circuit comprises a control circuit driving at least one power switch to provide a regulated voltage at an output of an inductor/capacitor (LC) circuit coupled to the at least one power switch; an error amplifier having a first input coupled to a feedback signal representative of the regulated output voltage and a second input coupled to a reference signal; and a compensation network coupled to an output of the error amplifier and configured to provide a compensation voltage. The compensation network includes at least one digitally programmable resistor array and at least one digitally programmable capacitor array. Each array provides a plurality of user selectable component values. The control circuit includes a pulse modulator configured to modulate an input voltage based on the compensation voltage. | 09-18-2014 |
20140264689 | OPTICAL SENSORS FOR DETECTING RELATIVE MOTION AND/OR POSITION AND METHODS AND SYSTEMS FOR USING SUCH OPTICAL SENSORS - An optical sensor, according to an embodiment of the present invention, includes a photodetector region and a plurality of slats over the photodetector region. In an embodiment, the slats are made up of a plurality of metal layers connected in a stacked configuration with a plurality of metal columns. The metal columns can be made of metal vias, metal contacts and/or metal plugs. In an embodiment, the slats are angled relative to a surface of the photodetector region, wherein the angling of the slats is achieved by the metal layers being laterally offset relative to one another and/or metal columns being laterally offset relative to one another. In an alternative embodiment, the slats are made of an opaque polymer material, such as an opaque photoresist. | 09-18-2014 |
20140239933 | DETERMINING A CHARACTERISTIC OF A SIGNAL IN RESPONSE TO A CHARGE ON A CAPACITOR - In an embodiment, an apparatus includes a charging circuit and a determining circuit. The charging circuit is configured to generate a charge on a capacitor with a first current that is related to a signal having a characteristic, and the determining circuit is configured to determine the characteristic of the signal in response to the charge on the capacitor. For example, such an apparatus can determine an average of an input current to a power supply, or an average of an output current from a power source for the power supply, by mirroring the input current, charging a capacitor with the mirroring current, and determining the voltage across the charged capacitor. | 08-28-2014 |
20140239932 | DETERMINING A CHARACTERISTIC OF A SIGNAL IN RESPONSE TO A CHARGE ON A CAPACITOR - In an embodiment, an apparatus includes a charging circuit and a determining circuit. The charging circuit is configured to generate a charge on a capacitor with a first current that is related to a signal having a characteristic, and the determining circuit is configured to determine the characteristic of the signal in response to the charge on the capacitor. For example, such an apparatus can determine an average of an input current to a power supply, or an average of an output current from a power source for the power supply, by mirroring the input current, charging a capacitor with the mirroring current, and determining the voltage across the charged capacitor. | 08-28-2014 |
20140197811 | CURRENT LIMITING SCHEME FOR A CONVERTER - A modulator configured to control switching of current through an inductor of a converter according to a current limiting scheme while converting an input voltage to an output voltage, which includes a current limit generator and a comparator network. The current limit generator is configured to provide a periodic ramping current limit value based on either the input voltage or the output voltage, an inductance of the inductor, a timing signal, and a predetermined maximum output current of the boost converter. The comparator network is configured to provide a switch control signal to control switching of current through the inductor by comparing a current sense value indicative of a current through the inductor with a lesser of a compensation error value and the periodic ramping current limit value. The converter may be configured as a peak current mode control converter in either boost or buck mode. | 07-17-2014 |
20140191738 | SENSING A PHASE-PATH CURRENT IN A COUPLED-INDUCTOR POWER SUPPLY - An embodiment of a power supply includes an output node, inductively coupled phase paths, and a sensor circuit. The output node is configured to provide a regulated output signal, and the inductively coupled phase paths are each configured to provide a respective phase current to the output node. And the sensor circuit is configured to generate a sense signal that represents the phase current flowing through one of the phase paths. For example, because the phase paths are inductively coupled to one another, the sensor circuit takes into account the portions of the phase currents induced by the inductive couplings to generate a sense signal that more accurately represents the phase current through a single phase path as compared to conventional sensor circuits. | 07-10-2014 |
20140175627 | LEAD FRAME HAVING A PERIMETER RECESS WITHIN PERIPHERY OF COMPONENT TERMINAL - Embodiments described herein relate to manufacturing a device. The method includes etching at least one recess pattern in an internal surface of a lead frame, the at least one recess pattern including a perimeter recess that defines a perimeter of a mounting area. The method also includes attaching a component to the internal surface of the lead frame such that a single terminal of the component is attached in the mounting area and the single terminal covers the perimeter recess, wherein the perimeter recess has a size and shape such that the recess is proximate a perimeter of the single terminal. | 06-26-2014 |
20140145069 | PACKAGED LIGHT DETECTOR SEMICONDUCTOR DEVICES WITH NON-IMAGING OPTICS FOR AMBIENT LIGHT AND/OR OPTICAL PROXMITY SENSING, METHODS FOR MANUFACTURING THE SAME, AND SYSTEMS INCLUDING THE SAME - Packaged light detector semiconductor devices (PLDSDs), methods for manufacturing PLDSDs, and systems including a PLDSD are described herein. In an embodiment, a PLDSD includes a light detector die having a surface including an active photosensor region, and a non-imaging optical concentrator including an entrance aperture and an exit aperture axially aligned with one another and with the active photosensor region. A molding material forms the non-imaging optical concentrator and encapsulates at least a portion of the surface of the light detector die that extends beyond the exit aperture of the non-imaging optical concentrator. The non-imaging optical concentrator concentrates light from the entrance aperture toward the exit aperture and onto the active photosensor region. In certain embodiments, a reflective material is disposed on an inner surface of the non-imaging optical concentrator, and a light transmissive molding material fills at least a portion of an inner volume of the non-imaging optical concentrator. | 05-29-2014 |
20140138784 | PHOTODETECTORS USEFUL AS AMBIENT LIGHT SENSORS AND METHODS FOR USE IN MANUFACTURING THE SAME - Photodetectors, methods for use in manufacturing photodetectors, and systems including photodetectors, are described herein. In an embodiment, a photodetector includes a plurality of photodiode regions, at least some of which are covered by an optical filter. A plurality of metal layers are located between the photodiode regions and the optical filter. The metal layers include an uppermost metal layer that is closest to the optical filter and a lowermost metal layer that is closest to the photodiode regions. One or more inter-level dielectric layers separate the metal layers from one another. Each of the metal layers includes one or more metal portions and one or more dielectric portions. The uppermost metal layer is devoid of any metal portions underlying the optical filter. | 05-22-2014 |
20140125303 | LIMITING A CURRENT - In an embodiment, a power-supply controller includes a switching regulator and a current limiter. The switching regulator is configured to generate an input current such that an output voltage is generated in response to the input current and an input voltage, and the current limiter is configured to limit the input current in response to a quantity that is related to a ratio of the output voltage divided by the input voltage. For example, an embodiment of such a power-supply controller may be able to limit the output or load current from a power supply to a set level by limiting the input current in response to a quantity that is related to the ratio (e.g., the boost ratio) of the output voltage to the input voltage. | 05-08-2014 |
20140111703 | SYSTEMS AND METHODS FOR CONTROLLING SCANNING MIRRORS FOR A DISPLAY DEVICE - Certain embodiments described herein relate to a scanning controller configured produce a horizontal (H) and vertical (V) scanning control signal that is used to control a bi-axial scanning mirror of a scanning laser projector device, a system including such a scanning controller, and a method for generating such an H and V scanning control signal. In an embodiment, the H and V scanning control signal includes H scanning frequency content that is used to control a H scanning frequency of the bi-axial scanning mirror, and V scanning frequency content that is used to control a V scanning frequency of the bi-axial scanning mirror. To avoid cross talk, the scanning controller is configured to produce the H and V scanning control signal such that the H scanning frequency content has a null at DC, and the V scanning frequency content has a null at the H scanning frequency. | 04-24-2014 |
20140097529 | SOLDER FLOW-IMPEDING PLUG ON A LEAD FRAME - Embodiments described herein relate to a method of manufacturing a packaged circuit having a solder flow-impeding plug on a lead frame. The method includes partially etching an internal surface of a lead frame at dividing lines between future sections of the lead frame as first partial etch forming a trench. A non-conductive material that is adhesive to the lead frame is applied in the trench, such that the non-conductive material extends across the trench to form the solder flow-impeding plug. One or more components are attached to the internal surface of the lead frame and encapsulated. An external surface of the lead frame is etched at the dividing lines to disconnect different sections of lead frame as a second partial etch. | 04-10-2014 |
20140085761 | LOW POWER ANALOG SWITCH CIRCUITS THAT PROVIDE OVER-VOLTAGE, UNDER-VOLTAGE AND POWER-OFF PROTECTION, AND RELATED METHODS AND SYSTEMS - Analog switch circuits, methods for use with analog switch circuits, and devices and systems including analog switch circuits are disclosed herein. Such analog switch circuits include an analog switch input terminal (In), an analog switch output terminal (Out), and an analog switch control terminal (Ctl). During a normal-voltage condition, the input terminal (In) of the analog switch circuit is selectively connected and disconnected to/from the output terminal (Out) in dependence on a control signal received at the control terminal (Ctl). During an over-voltage condition, the input terminal (In) is disconnected from the output terminal (Out) regardless of the control signal received at the control terminal (Ctl). Additionally, during an under-voltage condition, the input terminal (In) is disconnected from the output terminal (Out) regardless of the control signal received at the analog switch control terminal (Ctl). In specific embodiments, symmetric protection and/or power-off protection is/are also provided. | 03-27-2014 |
20140032953 | BATTERY CHARGE SYSTEM AND METHOD CAPABLE OF OPERATING IN DIFFERENT CONFIGURATIONS - A controller configurable to operate in either in an NVDC mode or a standard mode. The controller includes mode logic that detects a mode value indicative of the selected mode and that asserts a corresponding mode signal, and control logic that is configured to operate according to the selected battery charging mode based on the mode signal and that provides a control signal accordingly. In the standard mode, the control signal is in either an on or off state depending upon presence of an external adapter and the charge state of the battery. In the NVDC mode, the control signal may operate in a linear mode if the battery is deeply discharged. A battery detector provides a battery indication that is used to switch the regulation operating point of an external system voltage. A power monitor output provides an indication of power being provided via the system voltage. | 01-30-2014 |
20140003179 | REDUCED-NOISE REFERENCE VOLTAGE PLATFORM FOR A VOLTAGE CONVERTER DEVICE | 01-02-2014 |
20140003104 | ACTIVE RECTIFICATION WITH CURRENT-SENSE CONTROL | 01-02-2014 |
20140002047 | FAST DYNAMIC VOLTAGE RESPONSE FOR VOLTAGE REGULATORS WITH DROOP CONTROL | 01-02-2014 |
20140001618 | SOLDER FLOW IMPEDING FEATURE ON A LEAD FRAME | 01-02-2014 |
20140001588 | OPTICAL SENSORS DEVICES INCLUDING A HYBRID OF WAFER-LEVEL INORGANIC DIELECTRIC AND ORGANIC COLOR FILTERS | 01-02-2014 |
20130334445 | WAFER LEVEL OPTOELECTRONIC DEVICE PACKAGES AND METHODS FOR MAKING THE SAME - Optoelectronic devices (e.g., optical proximity sensors), methods for fabricating optoelectronic devices, and systems including optoelectronic devices, are described herein. An optoelectronic device includes a light detector die that includes a light detector sensor area. A light source die is attached to a portion of the light detector die that does not include the light detector sensor area. An opaque barrier is formed between the light detector sensor area and the light source die, and a light transmissive material encapsulates the light detector sensor area and the light source die. Rather than requiring a separate base substrate (e.g., a PCB substrate) to which are connected a light source die and a light detector die, the light source die is connected to the light detector die, such that the light detector die acts as the base for the finished optoelectronic device. This provides for cost reductions and reduces the total package footprint. | 12-19-2013 |
20130334398 | MOTION AND SIMPLE GESTURE DETECTION USING MULTIPLE PHOTODETECTOR SEGMENTS - An optoelectronics apparatus selectively drives a light source, and includes four electrically isolated photodetector (PD) segments that detect light that has reflected off an object. Each of the four PD segments produces a corresponding signal, referred to as signals A, B, C and D, indicative of the light detected by the respective PD segment. Circuitry is used to produce a first motion signal indicative of a sum of the signals A plus B minus a sum of the signals C plus D, i.e., the first motion signal is indicative of (A+B)−(C+D). Further circuitry produces a second motion signal indicative of (B+C)−(A+D). Additional circuitry produces a signal and/or data that is indicative of a direction and/or rate of motion of an object, in dependence on the first and second motion signals. | 12-19-2013 |
20130314879 | CIRCUIT MODULE SUCH AS A HIGH-DENSITY LEAD FRAME ARRAY (HDA) POWER MODULE, AND METHOD OF MAKING SAME - A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components. | 11-28-2013 |
20130313694 | PACKAGED CIRCUIT WITH A LEAD FRAME AND LAMINATE SUBSTRATE - Embodiments of the subject application provide for a circuit comprising: a lead frame having a first plurality of exposed terminals, the lead frame defining a plane; a laminate substrate in the plane defined by the lead frame, adjacent to the lead frame, and electrically coupled to the lead frame, the laminate substrate having a first surface including a second plurality of exposed terminals and a second surface opposite the first surface; a first one or more dies mounted on the lead frame and electrically coupled to the lead frame; and a second one or more dies mounted on the second surface of the laminate substrate and electrically coupled to the laminate substrate. | 11-28-2013 |
20130300392 | SYSTEM AND METHOD OF DYNAMIC DROOP FOR SWITCHED MODE REGULATORS - A regulator system with dynamic droop including a regulator control network which is adapted to control regulation of an output voltage to a reference level, a DC droop network which provides a droop signal to modify the reference level based on output load according to a predetermined DC load line, and a dynamic droop network which adjusts the droop signal to delay recovery to the predetermined DC load line within an AC load line tolerance in response to a load transient. A transient reduction network may be included to reduce transient overshoot for load insertion or release depending upon duty cycle type. The dynamic droop network adjusts the droop signal to optimize utilization of an AC delay parameter while transitioning between an AC offset voltage allowance and the predetermined DC load line. | 11-14-2013 |
20130300388 | SYSTEM AND METHOD OF PREDICTIVE CURRENT FEEDBACK FOR SWITCHED MODE REGULATORS - A predictive current feedback system for a switched mode regulator including a sample and hold network for sampling voltage across a lower switch of the regulator and for providing a hold signal indicative thereof, and a predictive current feedback network which adds an offset adjustment to the hold signal based on a duration of a pulse width of a pulse control signal developed by the regulator. Sampling may be done while the lower switch is on for providing a hold value indicative of inductor current while the pulse control signal is low. The offset adjustment may be added to the hold signal in response to a transient event when the pulse signal is high. The offset may be incremental values after each of incremental time periods after a nominal time period, or may be a time-varying value. Adjustment may be made while the pulse signal is low as well. | 11-14-2013 |
20130293212 | SYSTEM AND METHOD OF BALANCED SLOPE COMPENSATION FOR SWITCH MODE REGULATORS - A modulator with balanced slope compensation including a control network, a slope compensation network, an offset network and an adjust network. The control network receives a feedback signal indicative of an output voltage and provides a loop control signal. The slope compensation network develops a slope compensation signal. The offset network determines a DC offset of the slope compensation signal. The adjust network combines the DC offset, the slope compensation signal and the loop control signal to provide a balanced slope compensated control signal. The DC offset may be determined as a peak of the slope compensation signal. The slope compensation signal may be developed based on the output voltage and a pulse control signal, in which the pulse control signal is developed using the balanced slope compensated control signal. | 11-07-2013 |
20130271193 | CIRCUITS AND METHODS TO GUARANTEE LOCK IN DELAY LOCKED LOOPS AND AVOID HARMONIC LOCKING - A delay locked loop (DLL) includes a phase detector (PD), a lock assistor (LA), a control voltage generator, and a voltage controlled delay line (VCDL). The PD determines a phase difference between of a reference clock and a delayed version of the reference clock and produces a pair of phase detector output signals in dependence on the determined phase difference. The LA receives the pair of phase detector output signals and produces a pair of lock assist output signals by selectively swapping the phase detector output signals. The control voltage generator receives the pair of lock assist output signals and produces a control voltage signal in dependence on thereon. The VCDL receives the control voltage signal and the reference clock (or a buffered version thereof) and outputs the delayed version of the reference clock, with a delay through the VCDL being dependent on the received control voltage signal. | 10-17-2013 |
20130270701 | SYSTEM AND METHODS FOR WIRE BONDING - A semiconductor package comprises a bond pad formed on a first semiconductor die, a surface of the bond pad exposed through an opening in a passivation layer on the first semiconductor die; a raised conductive area formed on top of a passivation layer on a second semiconductor die; and a bond wire having a first end coupled to the bond pad via a ball bond and a second end coupled directly to a surface of the raised conductive area via a stitch bond. The raised conductive area is comprised of a plurality of metal layers, each of the metal layers comprised of a respective material and having a respective thickness. The thickness and material of at least one of the plurality of metal layers is selected such that a hardness of the raised conductive area is at least as hard as a hardness of the bond wire. | 10-17-2013 |
20130252369 | ENHANCED LIFT-OFF TECHNIQUES FOR USE WHEN FABRICATING LIGHT SENSORS INCLUDING DIELECTRIC OPTICAL COATING FILTERS - Light sensors including dielectric optical coatings to shape their spectral responses, and methods for fabricating such light sensors in a manner that accelerates lift-off processes and increases process margins, are described herein. In certain embodiments, a short duration soft bake is performed. Alternatively, or additionally, temperature cycling is performed. Alternatively, or additionally, photolithography is performed using a photomask that includes one or more dummy corners, dummy islands and/or dummy rings. Each of the aforementioned embodiments form and/or increase a number of micro-cracks in the dielectric optical coating not covering the photodetector sensor region, thereby enabling an accelerated lift-off process and an increased process margin. Alternatively, or additionally, a portion of the photomask can include chamfered corners so that the dielectric optical coating includes chamfered corners, which improves the thermal reliability of the dielectric optical coating. | 09-26-2013 |
20130249032 | ENHANCED LIFT-OFF TECHNIQUES FOR USE WITH DIELECTRIC OPTICAL COATINGS AND LIGHT SENSORS PRODUCED THEREFROM - Light sensors including dielectric optical coatings to shape their spectral responses, and methods for fabricating such light sensors in a manner that accelerates lift-off processes and increases process margins, are described herein. In certain embodiments, a short duration soft bake is performed. Alternatively, or additionally, temperature cycling is performed. Alternatively, or additionally, photolithography is performed using a photomask that includes one or more dummy corners, dummy islands and/or dummy rings. Each of the aforementioned embodiments form and/or increase a number of micro-cracks in the dielectric optical coating not covering the photodetector sensor region, thereby enabling an accelerated lift-off process and an increased process margin. Alternatively, or additionally, a portion of the photomask can include chamfered corners so that the dielectric optical coating includes chamfered corners, which improves the thermal reliability of the dielectric optical coating. | 09-26-2013 |
20130235266 | SYSTEMS AND METHODS TO IMPROVE SPATIAL RESOLUTION ON BACK AND FORTH SCANNING DISPLAY DEVICES - Methods, systems and devices described herein improve vertical resolution at sides of a four cornered image produced by a scanning projector display device. In accordance with an embodiment, a first plurality of frames (e.g., odd frames) of the image are scanned back and forth from side to side starting at a first line level, in one of the corners. Additionally, a second plurality of frames (e.g., even frames) of the image are scanned back and forth from side to side, starting at a vertical offset level from the first line level, in the same one of the corners. The scanning of the first plurality of frames (e.g., the odd frames) is interleaved with the scanning of the second plurality of frames (e.g., the even frames). | 09-12-2013 |
20130207555 | LED DRIVER SYSTEM WITH DIMMER DETECTION - An LED driver system including an input receiving a rectified AC conductive angle modulated voltage on a rectified node, a converter, a low-pass filter, and AC detector, and a driver network. The converter is to the rectified node and includes a power switching device coupled to a switching node, in which the power switching device is controlled to convert the rectified AC conductive angle modulated voltage to an output voltage and output current. The low-pass filter is configured to filter voltage of the switching node to provide a filtered voltage. The AC detector receives the filtered voltage and provides a current sense signal indicative thereof. The driver network controls duty cycle of the power switching device based on the current sense signal. | 08-15-2013 |
20130207126 | OPTOELECTRONIC APPARATUSES AND METHODS FOR MANUFACTURING OPTOELECTRONIC APPARATUSES - A method for manufacturing an optoelectronic apparatus includes attaching bottom surfaces of first and second packaged optoelectronic semiconductor devices (POSDs) to a carrier substrate (e.g., a tape) so that there is a space between the first and second POSDs. An opaque molding compound is molded around portions of the first and second POSDs attached to the carrier substrate, so that peripheral surfaces of the first POSD and the second POSD are surrounded by the opaque molding compound, the space between the first and second POSDs is filled with the opaque molding compound, and the first and second POSDs are attached to one another by the opaque molding compound. The carrier substrate is thereafter removed so that electrical contacts on the bottom surfaces of the first and second POSDs are exposed. A window for each of the POSDs is formed during the molding process or thereafter. | 08-15-2013 |
20130187445 | POWER OVER COAXIAL CABLE - An image communication system includes a coaxial cable having first and second ends. A monitor station is coupled to the first end and a camera is coupled to the second end. The monitor station provides power to the camera through the cable, while the cable is also used to carry communication signals transmitted by the camera to the monitor station. The image communication system includes a first active inductor coupled to the first end and a second active inductor coupled to the second end. A current-compensation circuit may also be provided. | 07-25-2013 |
20130187260 | PACKAGED SEMICONDUCTOR DEVICES, AND RELATED METHODS AND SYSTEMS - A packaged semiconductor device includes at least first and second lead-fingers. A molded structure forms a cavity and is molded around portions of each of the first and second lead-fingers to thereby mechanically attach each of the first and second lead-fingers to the molded structure. A semiconductor structure (e.g., a IC, chip or die) is attached within the cavity. First and second bond wires respectively providing electrical connections between the semiconductor structure and the first and second lead-fingers. A further portion of each of the first and second lead-fingers is mechanically attached to a bottom surface of the semiconductor structure to inhibit relative mechanical motion between the semiconductor structure, the molded structure and the first and second lead-fingers. | 07-25-2013 |
20130181332 | PACKAGE LEADFRAME FOR DUAL SIDE ASSEMBLY - Embodiments of a leadframe for a device packaging are used not only for structural support and connectivity to the I/O pins to the external world, but also for housing and/or mounting devices above and below the leadframe. Being electrically conductive, the leadframe also serves as a low resistance interconnect and good current carrier between the bondpads on one device or between the bondpads on different devices above and/or below the leadframe. | 07-18-2013 |
20130154585 | MULTIPLE PHASE SWITCHING REGULATOR WITH PHASE CURRENT SHARING - A phase current sharing network that adjusts operation of a current mode multiphase switching regulator in which the phase current sharing network includes multiple synthetic ripple networks and a current share network. The regulator develops phase currents including ripple currents through corresponding phase inductors as controlled by corresponding pulse control signals. Each synthetic ripple networks develops a corresponding ripple voltage that simulates a corresponding phase ripple current and uses the ripple voltages to develop the pulse control signals. The current share network adjusts each ripple voltage by a combined adjustment value. The combined adjustment value is a combination of phase adjustment values in which each phase adjustment value is based on a difference between a corresponding one of ripple voltage and a reference voltage. Transconductance amplifiers may be used to convert the voltage differences to current adjust values applied to the ripple capacitors developing the ripple voltages. | 06-20-2013 |
20130148396 | SYSTEM AND METHOD OF FEED FORWARD FOR BOOST CONVERTERS WITH IMPROVED POWER FACTOR AND REDUCED ENERGY STORAGE - A controller and controlling method is disclosed for a boost converter. The controller includes a first node for receiving an output sense signal indicative of an output DC voltage, a second node for receiving a boost current sense signal indicative of current through an inductor of the boost converter, a first combiner which provides an error signal based on a difference between the output sense signal and a reference signal, an integrator which integrates the error signal and which provides a compensation signal indicative thereof, and a pulse controller which provides a pulse control signal for controlling the power switch to operate the boost converter in DCM. The pulse controller develops pulse control signal based on comparing the compensation signal with a ramp signal and further adjusts the pulse control signal over a cycle of a rectified AC input voltage based on the boost current sense signal. | 06-13-2013 |
20130141070 | CONTROL SYSTEM AND METHOD FOR SHARED INDUCTOR REGULATOR - A control system and method for a shared inductor regulator. The regulator includes an inductor and multiple switches to selectively couple the inductor to output, reference and charge nodes. The charge node may be coupled to a battery. An input switch may be included to selectively couple the inductor to a source node. A controller controls the switches to regulate output voltage, charge current, and a source voltage when provided. The inductor current is sensed and used to regulate the output voltage, and to regulate either the charge current or the input voltage. When an external source provides sufficient power, the charging current is regulated. When the source reaches a maximum power set point, the input voltage is maintained at a minimum level. When the source provides insufficient power, the battery is used to add power or to provide sole power. | 06-06-2013 |
20130127557 | SYSTEM AND METHOD OF MAINTAINING GAIN LINEARITY OF VARIABLE FREQUENCY MODULATOR - A variable frequency modulator including a compensation network, first and second pulse control networks and a linearity controller. The compensation network is configured to provide a compensation signal indicative of an output load condition. The first pulse control network is configured to initiate pulses on a pulse control signal and to adjust operating frequency based on changes of the compensation signal. The second pulse control network is configured to terminate the pulses on the pulse control signal based on a predetermined timing parameter. The linearity controller is configured to adjust timing of terminating the pulses based on a predetermined steady state operating frequency and an actual operating frequency to maintain modulator gain at a constant level. | 05-23-2013 |
20130120761 | OPTICAL PROXIMITY SENSORS WITH OFFSET COMPENSATION - An optical proximity sensor includes a driver, light detector and offset signal generator. The driver selectively drives a light source. The light detector produces an analog detection signal indicative of an intensity of light detected by the light detector. The detected light can include light transmitted by the light source that reflected off an object within the sense region of the optical sensor, interference light and ambient light. The interference light includes light transmitted by the light source, and detected by the light detector, that was not reflected off an object within the sense region of the optical sensor. The offset signal generator selectively produces an analog offset signal that is combined with the analog detection signal produced by the photodetector to produce an analog compensated detection signal. The analog offset signal compensates for at least a portion of the interference light included in the light detected by the photodetector. | 05-16-2013 |
20130106500 | INDUCTOR STRUCTURE INCLUDING INDUCTORS WITH NEGLIGIBLE MAGNETIC COUPLING THEREBETWEEN | 05-02-2013 |
20130100562 | ELECTROSTATIC DISCHARGE CLAMP WITH CONTROLLED HYSTERESIS INCLUDING SELECTABLE TURN ON AND TURN OFF THRESHOLD VOLTAGES - An electrostatic discharge (ESD) clamp for coupling between first and second nodes for providing ESD protection including first and second voltage threshold circuits. The clamp circuit limits operating voltage between the first and second nodes to a maximum level when activated. The first and second voltage threshold circuits each have a selectable threshold voltage, such as by coupling one or more voltage threshold devices in series. The first and second voltage threshold circuits trigger to turn on the clamp circuit when the operating voltage increases above a first voltage threshold. The voltage threshold circuits are turned off to turn off the clamp circuit when the operating voltage decreases to the second threshold voltage. The second threshold voltage may be selected at any level above the nominal operating voltage to prevent the clamp from latching. | 04-25-2013 |
20130088209 | SYSTEM AND METHOD FOR CURRENT LIMITING A DC-DC CONVERTER - A DC-DC voltage converter has a pair of switching transistors to provide an output voltage and are alternately switched in a boost mode of operation responsive to control signals. An inductor is connected to the pair of switching transistor and has an inductor current flowing there through. A current sensor monitors an input current and generates a current sense signal responsive thereto. Control circuitry generates the control signals to the second pair of switching transistors responsive to the current sense signal, the output voltage and a current limit signal, wherein when the current limit signal indicates the inductor current exceeds a current limit the control signals configure the pair of switching transistors to decrease the inductor current. | 04-11-2013 |
20130088203 | BATTERY CHARGE MODULATOR WITH BOOST CAPABILITY - A system and method for controlling a converter of a power stage receiving an adapter current for providing current to a load. The converter is operative in a buck mode for charging a battery and in a boost mode for discharging the battery to the load to supplement adapter current. The adapter current is compared with a predetermined level to develop a control signal, and at least one pulse control signal is developed based on the control signal and used to control the modulator. The modulator operates the converter in the buck mode when the adapter current up to the predetermined level, and operates the converter in the boost mode when the adapter current exceeds the predetermined level. The battery current may also be monitored to adjust the control signal to limit battery charge or discharge current in both modes. | 04-11-2013 |
20130081266 | STACKABLE ELECTRONIC COMPONENT - An embodiment of an electronic component includes a circuit element disposed within a package, which includes a surface and at least one standoff protruding from the surface. For example, where the circuit element is an inductor in a power supply, the standoff may allow one to mount the inductor component over another component, such as a transistor component. Therefore, the layout area of such a power supply may be smaller than the layout area of a power supply in which the inductor and transistor components are mounted side by side. | 04-04-2013 |
20130043940 | BACK-TO-BACK STACKED DIES - Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die. | 02-21-2013 |
20130019039 | SYSTEM AND METHOD FOR OPERATING A ONE-WIRE PROTOCOL SLAVE IN A TWO-WIRE PROTOCOL BUS ENVIRONMENT - A method for transmitting data on a data line of a two-wire bus wherein the bus includes a data line and a clock line includes the step of pulling the data line of the two-wire bus low to define a start condition. Next, a first group of fixed data bits enabling a slave device to determine a clock signal for an address portion of a transmission of data are transmitted between a master device and the slave device. An address of the slave device is transmitted from the master device in a second group of data bits. A third group of fixed data bits enabling the slave device to determine the clock signal for a data portion of the transmission of data between the master device and the slave device are transmitted from the master device to the slave device. | 01-17-2013 |
20120313201 | OPTICAL SENSOR DEVICES INCLUDING FRONT-END-OF-LINE (FEOL) OPTICAL FILTERS AND METHODS FOR FABRICATING OPTICAL SENSOR DEVICES - Optical sensor devices, and methods of manufacturing the same, are described herein. In an embodiment, a monolithic optical sensor device includes a semiconductor substrate having a trench, with a photodetector region under said trench. An optical filter is formed in the trench and over at least a portion of the photodetector region. One or more metal structures extend above a top surface of said optical filter. The trench, photodetector region and optical filter are formed as part of a front-end-of-line (FEOL) semiconductor fabrication process. The one or more metal structures are formed as part of a back-end-of-line (BEOL) semiconductor fabrication process. | 12-13-2012 |
20120312962 | OPTICAL SENSORS FOR DETECTING RELATIVE MOTION AND/OR POSITION AND METHODS AND SYSTEMS FOR USING SUCH OPTICAL SENSORS - A system according to an embodiment of the present invention includes one or more first optical sensors and one or more second optical sensors. The first optical sensor(s) each include a photodetector region and a plurality of first slats over the photodetector region. The second optical sensor(s) each include a photodetector region and a plurality of second slats over the photodetector region, wherein the second slats have a different configuration than the first slats. For example, the second slats can be orthogonal relative to the first slats. For another example, the first slats can slant in a first direction, and the second slats can slant in a second direction generally opposite the first direction. Currents produced by the first optical sensor(s) and the second optical sensor(s), which are indicative of light incident on the optical sensors, are useful for distinguishing between movement in at least two different directions. | 12-13-2012 |
20120274491 | GRADIENT-BASED APPROACH TO SAMPLE-TIME MISMATCH ERROR CALIBRATION IN A TWO-CHANNEL TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER - Correcting phase error in a two-channel TIADC system in a manner that is independent of the Nyquist zone(s) occupied by the input signal. In the preferred approach this is done using the gradient of a phase error estimate. The gradient may be determined from a simplified expression of linear regression; the direction of the adaptation is then controlled by the sign of the gradient. The adaptive algorithm converges to the optimal value regardless of the Nyquist zone occupied by the input signal. | 11-01-2012 |
20120268063 | CHARGING SYSTEM WITH ADAPTIVE POWER MANAGEMENT - An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input. | 10-25-2012 |
20120257312 | SYSTEM AND METHOD FOR PROGRAMMING AND CONTROLLING OVER CURRENT TRIP POINT LIMITS IN VOLTAGE REGULATORS - A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator. | 10-11-2012 |
20120235630 | CHARGING SYSTEM WITH ADAPTIVE POWER MANAGEMENT - An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input. | 09-20-2012 |
20120134394 | COMMUNICATING WITH A SELF-CLOCKING AMPLITUDE MODULATED SIGNAL - Examples disclosed herein provide for a method for transmitting a signal. The method includes generating a Manchester encoded data stream and combining the Manchester encoded data stream with an amplified clock signal to produce an amplitude modulated signal having a zero crossing at each edge of the amplified clock signal. The amplitude modulated signal can then be sent over a communication medium. | 05-31-2012 |