INTERNAIONAL BUSINESS MACHINES CORPORATION Patent applications |
Patent application number | Title | Published |
20100223220 | ELECTRONIC SYNAPSE - An electronic synapse device is provided. One embodiment of the invention includes a metastable switching synaptic device. Changing conductance of the metastable switching synaptic device occurs by receiving opposite signed first and second voltage pulses at the metastable switching synaptic device where magnitude of the first voltage pulse and the second voltage pulse each are below a switching voltage magnitude threshold. A magnitude difference between the first voltage pulse and the second voltage pulse exceeds the switching voltage magnitude threshold by an amount, wherein the amount is a function of a relative timing between the first voltage pulse and the second voltage pulse. | 09-02-2010 |
20090319984 | EARLY DEFECT REMOVAL MODEL - A method and a computer program product for modeling early defect removal are provided. The method includes selecting a first set of software development practices to model as a baseline plan, where each of the software development practices has an associated defect removal efficiency (DRE) and is associated with a development phase of a software development cycle. The method also includes selecting a second set of the software development practices to model as a to be plan, where each of the software development practices has a configurable DRE for the to be plan. The method further includes calculating defect removal in each of the development phases as a function of the DRE values, adjusting configuration settings for the to be plan to shift an amount of the defect removal earlier in the development phases of the to be plan as compared to the baseline plan, and outputting a graphical representation. | 12-24-2009 |
20080229166 | Accelerating Test, Debug and Failure Analysis of a Multiprocessor Device - A mechanism for accelerating test, debug and failure analysis of a multiprocessor device is provided. With the mechanism, on-chip trace logic is utilized to receive internal signals from logic provided in modules of the multiprocessor device. The modules are preferably copies of one another such that, given the same inputs, each module should operate in the same manner and generate the same output as long as the modules are operating properly. The modules are provided with the same inputs and the internal signals of the modules are traced using an on-chip trace bus and on-chip trace logic analyzer to perform the trace. The internal signals from one module are compared against another module so as to determine if there is any discrepancy which would indicate a fault. Additional pairs of modules may be compared to pinpoint a faulty module that is the source of the fault. | 09-18-2008 |