BARCELONA SUPERCOMPUTING CENTER - CENTRO NACIONAL DE SUPERCOMPUTACIÓN
BARCELONA SUPERCOMPUTING CENTER - CENTRO NACIONAL DE SUPERCOMPUTACIÓN Patent applications | ||
Patent application number | Title | Published |
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20140082284 | DEVICE FOR CONTROLLING THE ACCESS TO A CACHE STRUCTURE - The present disclosure relates to a device for controlling the access to a cache structure comprising multiple cache sets during the execution of at least one computer program, the device comprising a module for generating seed values during the execution of the at least one computer program; a parametric hash function module for generating a cache set identifier to access the cache structure, the identifier being generated by combining a seed value generated by the module for generating seed values and predetermined bits of an address to access a main memory associated to the cache structure. | 03-20-2014 |
20100131958 | Method, A Mechanism and a Computer Program Product for Executing Several Tasks in a Multithreaded Processor - The invention relates a method for executing several tasks in a multithreaded (MT) processor, each task having, for every hardware shared resource from a predetermined set of hardware shared resources in the MT processor, one associated artificial time delay that is introduced when said task accesses said hardware shared resource, the method comprising step (a) of establishing, for every hardware shared resource and each task to be artificially delayed, the artificial delay to be applied to each access of said task to said hardware shared resource; step (b) of performing the following steps (b | 05-27-2010 |