ATMEL CORPORATION Patent applications |
Patent application number | Title | Published |
20160135003 | CIRCUIT OF A NODE AND METHOD FOR TRANSIT TIME MEASUREMENT IN A RADIO NETWORK - A circuit of a node in a radio network and method for transit time measurement between a first node and a second node of a radio network is provided. A frame is transmitted by the first node, wherein the frame requires an acknowledgment of reception by the second node. A first point in time of the transmission of the frame is established by the first node by a time counter. The frame is received by the second node at a second point in time. The acknowledgment is transmitted by the second node to the first node at a third point in time, wherein the third point in time depends on the second point in time by a predetermined time interval between the second point in time and the third point in time. A fourth point in time is established by the first node by the time counter when the acknowledgment is received. The transit time or the change in transit time is determined from the first point in time established by the time counter and from the established fourth point in time and from the predetermined time interval. | 05-12-2016 |
20160048227 | Low-Power And Low-Frequency Data Transmission For Stylus - In one embodiment, a method includes initiating an acquisition of a first signal from an electrode of a touch sensor according to an acquisition frequency of the touch sensor. The method also includes reversing, with a controller, a polarity of the first signal to produce a second signal. The method also includes storing a first modulated signal at an end of the acquisition of the first signal, where the first modulated signal includes the second signal as modulated by one or more third-party signals during the acquisition of the first signal. | 02-18-2016 |
20150155868 | INTELLIGENT CURRENT DRIVE FOR BUS LINES - An intelligent current drive is disclosed that couples an active current source to a bus line to increase the rate of pull-up and decouples the active current source from the bus line prior to reaching the desired pull-up voltage. | 06-04-2015 |
20150144883 | FORMING RECESSED STRUCTURE WITH LIQUID-DEPOSITED SOLUTION - A damascene approach is used to form a recessed structure in a substrate for receiving liquid-deposited solution, such as a carbon nanotube (CNT) solution. The liquid-deposited solution is built-up in the recessed structure, simplifying the coating process and providing a more uniform thickness of the liquid-deposited layer. | 05-28-2015 |
20150137896 | CALIBRATING TEMPERATURE COEFFICIENTS FOR INTEGRATED CIRCUITS - A calibration system and method are disclosed that include a first bias current generator configured for generating a first bias current that is proportional to absolute temperature (PTAT) and a second bias current generator configured for generating a second bias current that is complementary to absolute temperature (CTAT). The first and second bias currents are copied, multiplied and then summed into a total output bias current, which can be used to bias an electronic circuit. A temperature coefficient is calibrated by changing a ratio of the first and second bias current contributions to the total output bias current, while maintaining the same total output bias current level for a given temperature. | 05-21-2015 |
20150095681 | CONFIGURING POWER DOMAINS OF A MICROCONTROLLER SYSTEM - A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain based on whether the microcontroller system has asserted a power trigger for any module in the power domain or if any module in the power domain has asserted a power keeper. | 04-02-2015 |
20150067661 | SOFTWARE CODE PROFILING - An on-chip function call aware software code profiling counter system and method is disclosed. When building software code a compiler/tool-chain can modify prologues and epilogues of functions to add instrumentation code which uniquely identifies the function. Each function included in the instrumented source code tree is assigned a unique identifier (ID) by the compiler/tool-chain. Writing a unique ID for a function to a register starts profiling for the function. The profiling is performed by a counter that counts the number of instruction cycles since the last unique ID was written to the register. When a unique ID for a next function to be profiled is written to the register, the old register value and the counter value are latched to one or more buffers and the counter is cleared to start the next count sequence for the next function to be profiled. | 03-05-2015 |
20150067206 | MULTI-PROTOCOL SERIAL COMMUNICATION INTERFACE - Systems and methods for multi-protocol serial communication interfaces are described. One example system includes an interface module including a buffer for storing a protocol selection. The system includes a protocol module coupled to the interface module and configured for providing one or more serial communication protocols. Based on the protocol selection, one of the serial communication protocols is selected. The system also includes a serial engine module coupled to the interface module and the protocol module. The serial engine module is configured for transmitting and receiving data or commands based on the selected serial communication protocol. | 03-05-2015 |
20150058827 | BREAKING CODE EXECUTION BASED ON TIME CONSUMPTION - An on-chip system uses a time measurement circuit to trap code that takes longer than expected to execute by breaking code execution on excess time consumption. | 02-26-2015 |
20150048679 | SMART GRID APPLIANCE CONTROL - Systems and methods for controlling small grids of appliances are described. One sample method includes receiving consumption data from a plurality of electrical appliances that are plugged into outlets at a first location and monitoring power usage at the first location. The method includes evaluating the received consumption data to identify one or more predetermined conditions in one or more of the plurality of electrical appliances and evaluating stored data related to power consumption preferences at the first location. The power consumption preferences define conditions when a consumer associated with the first location has agreed to enable remote control of at least one designated appliance upon an occurrence of one or more predetermined conditions. The method includes determining that the one or more conditions are satisfied and to provide a first secure communication to the first appliance to control the power consumption. | 02-19-2015 |
20150028898 | MEASURING POWER CONSUMPTION OF CIRUIT COMPONENT OPERATING IN RUN MODE - A sense resistor is coupled between a power source and one or more power pins of an integrated circuit (IC) chip including a circuit component (e.g., a microcontroller unit (MCU)). An on-chip amplifier (e.g., a programmable gain amplifier or op-amp) amplifies the voltage drop over the sense resistor to a level that is within the dynamic range of an on-chip analog-to-digital converter (ADC). In some implementations, the measured signals can be time-stamped and stored in a trace buffer and aligned with other trace data using a front-end tool (e.g., a personal computer). In some implementations, circuitry is included for detecting and handling power consumption events associated with the circuit component. In some implementations, a program counter associated with the circuit component is synchronously sampled with the power consumption measurements and/or other data sources. | 01-29-2015 |
20150028887 | MEASURING POWER CONSUMPTION OF CIRUIT COMPONENT OPERATING IN ULTRA-LOW POWER MODE - By powering an electronic component operating in an ultra-low power mode from a pre-charged measuring capacitor and measuring the time to discharge the capacitor to a trip voltage level, measurement data can be obtained. In some implementations, the capacitance of the capacitor can be obtained by adding a known current to the unknown current drawn from the capacitor and calculating the capacitance using a mathematical formula. | 01-29-2015 |
20140340943 | ACTIVE VALLEY FILL POWER FACTOR CORRECTION - A power converter is disclosed that includes an active valley fill (AVF) capacitor that is actively switched to provide current to a load during a portion of an alternating current (AC) input cycle. The current supplied to the load includes some current supplied by the AC input and some current supplied by the AVF capacitor. Circuitry is configured to regulate the amount of current flowing through the load, including controlling the amount of current supplied by the AVF capacitor. The duty cycle on the AVF capacitor can be adjusted to shape the AC input current waveform. | 11-20-2014 |
20140320189 | PROGRAMMABLE BUS SIGNAL HOLD TIME WITHOUT SYSTEM CLOCK - A circuit is disclosed that provides a programmable hold time for a bus signal without running a system clock and without a frequency requirement between the system clock and a bus clock. | 10-30-2014 |
20140312929 | Self-Recovering Bus Signal Detector - A detector circuit is disclosed that detects bus signal conditions. To detect a START condition, asynchronous sequential logic detects a first bus signal transition (e.g., from high to low) and a second bus signal (e.g., a high signal). The outputs of the asynchronous sequential logic are combined to produce a START signal that can be latched, so that the START signal can be used to wake up a system or for other purposes. To detect a STOP condition, asynchronous sequential logic is set by a transition (e.g., low to high) of the first bus signal and a second bus signal (e.g., a high signal), producing a STOP signal that can be used to reset the asynchronous sequential logic and the latch. | 10-23-2014 |
20140281554 | GENERATING KEYS USING SECURE HARDWARE - A client device that is coupled to a host device sends a parent public key and an associated certificate to the host device. The parent public key, the certificate and a corresponding parent private key are stored in secure persistent storage included in a secure device associated with the client device. The client device receives instructions from the host device for generating a child private and public key pair. In response to receiving the instructions, the client device generates a child private key based on a first random number produced within the secure device, and a child public key associated with the child private key. The client device computes a first signature on the child public key using the parent private key. The client device sends the child public key and the first signature to the host device. | 09-18-2014 |
20140265929 | CONTROLLING SWITCHING CURRENT REGULATORS - A switching current regulator controls a load current flowing through a load. The switching current regulator switches a switch to an ON state after applying a regulating signal to the switch. During an integration period while the switch is in the ON state, the switching current regulator integrates an output voltage based on a sense voltage based on the load current and a reference voltage; at the end of the integration period, the switching current regulator outputs an integrated output voltage. The switching current regulator compares the integrated output voltage to a predetermined value. Based on a result of comparing the integrated output voltage and the predetermined value, the switching current regulator adjusts the regulating signal. | 09-18-2014 |
20140258729 | Stored Authorization Status for Cryptographic Operations - A hardware authentication device is disclosed that uses a cryptographic signature verification operation to authorize a subsequent cryptographic operation to be performed using the same or different keys and stores that authorization status in protected memory. The cryptographic algorithm may be an ECDSA signature, SHA-based Message Authentication Code (MAC) or any other cryptographic algorithm. The authorization status may be stored for a number of uses for a period of time or until a certain event occurs. In some implementations, the authorization status and the key that was authorized are stored in the same protected location in memory to preserve their relation to each other and prevent modification of either of them. Depending on system policy, the authorization mechanism might be a static stored external token that authorizes key use or an authorization process that is regenerated using a random (e.g., unique) number. | 09-11-2014 |
20140253090 | CONFIGURABLE INTEGRATED CIRCUIT ENABLING MULTIPLE SWITCHED MODE OR LINEAR MODE POWER CONTROL TOPOLOGIES - An integrated circuit is operable for implementing any of multiple switched mode or linear power control topologies. The integrated circuit includes a control unit, and functional blocks each of which includes circuitry. The control unit is operable selectively to enable particular ones of the functional blocks in response to an input signal indicative of a particular one of the switched mode or linear mode power control topologies. | 09-11-2014 |
20140240022 | CHARGE MEASUREMENT - An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator. | 08-28-2014 |
20140211518 | LOW TOTAL HARMONIC DISTORTION AND HIGH POWER FACTOR CORRECTION POWER CONVERTERS - A controller circuit for the control of a power converter is disclosed. An example controller circuit generates a waveform that drives a switch that controls the power converter. The controller circuit includes a divider module that generates a modification factor based on a ratio of the two input signals of the module. The circuit includes a module that generates a first waveform configured for a critical conducting mode of operation of a power converter and an on-time adjuster module that modifies the first waveform based on the modification factor and generates a second waveform. The second waveform is delivered to the switch. An example modification factor is the ratio of the output voltage to the rectified input voltage of the power converter. | 07-31-2014 |
20140177766 | CHANNEL TRACKING IN AN ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING SYSTEM - A receiver determines phase and frequency information from data signals that carry information from a transmitter to a receiver, instead of or in addition to, information from control signals. In a specific embodiment, the information is obtained from data signals modulated as a binary phase-shift keying (“BPSK”) waveform by demodulation. Other phase-shift keyings might be used instead. Encoded information might be recovered in received OFDM packets by receiving OFDM subcarriers modulated with the two low data rates supported by IEEE 802.11 standard(s) wherein the subcarriers encoding the packet are modulated using binary phase shift keying and the encoding information is at a zero phase or a π (pi) phase offset on each of the subcarriers. Determining the carrier frequency might be done by calculating the square of each of subcarrier signal and/or determining the phase offset of the subcarriers even with information modulated onto the subcarriers. | 06-26-2014 |
20140160802 | FAULT PROTECTION AND CORRECTION OF LINE AND LOAD FAULTS - A fault protection and correction circuit for the control of a power converter is disclosed. An example circuit generates a waveform that drives a switch on or off and controls the power converter. The controller circuit in addition to power factor correction (PFC) circuitry includes a first and a second shut down mode modules, both of them cause the switching to stop. The circuit includes a module for receiving fault events. When a fault occurs, the controller enters the second shut down mode. The controller stays in the second shut down mode if the required current for this mode can be provided by the outside circuitry. Otherwise, the controller enters the first shut down mode that requires less current and subsequently restarts the controller. By modifying the outside circuitry the controller can respond differently to fault events. | 06-12-2014 |
20140153291 | DUAL-MODE, AC/DC POWER CONVERTER WITH POWER FACTOR CORRECTION - A dual-mode circuit for the control of an AC/DC power converter is disclosed. An example dual-mode controller circuit generates a waveform that drives a switch on or off and controls the power converter. The controller circuit in addition to power factor correction (PFC) circuitry includes a critical conducting mode (CrM) module as well as a discontinuous conducting mode (DCM) module configured to generate waveforms adapted for CrM and DCM operation of a power converter. The circuit includes a node for receiving a feedback signal of a voltage or a current. Based on the received signal, one of the modules is selected at a time to supply the waveform at the output of the dual-mode controller. An example of the output waveform is a series of pulses that are configured to drive the switch that controls the transfer of power between input and output of the power converter. | 06-05-2014 |
20140139126 | LOAD-AWARE COMPENSATION IN LIGHT-EMITTING-DIODE BACKLIGHT ILLUMINATION SYSTEMS - System(s) and method(s) are provided for power management in an electronic display via compensation of a power source of a light-emitting-diode (LED) backlighting system. A compensation feedback loop includes a load-aware controller that receives the bad condition from a dimming controller and supplies a control signal to the power source. An efficiency regulator functionally connected the backlight circuitry closes the compensation, feedback loop and provides an input signal to the load-aware controller. The dimming controller implements phase-shifted pulse-modulation dimming, which based on duty cycle can establish a dimming equilibrium with two load conditions. The load aware controller includes a set of compensation blocks arranged in parallel, with a single compensation block connected to the input signal and that provides the control signal. A selector component in the load aware controller determines a compensation block to be connected to the compensation feedback loop based on the received load condition. | 05-22-2014 |
20140125399 | CHARGE MEASUREMENT - An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator. | 05-08-2014 |
20140124938 | STRESS RELIEF FOR PLASTIC ENCAPSULATED DEVICES - A semiconductor integrated circuit includes a semiconductor substrate, one or more devices in or on the semiconductor substrate, and a dielectric layer above the one or more devices, wherein the dielectric layer has openings over at least portions of the one or more devices. The semiconductor integrated circuit also includes plastic packaging material (e.g., plastic granules) on a top surface of the dielectric layer and over the openings. In some implementations, the one or more devices include bi-polar transistors, and the openings in the dielectric layer are located over base-emitter junctions of the bi-polar devices. | 05-08-2014 |
20140095764 | MICROCONTROLLER WITH INTEGRATED INTERFACE ENABLING READING DATA RANDOMLY FROM SERIAL FLASH MEMORY - A microcontroller includes a microprocessor, a serial flash memory interface, and input/output (I/O) terminals for coupling the serial flash memory interface to external serial flash memory. The microprocessor is operable to generate instruction frames that trigger respective commands to read data from specified addresses in the external serial flash memory. The serial flash memory interface receives and processes the instruction frames, obtains the data contained in the specified addresses in the external serial flash memory regardless of whether the specified addresses are sequential or non-sequential, and provides the data for use by the microprocessor. | 04-03-2014 |
20140095643 | MICROCONTROLLER WITH INTEGRATED MONITORING CAPABILITIES FOR NETWORK APPLICATIONS - A microcontroller has integrated monitoring capabilities for network applications. The disclosed techniques can take advantage, for example, of an unused, duplicate network controller that is present in some microcontrollers by providing selection circuitry and configuration capabilities that allow the unused, duplicate network controller to be used for the purpose of monitoring frames that are transferred between network media and another network controller residing on the microcontroller. The monitored frames can then be used, for example, for debugging or other purposes, such as statistical analyses or security enhancements. | 04-03-2014 |
20140089714 | CONFIGURING POWER DOMAINS OF A MICROCONTROLLER SYSTEM - A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain in response to event from an event generating module without activating a processor of the microcontroller system. | 03-27-2014 |
20140089708 | DELAYING INTERRUPTS IN A MICROCONTROLLER SYSTEM - A microcontroller system includes a power manager that is configured to, during a power saving mode, configure an interrupt delaying module to receive and hold an interrupt from an interrupt source. In response to receiving the interrupt from the interrupt source, the power manager causes the microcontroller system to exit the power saving mode. Upon exiting the power saving mode, the power manager configures the interrupt delaying module to release the interrupt. | 03-27-2014 |
20140089707 | CHANGING POWER MODES OF A MICROCONTROLLER SYSTEM - A microcontroller system can operate in a number of power modes. In response to changing from a previous mode to a present mode, the microcontroller system reads a present calibration value correspond to the present mode from system configuration storage and write the present calibration value to a configuration register for a component. A logic block for the component reads the present calibration value and calibrates the component. | 03-27-2014 |
20140089706 | DELAYING RESET SIGNALS IN A MICROCONTROLLER SYSTEM - A microcontroller system includes a reset delaying module that is configured to, during a power saving mode, receive and delay a reset signal from a reset source. The reset delaying module waits for a regulator ready signal from a voltage regulator because, prior to the reset signal, the voltage regulator is in a power saving mode. In response to receiving the regulator ready signal, the reset delaying module releases the reset, e.g., to a reset controller. | 03-27-2014 |
20140089670 | UNIQUE CODE IN MESSAGE FOR SIGNATURE GENERATION IN ASYMMETRIC CRYPTOGRAPHIC DEVICE - Methods and systems are disclosed for verifying the use of a client device by a host device in a secure system. In one aspect, a method for authenticating a client device includes receiving, by the client device, a message from a host device, accessing, by the client device, a private key and a unique code stored on the client device, where the unique code is different than the private key, generating, by the client device, a digital signature for the message using the private key and the unique code, and providing, by the client device, the digital signature to the host device for verification of the use of the client device by the host device. | 03-27-2014 |
20140089648 | BIFURCATED PROCESSOR CHIP RESET ARCHITECTURES - Systems and techniques for processor reset hold control are described. A described system includes a controller to detect a hold request based on an external reset signal and an external debug signal, and generate a hold signal based on a detection of the hold request, where the hold signal continues after the external reset signal has been discontinued; a system component that is responsive to the external reset signal; a processor that is responsive to the hold signal, where the hold signal causes the processor to enter a reset state and to maintain the reset state after the external reset signal has been discontinued; and a system manager configured to permit external access to the system component while the processor is in the reset state. The controller can be configured to discontinue the hold signal in response to a clear request. | 03-27-2014 |
20140089536 | ADC SEQUENCING - A device comprises a central processing unit (CPU) and a memory configured for storing memory descriptors. The device also includes an analog-to-digital converter controller (ADC controller) configured for managing an analog-to-digital converter (ADC) using the memory descriptors. In addition, the device includes a direct memory access system (DMA system) configured for autonomously sequencing conversion operations performed by the ADC without CPU intervention by transferring the memory descriptors directly between the memory and the ADC controller for controlling the conversion operations performed by the ADC. | 03-27-2014 |
20140085975 | CURRENT MONITORING CIRCUIT FOR MEMORY WAKEUP TIME - A microcontroller system is determining to exit a power saving mode and, in response, enable a reference current source to begin providing a reference current for a memory module. The microcontroller system determines that the reference current has reached a substantial fraction of a target reference current, and, in response to determining that the reference current has reached a substantial fraction of the target reference current, enables the memory module to begin performing one or more memory operations. | 03-27-2014 |
20140078427 | PACKAGE DEPENDENT SEGMENT TERMINAL REMAPPING FOR DRIVING LIQUID CRYSTAL DISPLAYS - A microcontroller for controlling a liquid crystal display (LCD) is mountable in any one of multiple package types. The microcontroller includes a LCD controller to generate logical mapping signals indicative of voltages to be applied to segment terminals of a LCD glass. A driver circuit drives the segment terminals selectively. A remapping unit receives the logical mapping signals from the LCD controller and maps the logical mapping signals, for each of the package types, to physical segment terminal drivers in the driver circuit based on a distribution of I/O terminals that are bonded for each package type when that package type is used with the LCD glass. | 03-20-2014 |
20140075231 | MICROCONTROLLER INPUT/OUTPUT CONNECTOR STATE RETENTION IN LOW-POWER MODES - A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode. | 03-13-2014 |
20140075066 | LOW-POWER MODES OF MICROCONTROLLER OPERATION WITH ACCESS TO CONFIGURABLE INPUT/OUTPUT CONNECTORS - A microcontroller includes I/O pins whose respective functions are configurable by an I/O controller in accordance with user-programmable input. The availability of such configurable I/O pins is extended to low-power or power savings modes of operation during which the I/O controller is powered off or deactivated. | 03-13-2014 |
20140071082 | DIFFERENTIAL SENSING FOR CAPACITIVE TOUCH SENSORS - A first signal from a first sense line of a touch sensor is received. A second signal from a second of the touch sensor is received. The first signal is inverted. The inverted first signal and the second signal are summed to produce a differential signal. The differential signal is output to a touch sensor controller. | 03-13-2014 |
20140062746 | BINARY DIVARICATION DIGITAL-TO-ANALOG CONVERSION - Systems and techniques for performing binary divarication digital-to-analog conversion are described. A described converter includes voltage range adjusters arranged in series to convert a digital sequence to an analog representation, each of the adjusters being responsive to a respective bit of the digital sequence, and a combiner. The first adjuster produces first high and low output voltages based on first high and low input voltages and a most significant bit value of the digital sequence. The last adjuster produces last high and low output voltages based on last high and low input voltages and a least significant bit value of the digital sequence. The last high and low input voltages are responsive to the first high and low output voltages as modified by any of zero or more intermediate voltage range adjusters. The combiner produces an analog output signal based on the last high and low output voltages. | 03-06-2014 |
20140062442 | FULLY INTEGRATED VOLTAGE REGULATOR USING OPEN LOOP DIGITAL CONTROL FOR OPTIMUM POWER STEPPING AND SLEW RATE - Methods and systems are disclosed for an integrated voltage regulator with open loop digital control for power stepping. In one aspect, a method for regulating an output voltage includes receiving data indicative of a power setting associated with an identified state of an electrical circuit, the power setting based on a load current demand of the electrical circuit in the identified state, enabling one or more parallel driver segments based on the received data indicative of the power setting. The method further includes sourcing by the enabled one or more parallel driver segments sufficient current to meet the load current demand of the electrical circuit in the identified state while maintaining the output voltage at a predetermined voltage level, and providing the output voltage to the electrical circuit at the predetermined voltage level. | 03-06-2014 |
20140055166 | REFERENCE VOLTAGE CIRCUITS - A reference voltage circuit corrects for bandgap voltage shifts induced during fabrication. The reference voltage circuit generates a reference voltage using first and second base-emitter pairs. The reference voltage circuit sums the voltage across the first base-emitter pair with a difference voltage. During a first time period, the difference voltage is the voltage across the first base-emitter pair minus the voltage across the second base-emitter pair, and during a second time period, the difference voltage is the voltage across the second base-emitter pair minus the voltage across the first base-emitter pair. | 02-27-2014 |
20140055105 | VOLTAGE SCALING SYSTEM - A circuit for downscaling voltage comprising: a voltage regulator; a voltage reference register configured to provide a voltage reference value; a voltage comparator configured to output a logical one if a supply voltage of the voltage regulator is greater than the voltage reference value, wherein a first input of the voltage comparator is coupled to output of the voltage regulator and a second input of the voltage comparator is coupled to output of the voltage reference register; an AND gate, where a first input of the AND gate is coupled to output of the voltage comparator and a second input of the AND gate is coupled to a voltage reference ready signal; a switch configured to close based on output of logical one from the AND gate; and a pull-down resistor configured to couple to the output of the voltage regulator only if the switch is closed. | 02-27-2014 |
20140055047 | COLOR CORRECTING DEVICE DRIVER - A color correcting device driver is configured to vary the equivalent current into light emitting elements (e.g., LEDs) with the frequency of the AC input current (e.g., 120 Hz). In implementations that include a fly-back controller with a power factor correction (PFC) controller on the primary side, the color correcting device driver performs the method of: 1) turning on the loads (e.g., white and CA strings of LEDs); 2) determining if the voltage supplied to the loads has dropped by a first threshold amount; 3) turning off the loads; and 4) determining if the voltage supplied to loads has recovered by a second threshold amount (or waiting for a fixed amount of time). The method is repeated. In implementations that do not include a PFC controller on the primary side, the color correcting device driver can create a pulse width modulated (PWM) signal. | 02-27-2014 |
20140047250 | SINGLE PIN COMMUNICATION MECHANISM - A method and device include a power pin, a ground pin, and a communications pin. A communications module receives power from the power pin and utilizes an edge counting communication protocol over the communication pin. | 02-13-2014 |
20140032956 | ULTRA-DEEP POWER-DOWN MODE FOR MEMORY DEVICES - A memory device includes a voltage regulator, whose output provides a voltage supply for various other components of the memory device, including a command user interface. The memory device is placed into an ultra-deep power-down mode by providing to the memory device a software command, which causes the output of the voltage regulator to be disabled. To bring the memory device out of the ultra-deep power-down mode, a chip select signal is provided to the memory device, which includes a wake-up circuit that remains powered on even when the memory device is in the ultra-deep power-down mode. Receipt of the chip select signal while the memory device is in the ultra-deep power-down mode causes the output of the voltage regulator to be enabled, thereby providing power to the components that were completely powered down. | 01-30-2014 |
20140028384 | REFERENCE VOLTAGE CIRCUITS IN MICROCONTROLLER SYSTEMS - A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage. | 01-30-2014 |
20140028278 | DUAL REGULATOR SYSTEMS - A microcontroller system includes a main voltage regulator and a low power voltage regulator having a static current consumption less than the static current consumption of the main voltage regulator. A power state controller enables the low power voltage regulator during a power saving mode. On exiting the power saving mode, the power state controller enables the main voltage regulator and disables the low power voltage regulator after determining that the main voltage regulator is ready. The switching circuitry can be asynchronous. | 01-30-2014 |
20140025944 | Secure Storage and Signature - An integrated circuit device comprises a processor and a secure protection zone with security properties that can be verified by a remote device communicating with the integrated circuit device. The secure protection zone includes a persistent storage that is configured for storing cryptographic keys and data. The secure protection zone also includes instructions that are configured for causing the processor to perform cryptographic operations using the cryptographic keys. In addition, the secure protection zone includes an ephemeral memory that is configured for storing information associated with the cryptographic operations. The instructions are configured for causing the processor to perform the cryptographic operations on the data stored in the persistent storage and the information in the ephemeral memory as part of a secure communication exchange with the remote device. | 01-23-2014 |
20140021582 | CONFIGURABLE PASSIVE COMPONENTS - A wafer of passive components is diced to leave a flat passive chip. The flat passive chip has bond pads for passive components on a same side of the flat passive chip. The flat passive chip is stacked onto an active chip. The passive components are wirebonded together to connect the passive components in series or parallel, resulting in the flat passive chip having an overall passive characteristic equal to a target characteristic. | 01-23-2014 |
20140001603 | Integrated Circuit Structures Containing a Strain- Compensated Compound Semiconductor Layer and Methods and System Related Thereto | 01-02-2014 |
20130326219 | STORED PUBLIC KEY VALIDITY REGISTERS FOR CRYPTOGRAPHIC DEVICES AND SYSTEMS - Systems and techniques for performing cryptographic operations based on public key validity registers are described. A described system includes a controller and a memory structure to store one or more public keys. The memory structure includes one or more validity registers that respectively correspond to the one or more public keys. The controller has exclusive write access to the validity register. The controller can be configured to perform an authentication of a public key, write an authentication status value to the corresponding validity register based on a result of the authentication, and perform one or more cryptographic operations using the public key that are conditional on the validity register indicating an authenticated status for the public key. | 12-05-2013 |
20130322185 | Memory Decoder Circuit - A decoder circuit includes high voltage and low voltage transistors. The decoder circuit uses the high voltage transistors during modify operations to provide a high voltage, e.g., a boosted voltage, to memory cells to change memory cell status or perform other operations. The decoder circuit uses the low voltage transistors during read operations. | 12-05-2013 |
20130311699 | OPERATIONS USING DIRECT MEMORY ACCESS - A system includes a serial interface, a peripheral device coupled to the serial interface, non-volatile memory, and a DMA controller including multiple linked channels. The various channels can be configured in different modes to facilitate the DMA controller performing various operations, such as data transfer, with respect to the non-volatile memory or the peripheral device. | 11-21-2013 |
20130265009 | INTER-DEVICE COMMUNICATION IN A BATTERY MANAGEMENT AND PROTECTION SYSTEM - A battery management and protection system includes a string of battery management and protection integrated circuit devices that may be connected to one another in a daisy chain configuration. Some of the devices can be electrically connected to one or more battery cells. Each device includes an inter-device communication interface comprising a daisy chain line driver. The system includes a controller external to the string of devices and a bi-directional connection lines connecting each device in the string to an upstream and/or downstream device in the string. The system can allow the external controller to access any single one of the devices in the daisy chain, any subset of the devices in the daisy chain, or all the devices in the daisy chain using a single command that is transmitted from one device to the next over a bi-directional connection line. | 10-10-2013 |
20130264881 | DIFFERENTIAL INTERFACE FOR INTER-DEVICE COMMUNICATION IN A BATTERY MANAGEMENT AND PROTECTION SYSTEM - A multi-cell battery stack includes a microcontroller and a string of battery management and protection IC devices connected to one another in a daisy chain configuration. Each battery management and protection IC device can include a communication interface circuit includes pairs of differential input signal lines, receivers including respective current comparator circuits to receive differential signals on the differential input signal lines, and transmitters to provide outgoing differential signals on the differential input signal lines. A digital circuit block allows signals to pass between the receivers and transmitters. | 10-10-2013 |
20130250692 | Adaptive Programming For Non-Volatile Memory Devices - Systems and techniques for performing write operations on non-volatile memory are described. A described system includes a memory structure including non-volatile memory cells that are arranged on word lines and bit lines and a microcontroller that is communicatively coupled with the memory structure. The memory structure can include non-volatile memory cells that are arranged on word lines and bit lines. The microcontroller can be configured to receive data to write to the memory structure, write the data to the memory structure using a selected word line of the word lines, detect a failure to write the data, apply, based on the failure, a negative bias voltage to one or more unselected word lines of the word lines during a negative bias period, and write the data to the portion of the memory cells using the selected word line during the negative bias period. | 09-26-2013 |
20130238963 | Digital Architectures For Serial Data Stream Operations - Systems and techniques for serial data stream operations are described. A described system includes a serial bus communicatively coupled with a memory structure to handle a serial data stream from or to the memory structure; generators configured to generate enablement signals that are associated with different bit-groups of the serial data stream, each of the enablement signals including pulses that are aligned with time-slots that are associated with a respective bit-group; logic elements configured to store internal states and produce output signals that are based on the serial data stream, the enablement signals, and the internal states, and circuitry configured to capture values. Each of the enablement signals enables a respective logic element to selectively change a respective internal state responsive to bit-values of a respective bit-group. Each of the captured values represents an output of a respective logic element that is responsive to all bit-values of a respective bit-group. | 09-12-2013 |
20130235679 | Boosting Memory Reads - A memory device comprises memory elements that are arranged in an array. The array includes rows associated with wordlines and columns associated with bitlines. The memory elements in a row share a wordline and memory elements in a column share a bitline. For each wordline, a wordline driver circuit is associated with the wordline. The memory device comprises a boost circuit that has an output coupled to the wordline driver circuits. The boost circuit is configured to provide a negative voltage to the wordlines during a read operation of the memory device such that unselected wordlines are held at a negative voltage below a ground potential while a selected wordline is held at a supply voltage during the read operation. | 09-12-2013 |
20130234976 | Buffer-Reference Self-Capacitance Measurement - In one embodiment, a method includes modifying an amount of charge of a capacitance of a touch sensor resulting in a voltage at the capacitance being a reference voltage level. The method also includes modifying the amount of charge of the capacitance resulting in the voltage at the capacitance being a first pre-determined voltage level. The modified amount of charge of the capacitance induces a first amount of charge on an integration capacitor and the first amount of charge modifies the voltage at the integration capacitor from an integration-reference voltage level to a first charging voltage level. The method also includes modifying the amount of charge of the capacitance resulting in the voltage at the capacitance being a second pre-determined voltage level. The modified amount of charge of the capacitance inducing a second amount of charge on the integration capacitor. | 09-12-2013 |
20130222012 | Programmable Logic Unit - Programmable logic units are described. A described unit includes one or more input interfaces to receive one or more input signals; logic elements that are individually programmable; one or more output interfaces to provide one or more output signals; and a programmable interconnect array that is configured to selectively form one or more interconnections within the unit based on one or more programming settings. The programmable interconnect array can be programmable to route the one or more input signals from the one or more input interfaces to at least a portion of the logic elements, programmable to route one or more intermediate signals among at least a portion of the logic elements, and programmable to route one or more signals from at least a portion of the logic elements to produce the one or more output signals via the output interface. | 08-29-2013 |
20130219159 | SINGLE-WIRE BOOTLOADER FOR TARGET DEVICE WITH SELF-PROGRAMMING CAPABILITY - A single-wire bootloader software architecture is disclosed that interfaces with any host device that has a serial port to program memory of a target device using only a single general-purpose I/O pin. The single-wire bootloader does not require any chip hardware resource modules. Instead, the single-wire bootloader implements a single-wire UART in software that monitors a single general-purpose I/O pin for commands from the host device. | 08-22-2013 |
20130154991 | Single-Layer Touch Sensor - In one embodiment, an apparatus includes a touch sensor. The touch sensor is disposed on one or more substrates. The touch sensor includes at least one drive electrode and at least one sense electrode. The drive and sense electrodes each include a base portion and a plurality of digits coupled to the base portion. The spaces between the digits of the drive electrode are partially occupied by a digit of a sense electrode (and vice versa). The drive and sense electrodes occupy the same plane. | 06-20-2013 |
20130154721 | SWITCHED-CAPACITOR, CURVATURE-COMPENSATED BANDGAP VOLTAGE REFERENCE - In a novel aspect, producing a reference bandgap voltage includes generating a proportional to absolute temperature (PTAT) voltage difference based on respective voltages across a first pair of diodes. The PTAT voltage difference is sampled and scaled using a switched-capacitor amplifier. The switched-capacitor amplifier also is used to sample and scale a difference in voltages across a second pair of diodes, one of which is biased with a PTAT current and the other of which is biased with a current that exhibits little or no linear temperature dependency. The scaled voltage differences are combined with a voltage corresponding to a voltage across the diode that is biased with the PTAT current so as to at least partially compensate for linear and non-linear temperature-dependent components of the voltage across the diode. | 06-20-2013 |
20130154593 | ADAPTIVE PHASE-LEAD COMPENSATION WITH MILLER EFFECT - An adaptive phase-lead compensation (zero) circuit is disclosed that can be added to a circuit (e.g., a CMOS-based LDO) to ease the compensation and increase the phase margin of the circuit. By using the disclosed adaptive phase-lead compensation circuit, an adjustable resistance can be connected to any nodes in the compensated circuit rather than just to the voltage source (VDD) or ground (GND), allowing the Miller Effect to be used via a Miller capacitor. | 06-20-2013 |
20130148432 | SENSE AMPLIFIER WITH OFFSET CURRENT INJECTION - A sense amplifier includes a sense input node, a current mirror circuit to mirror the current on the sense input node, and a result output node. A current source supplies an offset current. The sense amplifier increases the current on the sense input node by the offset current and reduces the offset current from the mirrored current at the result output node. | 06-13-2013 |
20130147358 | Self-Power for Device Driver - The disclosed implementations utilize the voltage drop inherent in the device string to power a device control IC. In some implementations, current is drawn from the bottom of the device string and applied to a voltage supply pin of the device control IC. In some implementations, current is drawn from some other location in the device string (e.g., near the bottom or midpoint of the device string) using a switch. In some implementations, current is drawn from near the bottom and the bottom of the device string at different times, such that less current is drawn from the bottom of the device string as the duty cycle of the device string increases and more current is drawn from near the bottom of the device string as the duty cycle of the device string increases. | 06-13-2013 |
20130141119 | Substantially Edgeless Touch Sensor - In one embodiment, an apparatus is provided that includes a touch sensor. The touch sensor includes a plurality of drive electrodes made of conductive material, a plurality of sense electrodes made of conductive material, and a plurality of edges. Each of the drive electrodes and each of the sense electrodes are coupled to at least one track. The tracks are located along only one of the plurality of edges of the touch sensor. | 06-06-2013 |
20130134889 | Circuit for Driving Light Emitting Elements - In one novel aspect, driving a string of light emitting elements, such as LEDs, includes applying a drive signal to circuitry that regulates a voltage appearing at a source of a transistor whose drain is coupled to one end of the string of light emitting elements and whose source is coupled to ground through a resistive element. Sequencing of the drive signal and a voltage supply signal for the light emitting elements is controlled such that the voltage supply signal is not increased above a predetermined allowable voltage for the transistor until the transistor is turned on, and such that the supply voltage is not decreased below the allowable voltage for the transistor until the transistor is turned off. | 05-30-2013 |
20130120046 | Analog rail-to-rail comparator with hysteresis - According to a novel aspect, operating an analog rail-to-rail comparator circuit with common mode detection of differential input signals includes generating a hysteresis current for the comparator circuit based on a common mode voltage used for the common mode detection. The hysteresis current is added to a differential output of a comparator in the comparator circuit, such that a hysteresis voltage at an output of the comparator circuit is substantially independent of the common mode voltage. | 05-16-2013 |
20130113445 | POWER CONVERSION FEEDBACK CONTROL CIRCUIT - A power conversion circuit of two feedback loops is disclosed that includes a feedback control circuit for ramping up or down a commanded voltage to a load (e.g., LEDs). The second feedback loop feeds into the first feedback loop, and the second feedback loop operates at a slower bandwidth than the first feedback loop. When ramping up or down the commanded voltage, a voltage overshoot results because of delay in the system. The overshoot can be compensated for by a final adjustment to the commanded voltage. | 05-09-2013 |
20130113381 | Color Correcting Device Driver - A color correcting device driver is configured to vary the equivalent current into light emitting elements (e.g., LEDs) with the frequency of the AC input current (e.g., 120 Hz). In implementations that include a fly-back controller with a power factor correction (PFC) controller on the primary side, the color correcting device driver performs the method of: 1) turning on the loads (e.g., white and CA strings of LEDs); 2) determining if the voltage supplied to the loads has dropped by a first threshold amount; 3) turning off the loads; and 4) determining if the voltage supplied to loads has recovered by a second threshold amount (or waiting for a fixed amount of time). The method is repeated. In implementations that do not include a PFC controller on the primary side, the color correcting device driver can create a pulse width modulated (PWM) signal. | 05-09-2013 |
20130106800 | Authenticating with Active Stylus | 05-02-2013 |
20130106799 | Authenticating with Active Stylus | 05-02-2013 |
20130106798 | Differential Sensing in an Active Stylus | 05-02-2013 |
20130106797 | Tuning Algorithm for Noise Reduction in an Active Stylus | 05-02-2013 |
20130106796 | Active Stylus with Capacitive Buttons and Sliders | 05-02-2013 |
20130106795 | Dynamic Adjustment of Received Signal Threshold in an Active Stylus | 05-02-2013 |
20130106794 | Capacitive Force Sensor | 05-02-2013 |
20130106771 | Active-Stylus Nib with Rolling-Ball Tip | 05-02-2013 |
20130106770 | Active Stylus with Energy Harvesting | 05-02-2013 |
20130106769 | Capacitive and Inductive Sensing | 05-02-2013 |
20130106767 | Modulating Drive Signal for Communication Between Active Stylus and Touch-Sensor Device | 05-02-2013 |
20130106766 | Active Stylus with Configurable Touch Sensor | 05-02-2013 |
20130106764 | Scaling Voltage for Data Communication Between Active Stylus and Touch-Sensor Device | 05-02-2013 |
20130106763 | Power Management System for Active Stylus | 05-02-2013 |
20130106762 | Locking Active Stylus and Touch-Sensor Device | 05-02-2013 |
20130106761 | Touch Sensor with Lookup Table | 05-02-2013 |
20130106760 | Communication Between a Master Active Stylus and a Slave Touch-Sensor Device | 05-02-2013 |
20130106741 | Active Stylus with Tactile Input and Output | 05-02-2013 |
20130106740 | Touch-Sensitive System with Motion Filtering | 05-02-2013 |
20130106725 | Data Transfer from Active Stylus | 05-02-2013 |
20130106724 | Executing Gestures With Active Stylus | 05-02-2013 |
20130106723 | Inductive Charging for Active Stylus | 05-02-2013 |
20130106721 | Active Stylus With Surface-Modification Materials | 05-02-2013 |
20130106720 | Active Stylus with High Voltage | 05-02-2013 |
20130106718 | Dynamic Reconfiguration of Electrodes in an Active Stylus | 05-02-2013 |
20130106717 | Multi-Electrode Active Stylus Tip | 05-02-2013 |
20130106715 | Active Stylus with Filter | 05-02-2013 |
20130106714 | Power Management System for Active Stylus | 05-02-2013 |
20130106713 | Active Stylus with Filter Having a Threshold | 05-02-2013 |
20130099697 | Multi-Channel Driver Equalizer - The disclosed multi-channel driver equalizer circuit matches currents in multiple strings of illumination devices at low current levels by using an analog equalizer to sequentially couple the output of a reference amplifier in series with each current source amplifier in a current limit loop of the driver equalizer circuit to correct the offsets of the current source amplifiers, resulting in the matching of string currents on average. | 04-25-2013 |
20130093522 | HIGH ACCURACY RC OSCILLATOR - A device includes an RC oscillator circuit and incorporates various features that individually and in combination can help improve the stability or accuracy of the oscillator output frequency. The oscillator circuit is operable to provide a tunable output frequency and includes a bias circuit switchable between first and second modes of operation. One of the modes has less drift in oscillator bias current relative to the other mode. The device also includes drift compensation circuitry that is operable to compensate for drift in the oscillator output frequency in a closed-loop mode of operation based on a comparison of the oscillator output frequency with a reference frequency. The device further includes a processor operable to compensate for temperature-based drift in the oscillator frequency in an open-loop mode of operation based on a measured temperature value in the vicinity of the oscillator circuit. | 04-18-2013 |
20130093339 | DRIVING CIRCUITS FOR LIGHT EMITTING ELEMENTS - A circuit for driving light emitting elements, such as LEDs, includes .a first transistor having a source coupled to ground through a first resistive element, and a second transistor having a gate electrically coupled to a gate of the first transistor, a source electrically coupled to ground, and a drain for electrical connection to a first group of light emitting elements. The circuit also includes circuitry to provide a predetermined voltage at the source of the first transistor, circuitry to compensate for a difference in respective gate-source voltages of the first and second transistors, and circuitry to compensate for a difference in respective drain-source voltages of the first and second. transistors. In some implementations, the circuit can achieve relatively low power consumption. | 04-18-2013 |
20130093338 | DRIVING CIRCUITS FOR LIGHT EMITTING ELEMENTS - A circuit for driving light emitting elements, such as LEDs, includes a first transistor having a source coupled to ground through a first resistive element, and a second transistor having a gate electrically coupled to a gate of the first transistor, a source electrically coupled to ground, and a drain for electrical connection to a first group of light emitting elements. The circuit also includes circuitry to provide a predetermined voltage at the source of the first transistor, circuitry to compensate for a difference in respective gate-source voltages of the first and second transistors, and circuitry to compensate for a difference in respective drain-source voltages of the first and second transistors. In some implementations, the circuit can achieve relatively low power consumption. | 04-18-2013 |
20130083578 | PRIMARY SIDE PFC DRIVER WITH DIMMING CAPABILITY - A primary side PFC driver circuit is disclosed that includes a switch control circuit for commanding a switch to allow an inductor coupled to an output load (e.g., LEDs) to transfer energy provided by an input voltage source. The switch control circuit provides two signals for commanding the switch. A first signal having a first frequency, with a duty cycle in proportion to the input voltage amplitude, commands the switch to allow the average input current to be proportional to the input voltage amplitude. A second signal having a second frequency higher than the first frequency pulses the output load with substantially constant current pulses based on a value of the first signal (e.g., while the first signal is high). The current pulses produce a substantially constant current in the output load. | 04-04-2013 |
20130082621 | PRIMARY SIDE PFC DRIVER WITH DIMMING CAPABILITY - A primary side PFC driver circuit is disclosed that includes a switch control circuit for commanding a switch to allow an inductor coupled to an output load (e.g., LEDs) to transfer energy provided by an input voltage source. The switch control circuit provides two signals for commanding the switch. A first signal having a first frequency, with a duty cycle in proportion to the input voltage amplitude, commands the switch to allow the average input current to be proportional to the input voltage amplitude. A second signal having a second frequency higher than the first frequency pulses the output load with substantially constant current pulses based on a value of the first signal (e.g., while the first signal is high). The current pulses produce a substantially constant current in the output load. | 04-04-2013 |
20130069672 | LOW POWER CAPACITIVE TOUCH DETECTOR - A low power capacitive detector is disclosed. The detector includes a mechanism to measure and detect touch on capacitive sensors. The detector uses signal processing to suppress noise and increase sensitivity. The detector does not require dedicated analog circuitry, making it easy to adopt in a microcontroller system. The detector can be scaled to a larger number of capacitive sensors without noticeable increase in silicon cost. | 03-21-2013 |
20130069671 | LOW POWER CAPACITIVE TOUCH DETECTOR - A low power capacitive detector is disclosed. The detector includes a mechanism to measure and detect touch on capacitive sensors. The detector uses signal processing to suppress noise and increase sensitivity. The detector does not require dedicated analog circuitry, making it easy to adopt in a microcontroller system. The detector can be scaled to a larger number of capacitive sensors without noticeable increase in silicon cost. | 03-21-2013 |
20130033212 | SENSORLESS BLDC MOTOR CONTROL BY COMPARING INSTANTANEOUS & AVERAGE BEMF VOLTAGES - Sensorless driving of a brushless DC (BLDC) motor includes detecting a zero crossing time from back electromotive force (BEMF) voltage of the BLDC motor. An instantaneous BEMF voltage and an average BEMF voltage are compared to detect the crossover time, which can be used to change the commutation switching sequence. Since the average BEMF voltage differs for odd and even steps of the commutation switching sequence, average BEMF voltages are calculated separately for odd and even sequences and compared to instantaneous BEMF voltages to detect crossover points for the odd and even sequences. The times to commutations for the odd and even sequences are averaged to provide an average time to the next commutation cycle. The average time can be scaled by a reduction factor to reduce the effects of measurement noise. | 02-07-2013 |
20130026605 | WLCSP for Small, High Volume Die - The disclosed WLCSP solution overcomes the limitations of fan-out WLCSP solutions, and other conventional solutions for WLCSP for small, high volume die, by increasing the width of scribe regions between die on a semiconductor substrate to accommodate bonding structures (e.g., solder balls) that partially extend beyond peripheral edges of the die. The scribe regions can be widened in x and y directions on the wafer. The widened scribe regions can be incorporated into the design of the mask set. | 01-31-2013 |
20120300567 | Sense Amplifier Apparatus and Methods - Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed. | 11-29-2012 |
20120270367 | Component Stacking for Integrated Circuit Electronic Package - Component stacking for increasing packing density in integrated circuit packages. In one aspect of the invention, an integrated circuit package includes a substrate, and a plurality of discrete components connected to the substrate and approximately forming a component layer parallel to and aligned with a surface area of the substrate. An integrated circuit die is positioned adjacent to the component layer such that a face of the die is substantially parallel to the surface area of the substrate. The face of the die is aligned with at least a portion of the component layer, and terminals of the die are connected to the substrate. | 10-25-2012 |
20120268217 | Calibration of Temperature Sensitive Circuits with Heater Elements - One or more heating elements are disposed on a semiconductor substrate proximate a temperature sensitive circuit disposed on the substrate (e.g., bandgap circuit, oscillator). The heater element(s) can be controlled to heat the substrate and elevate the temperature of the circuit to one or more temperature points. One or more temperature measurements can be made at each of the one or more temperature points for calibrating one or more reference values of the circuit (e.g., bandgap voltage). | 10-25-2012 |
20120254668 | Mechanism For Storing And Extracting Trace Information Using Internal Memory In Micro Controllers - This document relates to apparatus and methods to store and retrieve trace information in on-chip system memory of microcontrollers. A microcontroller comprises a microprocessor and a memory device accessible through a data bus and an address bus coupled to the microprocessor. The microcontroller includes on-chip debug logic coupled to the microprocessor. Trace data can be retrieved from system memory using a debug port of the debug logic. A system in accordance with the present invention will lower the cost of implementation of trace features in microcontrollers, and strongly reduce the cost of supporting such features in debug tools. | 10-04-2012 |
20120204017 | Microprocessor for Executing Byte Compiled Java Code - A microprocessor architecture for executing byte compiled Java programs directly in hardware. The microprocessor targets the lower end of the embedded systems domain and features two orthogonal programming models, a Java model and a RISC model. The entities share a common data path and operate independently, although not in parallel. | 08-09-2012 |
20120178214 | ROUTABLE ARRAY METAL INTEGRATED CIRCUIT PACKAGE FABRICATED USING PARTIAL ETCHING PROCESS - An integrated circuit assembly is fabricated on a metal substrate strip in an array format that has raised circuitry pattern formed by photolithographic and metal etching processes. The circuitry pattern is formed on one side of the metal substrate only. The raised circuitry's etch depth extends partially through the metal substrate. Die attachment can be performed using a non-conductive material applied directly onto and around the raised circuitry features directly under the die. After wirebond and molding processes, the molded metal substrate strip assembly is processed through a metal etching process to remove the metal substrate portion that is exposed beyond the mold cap. A solder mask coating can be applied to protect the metal circuitry and to define the package pad opening to form Land-Grid-Array (LGA) packages. Solder balls can also be attached to form Ball-Grid-Array (BGA) packages. | 07-12-2012 |
20120176184 | METHOD AND CIRCUIT FOR AN OPERATING AREA LIMITER - The present invention relates to circuits and methods for limiting the operating area of a transistor in a constant current source. The circuits and methods use a detector and a driver to limit the operating area of a transistor. The detector and driver have parameters selected so that, when the voltage at the drain of the transistor satisfies a reference condition, the driver causes drain current of the transistor to decrease. The reference condition is determined relative to the maximum safe drain-to-source voltage at the design drain current of the constant current source. | 07-12-2012 |
20120176049 | APPARATUS AND TECHNIQUE FOR MODULAR ELECTRONIC DISPLAY CONTROL - The present invention discloses apparatus and techniques for modular backlighting control of a display. The display includes a number of strings of LEDs. The display is divided into several sections, and each section includes one or more strings of LEDs. A local controller is assigned to each section. The local controller receives feedback signals from the strings of LEDs in its sections and controls the drive voltages and drive currents of those strings. The local controllers communicate with each other and also with the main system controller. | 07-12-2012 |
20120170157 | BATTERY MANAGEMENT AND PROTECTION - A battery management and protection system can include various features to improve safety-critical and other functions. Among the features that can be included in some implementations are automatic loading of safety or other parameters during start-up of the system; a centralized timekeeper and an event system that can trigger actions in the system independently of a central processing unit; use of the same modules for both automatically-controlled safety-related measurements and firmware-controlled measurements; enhanced diagnostic features, and a sleepwalking feature that allows certain modules in the system to continue to perform various functions even when the module or the system is in a low-power sleep mode. | 07-05-2012 |
20120166918 | Verification of Configuration Parameters - In a battery management system, error detection data is generated for various configuration parameters used by the battery management system. The error detection data is compared against corresponding error detection data previously generated during production or development of a battery pack or battery pack application. Based on the comparison, an appropriate action can be taken. | 06-28-2012 |
20120166855 | EVENT SYSTEM AND TIMEKEEPING FOR BATTERY MANAGEMENT AND PROTECTION SYSTEM - Operating a battery management and protection system includes generating a set of events each of which has a respective frequency F/n | 06-28-2012 |
20120166841 | EVENT SYSTEM AND TIMEKEEPING FOR BATTERY MANAGEMENT AND PROTECTION SYSTEM - Operating a battery management and protection system includes generating a set of events each of which has a respective frequency F/n | 06-28-2012 |
20120166506 | Measuring Sum of Squared Current - A modulator can be configured to sense a change in current flow in a circuit and to generate an oversampled, noise-shaped signal. A first decimation filter is coupled to the modulator and is configured to generate instantaneous current data at a first data rate. The instantaneous current data can be input into a multiplier circuit. The output of the multiplier circuit (the instantaneous current data squared) can be input to a second decimation filter. The second decimation filter can be configured to generate a sum of the squared current data at a second data rate. The sum of the squared current data can be used by an application (e.g., battery power management) to compute power measurements or for other purposes. | 06-28-2012 |
20120163424 | Operating a Transceiver - In one embodiment, by a transceiver, setting a first receive frequency of a first channel of the transceiver and a second receive frequency of a second channel of the transceiver, during a first time interval, receiving a first radio frequency (RF) signal on the first channel, determining that a first measured value indicative of a first detectable received RF signal on the first channel exceeds a first predetermined threshold, and in response, receiving a first data frame on the first channel, during a second time interval, receiving a second RF signal on the second channel, and determining that a second measured value indicative of a second detectable received RF signal on the second channel exceeds the first predetermined threshold, and in response, receiving a second data frame on the second channel. | 06-28-2012 |
20120162828 | BATTERY MANAGEMENT AND PROTECTION - A battery management and protection system can include various features to improve safety-critical and other functions. Among the features that can be included in some implementations are automatic loading of safety or other parameters during start-up of the system; a centralized timekeeper and an event system that can trigger actions in the system independently of a central processing unit; use of the same modules for both automatically-controlled safety-related measurements and firmware-controlled measurements; enhanced diagnostic features, and a sleepwalking feature that allows certain modules in the system to continue to perform various functions even when the module or the system is in a low-power sleep mode. | 06-28-2012 |
20120161935 | Passive Transponder with a Charging Circuit - In one embodiment, a passive transponder comprising a first circuit comprising a first attenuator, the first circuit configured to receive a first signal from at least one base station and coupled to a first node, a first rectifier coupled to the first node, the first rectifier configured in a forward direction to charge a first capacitor, and the first capacitor coupled to the first rectifier, the first capacitor configured to receive a charge from the attenuator sufficient for powering the passive transponder. | 06-28-2012 |
20120161826 | COMPENSATING DFLL WITH ERROR AVERAGING - A compensating DFLL (CDFLL) is disclosed that utilizes temperature readings at regular intervals in combination with production characterization data of a reference oscillator to compensate for frequency drift and nominal frequency error. In some implementations, the CDFLL selects a calibration value that is not optimal for frequency accuracy to minimize accumulated frequency error over time. More particularly, during a calibration run, mismatch between an ideal frequency and an actual frequency is measured, and the measurement is used as a starting point for a next calibration run, such that the accumulated frequency error is averaged almost to zero over time. | 06-28-2012 |
20120161746 | LOW-POWER OPERATION FOR DEVICES WITH CIRCUITRY FOR PROVIDING REFERENCE OR REGULATED VOLTAGES - A device includes a voltage regulator and/or circuitry for generating a reference voltage. The voltage regulator and the circuitry for generating the reference voltage are operable in a continuous mode or a sample mode. Operating in the sample mode can help reduce overall power consumption of the device. During the sample mode, the voltage regulator and/or the circuitry for generating the reference voltage periodically are enabled to restore energy to respective energy storage components (e.g., capacitors). | 06-28-2012 |
20120161732 | Voltage Regulator Configuration - A voltage regulator is configurable to operate in a linear regulator mode or a buck regulator mode. To operate in the buck regulator mode, the voltage regulator is coupled to an inductor. To determine whether an inductor is coupled to voltage regulator, and thus whether the voltage regulator can be configured in the buck regulator mode, a detection circuit determines whether a regulator output of the voltage regulator resists a change in current driven to the regulator output. | 06-28-2012 |
20120161306 | Semiconductor Package - In one embodiment, a semiconductor package comprising a metal base coupled to one or more pins, a semiconductor body having a top side and a bottom side, the top side comprising an integrated circuit and one or more metal surfaces for coupling the integrated circuit to the one more pins with one or more bonding wires, the bottom side non-positively coupled to the metal base, a disk having a top area and a base area, the base area coupled to the top side of the semiconductor body and at least partially covering the integrated circuit, the disk being electrically insulated from the semiconductor body, and a plastic compound completely enclosing the one or more bonding wires, and at least partially enclosing the top side of the integrated circuit, the top area of the disk, and the one or more pins. | 06-28-2012 |
20120151432 | SOFTWARE FRAMEWORK AND DEVELOPMENT PLATFORM FOR MULTI-SENSOR SYSTEMS - The disclosed software framework and development platform facilitates software development for multi-sensor systems. In some implementations, developers can select a sensor board that includes a desired combination of sensor devices. The sensor board can be coupled to a development board that includes a target processor and other circuitry to facilitate development and testing of a system that includes the target processor and the sensors. Various software support tools are provided including an Application Programming Interface (API) that provides API abstractions for software drivers for the sensors on the sensor board. By using the abstractions of the API, a software developer does not have to write code (“glue”) to interact with the various software drivers. Additionally, the API provides access to a variety of software library functions for performing data scaling, unit conversion and mathematical functions and algorithms. | 06-14-2012 |
20120139864 | POSITION-SENSING AND FORCE DETECTION PANEL - Disclosed is a touch position sensor. Force detection circuitry can be included with the position sensor, for example, to determine an amount of force applied to a touch panel of the sensor. | 06-07-2012 |
20120139767 | CHARGE INJECTION MECHANISM FOR ANALOG-TO-DIGITAL CONVERTERS - A low-cost charge injection mechanism may enable oversampling to be used on low frequency signals by injecting dither noise into the ADC input. The dither noise can reduce the quantization noise allowing even direct current (DC) signals to be oversampled correctly. A low-cost charge injection mechanism can also be used to improve the ENOB by characterizing the ADC and digitally correcting the converted signal for non-linearity errors such as INL. Reducing INL errors may also allow a higher degree of oversampling to be used to further improve the ENOB. | 06-07-2012 |
20120121060 | NON-VOLATILE MEMORY COUNTER - A counter is efficiently implemented in non-volatile memory by using two binary counters and selectively using one or the other as a current counter. Writes to the binary counters are minimized by using two linear counters and using the state of the binary counters to determine which binary counter contains the current count. Write operations can be performed to the “not current” binary counter with the final write operation being to the linear counters. The linear counter write operations can be in program-only mode so that a power failure will not result in a loss of counts. | 05-17-2012 |
20120106250 | METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING OF NONVOLATILE ELECTRONIC DEVICES - Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching. | 05-03-2012 |
20120105081 | CAPACITIVE SENSOR, DEVICE AND METHOD - Exemplary capacitive sensors may be capable of determining presence and location of a touch and capable of determining a fingerprint pattern. | 05-03-2012 |
20120099662 | Communication Protocol Method And Apparatus For A Single Wire Device - The present invention is a noise tolerant communication protocol device and method where a clock signal input, triggers an internal delay clock in an integrated circuit. Data is presented to an input pin and sampled prior to the next external clock pulse based on the internal delay clock. A data pulse value is distinguished by input signal voltage level and not by pulse length. Sampling of data bits is deferred until a signal level is most likely stable, thereby avoiding sampling during periods around edges of changing data values. Therefore, error detection and correction circuitry is not required. A time reference pulse, produced by a bus master, is measured by the protocol device, in determine a data transmission rate by the master. The timing of sampling of input signaling from the master is determined by the protocol, device from measurement of the time reference pulse magnitude. | 04-26-2012 |
20120096334 | Error Detecting/Correcting Scheme For Memories - A method for detecting and correcting errors in a memory having a read/write paradigm is presented. In these implementations, various approaches to detect errors on a per word or per group of words basis and correct errors on a per group of words or per page basis, respectively, in relation to a memory and its associated differing read/write operations, are provided. For instance, in one implementation, errors are detected on a per word basis and corrected on a per page basis for a NOR Flash Memory having differing read/write operations of reading on a per word basis and writing on a per page basis. Advantageously, benefits of the various implementations include reduced encoder/decoder complexities, reduced parity overhead requirements, and reduced performance degradation. | 04-19-2012 |
20120068775 | Frequency Locking Oscillator - A delay line of individually selectable delay elements can operate as an oscillator in an open loop mode to track process variation or drive a clock signal that varies with temperatures and voltages in the system. The delay line oscillator can also operate in a closed loop mode to match a frequency given by a tuner ratio and a reference clock. The delay line can also be used for measuring clock jitter or duty cycle. | 03-22-2012 |
20120064842 | Transmitting/Receiving Device and Method for Transmitting Data in a Radio Network - In one embodiment, a method includes receiving an instruction for a transceiver of a device to transmit a first data frame; in response to the instruction, generating a first control signal for a switch to couple the transceiver to a first antenna for transmission of the first data frame by the transceiver via the first antenna; determining whether the transceiver has received within a pre-determined time interval after the transmission of the first data frame a second data frame containing an acknowledgement message confirming successful receipt of the first data frame by another device; and, if the transceiver has not received within the pre-determined time interval after the transmission of the first data frame the second data frame, then generating a second control signal for the switch to couple the transceiver to the second antenna for re-transmission of the first data frame by the transceiver via a second antenna. | 03-15-2012 |
20120057422 | LOW POWER SENSE AMPLIFIER FOR READING MEMORY - A low power sense amplifier is configured to sense the state of a memory cell (e.g., non-volatile memory cell) without the use of a reference current or direct current. | 03-08-2012 |
20120044206 | Touch Screen Element - In one embodiment, a method includes receiving one or more first output signals from a first area of a touch-sensitive position sensor; receiving one or more second output signals from a second area of the touch-sensitive position sensor; calculating a first touch-position estimate based on the first output signals; calculating a second touch-position estimate based on the second output signals; and determining, based at least in part on the first and second touch-position estimates, an intended-touch location with respect to the touch-sensitive position sensor. | 02-23-2012 |
20120043829 | Mode Switching RC Network - Various embodiments include apparatus, systems, and methods having a conductive contact configured to couple to a resistor-capacitor (RC) network, a device unit coupled to the conductive contact, and a mode switching unit to change a characteristic of a signal at the conductive contact based at least in part on an RC time constant of the RC network. The mode switching unit may switch the device unit between a first operating mode and a second operating mode based on a signal level of the signal. | 02-23-2012 |
20120039424 | Receiver and Method for the Reception of a Node by a Receiver in a Wireless Network - In one embodiment, a method includes receiving a radio frequency (RF) signal; synchronizing the received RF signal with a preamble to determine a time base; determining a first energy value of the received RF signal by averaging received signal strength indication (RSSI) values of the received RF signal over a first period of time; determining a second energy value of the received RF signal over a second period of time; determining a difference value between the first energy value and the second energy value; comparing the difference value with a predetermined energy threshold value; determining a quality value of the received RF signal; comparing the quality value of the received RF signal with a predetermined quality threshold value; and, if the difference value exceeds the predetermined energy threshold value or the quality value is below the predetermined quality threshold value, then erasing the time base. | 02-16-2012 |
20120037189 | EX-SITU COMPONENT RECOVERY - Disclosed herein are devices, methods and systems for ex-situ component recovery. The ex-situ recovery can be performed by desorbing or outgassing components of a processing system in a recovery system, rather than in the processing system itself. The recovery system can include a docking station and/or a heated vacuum chamber. The heated vacuum chamber can be used to desorb or outgas components that will be located inside the processing system, while the docking station can be used to desorb or outgas components that will be connected to the processing system. The processing system components can be placed under pressure by the recovery system to desorb or outgas contaminants and remove virtual leaks. The recovery system pressure can include a vacuum roughing pump, a turbomolecular pump, and/or a cryogenic pump to apply a pressure necessary to desorb or outgas the components. | 02-16-2012 |
20120036299 | Secure Information Processing - Apparatus, systems, and methods may operate to receive from a requesting device, at a memory device, a request to access a memory domain associated with the memory device, and to deny, by the memory device, the request if the memory domain comprises any part of a secure domain, and the requesting device has not asserted a secure transfer indication. Additional operations may include granting the request if the memory domain comprises some part of the secure domain and the requesting device has asserted the secure transfer signal, or if the memory domain comprises only a non-secure domain. Additional apparatus, systems, and methods are disclosed. | 02-09-2012 |
20120025813 | DETECTING INDUCTIVE OBJECTS USING INPUTS OF INTEGRATED CIRCUIT DEVICE - An system for detecting inductive objects includes an inductive sensor circuit for detecting changes in an electromagnetic field (“EMF”) environment and an integrated circuit (“IC”) device. The inductive sensor circuit generates an oscillating analog waveform with an envelope that indicates changes in the EMF environment. The oscillating waveform is coupled to the digital input pin of the IC. A digital interface circuit in the IC is coupled to the digital input pin and is configured for detecting if the oscillating waveform exceeds high and low threshold voltage levels. The detecting results in a digital pulse which represents changes in the EMF environment. In another implementation, a timer input capture pin can be used to detect the waveform envelope decay by storing the time when the waveform crosses a threshold value during a time period. A reduced capture time after the time period expires indicates a change in the EMF environment. | 02-02-2012 |
20120025375 | ROUTABLE ARRAY METAL INTEGRATED CIRCUIT PACKAGE FABRICATED USING PARTIAL ETCHING PROCESS - An integrated circuit assembly is fabricated on a metal substrate strip in an array format that has raised circuitry pattern formed by photolithographic and metal etching processes. The circuitry pattern is formed on one side of the metal substrate only. The raised circuitry's etch depth extends partially through the metal substrate. Die attachment can be performed using a non-conductive material applied directly onto and around the raised circuitry features directly under the die. After wirebond and molding processes, the molded metal substrate strip assembly is processed through a metal etching process to remove the metal substrate portion that is exposed beyond the mold cap. A solder mask coating can be applied to protect the metal circuitry and to define the package pad opening to form Land-Grid-Array (LGA) packages. Solder balls can also be attached to form Ball-Grid-Array (BGA) packages. | 02-02-2012 |
20120019449 | TOUCH SENSING ON THREE DIMENSIONAL OBJECTS - Examples of touch sensors are capable of determining the position of one or more touches and/or gestures on a three dimensional object. | 01-26-2012 |
20120001784 | Integrating (SLOPE) DAC Architecture - A current source is used to pre-charge a capacitor to a known value. The capacitor can then be connected to a unity gain buffer to provide a low cost DAC. The DAC can include a self-calibration stage to improve accuracy. The DAC can include two or more circuit branches, each including a current source and a capacitor, where each branch can be calibrated and operated separately to reduce mismatch and to provide a continuous analog voltage output. | 01-05-2012 |
20110280286 | Detecting Data Symbols - In one embodiment, a method includes generating a set of sequences of chip values and calculating a correlation between a demodulated signal and each one of two or more of the sequences. Each of the correlations has an absolute value, and one of the correlations has a highest absolute value. The method includes selecting the one of the sequences with the correlation having the highest absolute value; identifying a sequence index corresponding to the selected one of the sequences; and, for each of one or more data symbols in the demodulated signal, determining a value of the data symbol based on the sequence index corresponding to the selected one of the sequences. | 11-17-2011 |
20110260250 | Method And Manufacturing Low Leakage Mosfets And FinFets - By aligning the primary flat of a wafer with a ( | 10-27-2011 |
20110243258 | Wireless Data Transmission Between a Base Station and a Transponder Via Inductive Coupling - In one embodiment, a method includes receiving a carrier signal transmitted by a base station according to either a first data-transmission protocol or a second data-transmission protocol; detecting a first field gap in the carrier signal indicating initiation of a data transmission by the base station; and determining whether a reference duration is present in the carrier signal after the first field gap. The method includes, if the reference duration is present in the carrier signal after the first field gap then, according to the first data-transmission protocol, determining a calibration value for the data transmission based on the reference duration and decoding the data transmission by measuring durations between successive subsequent field gaps and determining whether each duration as measured is a binary 1 or binary 0 based on the calibration value. | 10-06-2011 |
20110242051 | Proximity Sensor - In one embodiment, a method includes monitoring detection by a sensing element of a key touch on a touch screen; determining an amount of time that has elapsed since the sensing element last detected a change of capacitance indicative of a key touch on the touch screen; and, if the amount of time that has elapsed exceeds a predetermined time duration, then initiating a particular function of an apparatus. | 10-06-2011 |
20110238869 | Autonomous Multi-Packet Transfer for Universal Serial Bus - A USB device can be configured for multi-packet data transfer to and from endpoints with minimal software intervention. Minimal software intervention allows a Central Processing Unit (CPU) of the USB device to handle other tasks, maximizing USB bus utilization. | 09-29-2011 |
20110227589 | Capacitive Position Sensor - In one embodiment, a method includes receiving one or more first signals indicating one or more first capacitive couplings of an object with a sensing element that comprises a sensing path that comprises a length. The first capacitive couplings correspond to the object coming into proximity with the sensing element at a first position along the sensing path of the sensing element. The method includes determining based on one or more of the first signals the first position of the object along the sensing path and setting a parameter to an initial value based on the first position of the object along the sensing path. The initial value includes a particular parameter value and is associated with a range of paratemeter values. The range of parameter values is associated with the length of the sensing path. | 09-22-2011 |
20110219160 | FAST TWO WIRE INTERFACE AND PROTOCOL FOR TRANSFERRING DATA - An apparatus and method for exchanging data between devices. An interface between at least two devices features a serial clock line coupled to each device and a bidirectional serial data line coupled to each device. A delay relative to the clock signal is added to an edge of an output enable signal to prevent a collision between devices when control of the data line is switched. Multiple masters and slaves may be connected to the interface. | 09-08-2011 |
20110217924 | Transmitting Data Between a Base Station and a Transponder - In particular embodiments, an error correction during the transmission of the data word is made possible through the change of the modulation state at pre-defined time points. | 09-08-2011 |
20110199333 | Touch Sensitive Screen - One embodiment provides a capacitive sensor for determining the presence of an object, such as a user's finger or a stylus. The sensor includes a substrate on which electrodes are deposited. A resistive drive electrode is arranged on one side of the substrate and a resistive sense electrode is arranged on the other side of the substrate. A shorting connection connects between two locations on one of the electrodes. The electrodes are connected to respective drive and sense channels. | 08-18-2011 |
20110193192 | Stacked-Die Electronics Package with Planar and Three-Dimensional Inductor Elements - An apparatus and a method for producing three-dimensional integrated circuit packages. In one embodiment, an electronics package with at least two dice are stacked one atop another is disclosed. A top die is of smaller size compared with a bottom die such that after a die attach operation, wire-bond pads of the bottom die will be exposed for a subsequent wire bonding operation. The bottom die contains contact pads on the front side that couple with one or more passive components fabricated on the back side of the top die to complete the circuit. In another exemplary embodiment, a method to form one or more three-dimensional passive components in a stacked-die package is disclosed wherein partial inductor elements are fabricated on the front side of the bottom die and the back side of the top die. The top and bottom elements are coupled together completing the passive component. | 08-11-2011 |
20110170487 | Method and Apparatus for Data Communication Between a Base Station and a Transponder - A method and system for data communication between a base station and at least one transponder via a high-frequency electromagnetic carrier signal onto which information packets are modulated. Each information packet has a header section, a middle section, and a trailer section. The header section can be provided in a forward link of a data communication between the base station and the transponders for controlling data communication. The header section is used in a return link of a data communication in order to transmit information from the transponder to the base station. | 07-14-2011 |
20110170354 | Method and System to Access Memory - This document discusses among other things, a system comprising a host controller, an Input/Output buffer, and a memory device. The memory device is coupled to the host controller and is configured to receive a read command from the host controller. The non-volatile includes an interface control logic, which is in communication with a non-volatile memory. The interface control logic includes a latency programming circuit coupled to the non-volatile memory and the Input/Output buffer. The latency programming circuit stores at least one value corresponding to dummy byte delays to be provided at the non-volatile memory prior to transferring data from the non-volatile memory during a read operation. | 07-14-2011 |
20110163853 | Method for Selecting One or More Transponders - A method and device for selecting one or more transponders, in particular backscatter-based transponders, from a plurality of transponders by a base station, which method is based on a slotted ALOHA method, in which the base station defines numbered time slots and a random number generated in a given transponder determines a time slot when the transponder transmits its transponder-specific identification to the base station. The random number is generated in a given transponder with the aid of a random number generator, the relevant random number generator is switched into a counter operating mode after reception of a selection command transmitted by the base station, while a count state of the random number generator is decremented or incremented when the base station transmits the start of a time slot, the relevant transponder transmits a transponder-specific identification to the base station if the count state of its random number generator is equal to a predetermined value, and the relevant random number generator is then switched back into the operating mode for random number generation. | 07-07-2011 |
20110163851 | Method for Locating a Backscatter-Based Transponder - A method and apparatus for locating a transponder is provided. A carrier signal is transmitted by a base station and a transponder transmits a locating signal that is generated through phase modulation and backscattering of the carrier signal sent by the base station when the transponder is within a transmission range of the base station, whereby the transponder is located on the basis of the locating signal. | 07-07-2011 |
20110158176 | Method for Wireless Data Transmission - A method for wireless data transmission between a base station and a transponder is provided, in which data are transmitted between the base station and the transponder in the form of data packets that include a header section with at least one symbol for setting one or more transmission parameters and include at least one additional section. The transponder monitors, during the data transmission, to determine whether a time period between two successive symbol delimiters transmitted by the base station exceeds a maximum time, and if the maximum value is exceeded, a receiver unit of the transponder is reset. The maximum time can be determined in the transponder on the basis of the at least one symbol in the header section. | 06-30-2011 |
20110157085 | Capacitive Keyboard with Position-Dependent Reduced Keying Ambiguity - In one embodiment, a method includes receiving two or more output signals responsive to two or more capacitive couplings. Each of the capacitive couplings has occurred between a pointing object and one of two or more sensing areas within a sensing region, and each of the sensing areas has a position within the sensing region. The method includes, if two or more of the output signals each have an output-signal level that exceeds a predefined activation level, then selecting a particular one of the sensing areas with output-signal levels exceeding the predefined activation level as an intended one of the sensing areas based on a predefined ranking scheme that takes into account the positions of the sensing areas within the sensing region. | 06-30-2011 |
20110156876 | Method and Device for Recognizing Functional States in RFID or Remote Sensor Systems - A method for recognizing time-variable functional states, e.g., in the course of a programming process, in RFID systems is disclosed, which includes at least one transponder or remote sensor and at least one base station, which transmits data and/or power to the transponder or sensor by a carrier signal. According to the invention, after a specified process state is attained at least one confirmation symbol is transmitted by the transponder or sensor to the base station. As a result, no unfavorable “worst case” scenario has to be provided for chronologically controlling time-variable processes because the base station is able to clearly recognize the beginning and end of the process, as well as the state thereof. RFID systems or remote sensor systems can thus be controlled more quickly and more reliably, resulting especially in reduced costs. | 06-30-2011 |
20110145665 | ACCESSING SEQUENTIAL DATA IN A MICROCONTROLLER - System and methods transfer data over a microcontroller system test interface. The system can read data from and write data to microcontroller system memory using the described method. The method provides for the efficient transfer of data, minimizing redundancies and overhead present in conventional microcontroller test system protocols. | 06-16-2011 |
20110145548 | MICROPROCESSOR FOR EXECUTING BYTE COMPILED JAVA CODE - A microprocessor architecture for executing byte compiled Java programs directly in hardware. The microprocessor targets the lower end of the embedded systems domain and features two orthogonal programming models, a Java model and a RISC model. The entities share a common data path and operate independently, although not in parallel. The microprocessor includes a combined register file in which the Java module sees the elements in the register file as a circular operand stack and the RISC module sees the elements as a conventional register file. The integrated microprocessor architecture facilitates access to hardware-near instructions and provides powerful interrupt and instruction trapping capabilities. | 06-16-2011 |
20110121292 | CALIBRATION OF TEMPERATURE SENSITIVE CIRCUITS WITH HEATER ELEMENTS - One or more heating elements are disposed on a semiconductor substrate proximate a temperature sensitive circuit disposed on the substrate (e.g., bandgap circuit, oscillator). The heater element(s) can be controlled to heat the substrate and elevate the temperature of the circuit to one or more temperature points. One or more temperature measurements can be made at each of the one or more temperature points for calibrating one or more reference values of the circuit (e.g., bandgap voltage). | 05-26-2011 |
20110116527 | SELF-CALIBRATING, WIDE-RANGE TEMPERATURE SENSOR - A self-calibrating, wide-range temperature sensor includes a current reference, impervious to process and voltage, with the current reference mirrored into two oppositely-sized bipolar transistors or diodes. Duplicate current sources are used with a ratio of geometries between them, such that the larger current biases the smaller bipolar transistor (less cross-sectional area) and the smaller current source biases the larger bipolar transistor (higher cross-sectional area). The current source in conjunction with the differential temperature sensing provides inherent calibration without drift while the differential sensing, from the ratio of geometries in the current paths also increases sensitivity. | 05-19-2011 |
20110102361 | TOUCHSCREEN ELECTRODE CONFIGURATION - A touchscreen includes touchscreen electrode elements distributed across an active area of a substrate, and the touchscreen overlays a display. The touchscreen electrode elements are configured to avoid creating moiré patterns between the display and the touchscreen, such as angled, wavy, zig-zag, or randomized lines. In a further example, the electrodes form a mesh pattern configured to avoid moiré patterns. | 05-05-2011 |
20110073907 | INTEGRATED CIRCUIT STRUCTURES CONTAINING A STRAIN-COMPENSATED COMPOUND SEMICONDUCTOR LAYER AND METHODS AND SYSTEMS RELATED THERETO - A method for pseudomorphic growth and integration of an in-situ doped, strain-compensated metastable compound base into an electronic device, such as, for example, a SiGe NPN HBT, by substitutional placement of strain-compensating atomic species. The invention also applies to strained layers in other electronic devices such as strained SiGe, Si in MOS applications, vertical thin film transistors (VTFT), and a variety of other electronic device types. Devices formed from compound semiconductors other than SiGe, such as, for example, GaAs, InP, and AlGaAs are also amenable to beneficial processes described herein. | 03-31-2011 |
20110062598 | STACKED-DIE PACKAGE INCLUDING SUBSTRATE-GROUND COUPLING - Method and apparatus are provided for semiconductor device packages. In an example, an apparatus can include a first semiconductor device, a ground pad situated on an uppermost portion of the first semiconductor device and configured to electrically couple portions of the first semiconductor device to aground potential, and a second semiconductor device having at least a portion in electrical communication with an uppermost face of the first semiconductor device through a first electrically-conductive adhesive. In an example, the first electrically-conductive adhesive can be electrically coupled to the ground bond pad on the first semiconductor device. | 03-17-2011 |
20110044114 | APPARATUS AND METHOD FOR BIT LINES DISCHARGING AND SENSING - Some embodiments include first bit lines coupled to a first junction bus and second bit lines coupled to a second junction bus. Such embodiments can also include a first network to discharge at least one of the first bit lines through the first junction bus and to discharge at least one of the second bit lines through the second junction bus. Such embodiments can further include a second network to couple a sense amplifier to at least one of the first junction bus and the second junction bus. Other embodiments are described. | 02-24-2011 |
20110043482 | ANISOTROPIC TOUCH SCREEN ELEMENT - A touch sensitive position sensor for detecting the position of an object in two dimensions is described. The position sensor has first and second resistive bus-bars spaced apart with an anisotropic conductive area between them. Electric currents induced in the anisotropic conductive area by touch or proximity flow preferentially towards the bus-bars to be sensed by detection circuitry. Because induced currents, for example those induced by drive circuitry, flow preferentially along one direction, pin-cushion distortions in position estimates are largely constrained to this single direction. Such one-dimensional distortions can be corrected for very simply by applying scalar correction factors, thereby avoiding the need for complicated vector correction. | 02-24-2011 |
20110043226 | CAPACITIVE SENSOR - Method and apparatus are provided for a capacitive sensor. In an example, a capacitive sensor can include a first sensing element, a sensing channel operable to generate a first signal indicative of first capacitance between the sensing element and a system ground, and a processor responsive to a change in the first capacitance between the first sensing element and ground. The processor can be configured to adjust a parameter value based on a first duration of the change in the first capacitance. | 02-24-2011 |
20110037705 | TOUCH-SENSITIVE USER INTERFACE - A touch-sensitive user interface includes a sensor element providing a plurality of sensing areas, a measurement circuit coupled to the sensor element and operable to iteratively acquire measurement signal values indicative of the proximity of an object to the respective sensing areas, and a processor operable to receive the measurement signal values from the measurement circuit and to classify a sensing area as an activated sensing area for a current iteration according to predefined selection criteria, wherein the predefined selection criteria are such that activation of at least a first sensing area in a current iteration is suppressed if at least a second sensing area has previously been classified as an activated sensing area within a predefined period before the current iteration. Thus a sensing area may be prevented from being activated for a predefined period of time after another sensing area has been activated. Furthermore, activation of different sensing areas may be suppressed for different periods of time in response to other sensing areas having been previously activated. sensing area | 02-17-2011 |
20110037634 | Device and Method for Scanning Multiple ADC Channels - An analog to digital converter has an input for coupling to multiple channels having analog signals. The analog to digital converter converts the analog signals on such channels to provide a digital output. A memory device has an enable bit for each of the multiple channels and a current channel register. An interface coupled to the memory device and current channel register selects a next channel for converting by the analog to digital converter, skipping channels that are not enabled. | 02-17-2011 |
20110037513 | Controlling Bias Current for an Analog to Digital Converter - A converter includes an analog to digital converter having a bias current input, a control input, and an analog input to provide a digital output as a function of the analog input. A bias module is coupled to the bias current input to provide bias current to the analog to digital converter. A controller is coupled to the bias module and to the control input of the analog to digital converter. The controller controls the analog to digital converter to sample an analog input and controls the bias module to provide an operating bias current during sampling of the analog input and an idle bias current when not sampling the analog input. | 02-17-2011 |
20110032019 | LEVEL SHIFTER WITH OUTPUT LATCH - A level shifter for a microcontroller shifts an input voltage in a first power domain to an output voltage level consistent with a second power domain. The level shifter is enabled to shift the voltages when both power domains are operative. | 02-10-2011 |
20110026347 | Differential Sense Amplifier - A differential sense amplifier can perform data sensing using a very low supply voltage. | 02-03-2011 |
20110025463 | Parallel Antennas for Contactless Device - An electronic information device includes an integrated circuit embedded within the device. The electronic information device further includes a first antenna that is embedded within the device and is connected to the integrated circuit. The electronic information device further includes a second antenna that is embedded within the device and is connected to the integrated circuit. The first antenna is oriented within a first plane and the second antenna is oriented within a second plane that is substantially parallel to the first plane. | 02-03-2011 |
20110014747 | STACKABLE PACKAGES FOR THREE-DIMENSIONAL PACKAGING OF SEMICONDUCTOR DICE - An apparatus and a method for packaging semiconductor devices. The apparatus includes a substrate strip component of a leadless three-dimensional stackable semiconductor package having mounting contacts on, for example, four peripheral edges. The substrate strip may either be fabricated for mounting a single electrical component (e.g., an integrated circuit die) or a plurality of substrate strips may be laid out in an X-Y matrix pattern which may later be singulated into individual package strip for leadless packages. three-dimensional stacking is achieved by a bonding area on an uppermost portion of the sidewall. The sidewall of the strip is high enough to enclose an encapsulant covering a later mounted integrated circuit die and associated bonding wires. | 01-20-2011 |
20110012886 | Efficient Display Driver - A driver circuit for a display device (e.g., an LCD) omits buffers and a resistive ladder and connects the output of a switched regulator directly to a display device through a selector switch. Voltage inputs for the display device can be selectively coupled to the output of the switched regulator using the selector switch. Each voltage input can be coupled to a capacitor that is charged when the corresponding voltage input is coupled to the high voltage output of the switched regulator. In some implementations, bypass switches are connected between the voltage inputs. If the voltage of a given capacitor is too high, the excess voltage can be transferred or otherwise discharged through the bypass switch to another capacitor storing a lower voltage. | 01-20-2011 |
20110001215 | MULTI-COMPONENT ELECTRONIC PACKAGE - An electronic multi-component package is assembled by placing multiple electronic components within multiple openings of a package substrate, then depositing and curing adhesive filler in gaps between the components and the inner peripheries of the openings. Circuit features, including conductive interconnects, are formed by thin-film photolithography over both front and back surfaces of the package substrate. Preformed conductive vias through the package substrate provide electrical connection between circuit features on opposite substrate surfaces. Additional electronic components may be attached to conductive lands on at least one side of the package. The circuit features also include contact pads for external package connections, such as in a ball-grid-array or equivalent structure. | 01-06-2011 |
20100329059 | APPARATUS AND METHODS FOR SENSE AMPLIFIERS - Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell; and a second circuit including a second circuit path coupled between the supply node and the line to charge the line during the memory operation. Additional embodiments are disclosed. | 12-30-2010 |
20100329023 | SENSE AMPLIFIER APPARATUS AND METHODS - Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed. | 12-30-2010 |
20100315856 | HIGH-DENSITY NON-VOLATILE READ-ONLY MEMORY ARRAYS AND RELATED METHODS - In an embodiment, a read-only memory array includes a plurality of word lines, a plurality of bit-lines including first and second bit-lines, and a plurality of memory cells configured to represent data values. Each memory cell can include a transistor having a control terminal coupled to one of the plurality of word lines, a drain terminal, and a source terminal. Connections associated with the drain and source terminals of a particular memory cell can determine a data value represented by the memory cell. The memory cells of the plurality of memory cells that are coupled to less than two bit-lines are configured to represent one values. | 12-16-2010 |
20100315855 | ROM ARRAY WITH SHARED BIT-LINES - Electronic apparatus, methods of forming the electronic apparatus, and methods of operating the electronic apparatus include a read only memory having a memory array of bit-lines, where the bit-lines are arranged such that each bit-line has a shared arrangement with one or more other bit-lines of the memory array. Each shared arrangement is structured to operably store a plurality of bits. | 12-16-2010 |
20100301122 | NON-VOLATILE MEMORY CHARGE PUMP FOR RADIO FREQUENCY IDENTIFICATION (RFID) SYSTEM - A charge pump is incorporated into circuitry of an RFID tag. The charge pump takes advantage of an antenna voltage phase to eliminate the need for a charge pump clock generator. Placement of the charge pump in the RFID circuitry reduces the number of pump stages and eliminates drivers used in each pump stage. In some implementations, an RFID tag comprises antenna circuitry, including a tuned antenna, for receiving an RF signal. Voltage conversion circuitry in the RFID tag is coupled to the antenna circuitry and operable for converting a varying magnetic field produced in the antenna to a voltage source. A charge pump is coupled to output voltage signals of the antenna circuitry which provide the charge pump with a high starting reference voltage and a two phase pump clock. | 12-02-2010 |
20100283651 | CYCLIC DIGITAL TO ANALOG CONVERTER - Some embodiments include apparatus and methods having an amplifier, a capacitor network coupled to the amplifier, and switching circuitry coupled to the amplifier and the capacitor network. The switching circuit is configured to successively apply a selected reference voltage selected from among a first reference voltage, a second reference voltage, and a third reference voltage to the capacitor network in response to a digital input code to generate an output voltage. Additional embodiments are disclosed. | 11-11-2010 |
20100277841 | THRESHOLD VOLTAGE METHOD AND APPARATUS FOR ESD PROTECTION - An electrostatic discharge protection circuit comprises a comparator coupled between a power supply terminal and ground. The comparator responds to an electrostatic discharge event producing a trigger signal at a comparator output. The comparator comprises a first and second current mirror. The first and second current mirrors each comprise a sense device and a mirror device. The mirror devices are coupled in series between the power supply terminal and ground. The first mirror device produces an incident current and the second mirror device receives an absorption current. With a supply voltage on the power supply terminal equal to or greater than a trigger supply voltage, the absorption current exceeds the incident current and produces a trigger signal at the comparator output. The trigger signal activates a shunt device that shunts current from the power supply terminal to ground. | 11-04-2010 |
20100271143 | Current-Controlled Hysteretic Oscillator - The disclosed current-controlled hysteretic oscillator operates by controlled currents opposing each other in differential pairs to set a controlled hysteresis for improved relaxation oscillations with immunity to phase or frequency error. | 10-28-2010 |
20100263922 | SURFACE MOUNTING CHIP CARRIER MODULE - A device includes a carrier and an integrated circuit chip having a first side supported by the carrier and a second side having contacts. The carrier has multiple carrier contacts supported by the carrier and separated from the integrated circuit chip. Multiple leads are coupled between the contacts on the integrated circuit chip and the multiple carrier contacts. A resin encapsulates the integrated circuit chip leaving the multiple carrier contacts at least partially uncovered for attaching to a card or board. | 10-21-2010 |
20100262880 | QUADRATURE DECODER FILTERING CIRCUITRY FOR MOTOR CONTROL - The disclosed quadrature decoder filtering circuitry for motor control uses one quadrature signal to correct an error in the other quadrature signal, thus allowing a noisy signal due to large dust particles or scratches to be recovered. In some implementations, a system processing for quadrature signals comprises a first circuitry triggered by edges of a first quadrature signal to detect inactivity of a second quadrature signal during consecutive edges of the first quadrature signal. A second circuitry is operable to count the number of consecutive edges of the first quadrature signal during inactivity of the second quadrature signal. A third circuitry is operable to combine transitions of the first quadrature signal with the second quadrature signal during a period of time determined by the count value of the second circuitry. | 10-14-2010 |
20100258360 | Two-Dimensional Position Sensor - A two dimensional position sensor having a touch-sensitive panel defined by a single-layer electrode pattern arranged on one side of a substrate. The electrode pattern is made up of ‘n’ electrode units extending row-wise over the panel. Each electrode unit is made up of a single drive electrode extending across the touch-sensitive area of the panel and a plurality of ‘m’ sense electrodes, which collectively laterally extend across the touch-sensitive area and individually each occupy only a portion of the lateral extent. The sense electrodes are longitudinally offset from their associated drive electrode so that one edge of each sense electrode lies adjacent to one edge of the drive electrode, these coupling edges being separated by a gap dimensioned so that in use each pair of drive and sense electrodes have efficient capacitively coupling across the gap. This electrode pattern allows the longitudinal extent of each electrode unit to be made relatively small, which in turn is better for sensing multiple simultaneous touches, since this benefits from having more electrode units in any given panel. | 10-14-2010 |