ASPEN ACQUISITION CORPORATION Patent applications |
Patent application number | Title | Published |
20130133253 | BIODEGRADABLE MATERIAL AND PLANT CONTAINER - A biodegradable plant container made from a cellulosically derived polymer is coated with an enhancer to facilitate biodegradation of the container. | 05-30-2013 |
20120096243 | MULTITHREADED PROCESSOR WITH MULTIPLE CONCURRENT PIPELINES PER THREAD - A multithreaded processor comprises a plurality of hardware thread units, an instruction decoder coupled to the thread units for decoding instructions received therefrom, and a plurality of execution units for executing the decoded instructions. The multithreaded processor is configured for controlling an instruction issuance sequence for threads associated with respective ones of the hardware thread units. On a given processor clock cycle, only a designated one of the threads is permitted to issue one or more instructions, but the designated thread that is permitted to issue instructions varies over a plurality of clock cycles in accordance with the instruction issuance sequence. The instructions are pipelined in a manner which permits at least a given one of the threads to support multiple concurrent instruction pipelines. | 04-19-2012 |
20110254588 | POWER SAVING CIRCUIT USING A CLOCK BUFFER AND MULTIPLE FLIP-FLOPS - A circuit is described including a clock input for at least one clock signal. Only one clock buffer is connected to the clock input to generate, based on the at least one clock signal, at least a first modified clock signal and a second modified clock signal. A plurality of flip-flops are connected to the clock buffer. Each of the flip-flops receive the first and second modified clock signals. A plurality of data inputs are each connected to at least one of the plurality of flip-flops to provide input data to the plurality of flip-flops. A plurality of data outputs each are connected to at least one of the plurality of flip-flops to provide output data from the plurality of flip-flops. Each of the plurality of flip-flops transform the input data to the output data utilizing the first modified clock signal and the second modified clock signal. | 10-20-2011 |
20110252211 | HALTABLE AND RESTARTABLE DMA ENGINE - A method is described for operation of a DMA engine. Copying is initiated for transfer of a first number of bytes from first source memory locations to first destination memory locations. Then, a halt instruction is issued before the first number of bytes are copied. After copying is stopped, a second number of bytes is established, encompassing those bytes remaining to be copied. After the transfer is halted, a quantity of the second number of bytes is identified. Quantity information is then generated and stored. Second source memory locations are identified to indicate where the second number of bytes are stored. Second source memory location information is then generated and stored. Second destination memory locations are then identified to indicate where the second number of bytes are to be transferred. Second destination memory location information is then generated and stored. | 10-13-2011 |
20110241744 | LATCH-BASED IMPLEMENTATION OF A REGISTER FILE FOR A MULTI-THREADED PROCESSOR - A processor register file for a multi-threaded processor is described. The processore register file includes, in one embodiment, T threads, having N b-bit wide registers. Each of the registers includes a b-bit master latch, T b-bit slave latches connected to the master latch, and a slave latch write enable connected to the slave latches. The master latch is not opened at the same time as the slave latches. In addition, only one of the slave latches is enabled at any given time. As should be apparent to those skilled in the art, T, N, and b are all integers. Other embodiments and variations are also provided. | 10-06-2011 |
20110153701 | IMPLEMENTATION OF ARBITRARY GALOIS FIELD ARITHMETIC ON A PROGRAMMABLE PROCESSOR - A method for a Galois Field multiply includes executing first and second instructions. The first instruction includes receiving a first input, such as a first variable, receiving a second input, such as a second variable, performing a polynomial multiplication over GF(2 | 06-23-2011 |